]> granicus.if.org Git - esp-idf/commitdiff
Fix int clear, actually call int init code
authorJeroen Domburg <git@j0h.nl>
Thu, 27 Oct 2016 04:37:19 +0000 (12:37 +0800)
committerJeroen Domburg <git@j0h.nl>
Thu, 27 Oct 2016 04:37:19 +0000 (12:37 +0800)
components/esp32/cpu_start.c
components/esp32/crosscore_int.c
components/esp32/lib

index 5c7a411c8ea69e47f4af12b21a020abe1ab799bf..0c94f39e301680113196de16130841a9bb338def 100644 (file)
@@ -41,6 +41,7 @@
 #include "esp_event.h"
 #include "esp_spi_flash.h"
 #include "esp_ipc.h"
+#include "esp_crosscore_int.h"
 #include "esp_log.h"
 
 #include "trax.h"
@@ -146,6 +147,7 @@ void start_cpu0_default(void)
     uart_div_modify(0, (APB_CLK_FREQ << 4) / 115200);
     ets_setup_syscalls();
     do_global_ctors();
+    esp_crosscore_int_init();
     esp_ipc_init();
     spi_flash_init();
     xTaskCreatePinnedToCore(&main_task, "main",
@@ -165,6 +167,7 @@ void start_cpu1_default(void)
     while (port_xSchedulerRunning[0] == 0) {
         ;
     }
+    esp_crosscore_int_init();
     ESP_LOGI(TAG, "Starting scheduler on APP CPU.");
     xPortStartScheduler();
 }
index 95f2762f2389851cf6aacfa7475a278fe02eb3a4..a98b13583cd445e31443eca7c38cca1418d4d4f9 100644 (file)
@@ -57,7 +57,7 @@ static void esp_crosscore_isr(void *arg) {
        if (xPortGetCoreID()==0) {
                WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 0);
        } else {
-               WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 1);
+               WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_1_REG, 0);
        }
        //Grab the reason and clear it.
        portENTER_CRITICAL(&reasonSpinlock);
@@ -77,6 +77,7 @@ static void esp_crosscore_isr(void *arg) {
 //on each active core.
 void esp_crosscore_int_init() {
        portENTER_CRITICAL(&reasonSpinlock);
+       ets_printf("init cpu %d\n", xPortGetCoreID());
        reason[xPortGetCoreID()]=0;
        portEXIT_CRITICAL(&reasonSpinlock);
        ESP_INTR_DISABLE(ETS_FROM_CPU_INUM);
@@ -87,7 +88,6 @@ void esp_crosscore_int_init() {
        }
        xt_set_interrupt_handler(ETS_FROM_CPU_INUM, esp_crosscore_isr, (void*)&reason[xPortGetCoreID()]);
        ESP_INTR_ENABLE(ETS_FROM_CPU_INUM);
-
 }
 
 void esp_crosscore_int_send_yield(int coreId) {
index a1e5f8b953c7934677ba7a6ed0a6dd2da0e6bd0f..b9561aa5db15443d11f8bb5aefdfc5da540d8f2d 160000 (submodule)
@@ -1 +1 @@
-Subproject commit a1e5f8b953c7934677ba7a6ed0a6dd2da0e6bd0f
+Subproject commit b9561aa5db15443d11f8bb5aefdfc5da540d8f2d