Reorder DynAsm macros (no other changes)

diff --git a/ext/opcache/jit/zend_jit_x86.dasc b/ext/opcache/jit/zend_jit_x86.dasc
index 58149c902932a255658d3e41a471e1c3019acd3a..aa3488d8642db2762c0b311885b4ec772f0203ea 100644 (file)
--- a/ext/opcache/jit/zend_jit_x86.dasc
+++ b/ext/opcache/jit/zend_jit_x86.dasc
@@ -228,80 +228,6 @@ static void* dasm_labels[zend_lb_MAX];
 |      .endif
 |.endmacro
 
-|.macro SAVE_OPLINE
-||     if (GCC_GLOBAL_REGS) {
-|              mov aword EX->opline, IP
-||     }
-|.endmacro
-
-|.macro LOAD_OPLINE
-||     if (GCC_GLOBAL_REGS) {
-|              mov IP, aword EX->opline
-||     }
-|.endmacro
-
-|.macro LOAD_IP_ADDR, addr
-||     if (GCC_GLOBAL_REGS) {
-|              LOAD_ADDR IP, addr
-||     } else {
-|              LOAD_ADDR RX, addr
-|              mov aword EX->opline, RX
-||     }
-|.endmacro
-
-|.macro LOAD_IP_ADDR_ZTS, struct, field
-|      .if ZTS
-||             if (GCC_GLOBAL_REGS) {
-|                      LOAD_TSRM_CACHE IP
-|                      mov IP, aword [IP + (struct.._offset + offsetof(zend_..struct, field))]
-||             } else {
-|                      LOAD_TSRM_CACHE RX
-|                      lea RX, aword [RX + (struct.._offset + offsetof(zend_..struct, field))]
-|                      mov aword EX->opline, RX
-||             }
-|      .else
-|              LOAD_IP_ADDR &struct.field
-|      .endif
-|.endmacro
-
-|.macro GET_IP, reg
-||     if (GCC_GLOBAL_REGS) {
-|              mov reg, IP
-||     } else {
-|              mov reg, aword EX->opline
-||     }
-|.endmacro
-
-|.macro ADD_IP, val
-||     if (GCC_GLOBAL_REGS) {
-|              add IP, val
-||     } else {
-|              add aword EX->opline, val
-||     }
-|.endmacro
-
-|.macro JMP_IP
-||     if (GCC_GLOBAL_REGS) {
-|              jmp aword [IP]
-||     } else {
-|              mov r0, aword EX:FCARG1a->opline
-|              jmp aword [r0]
-||     }
-|.endmacro
-
-/* In 64-bit build we compare only low 32-bits.
- * x86_64 cmp instruction doesn't support immediate 64-bit operand, and full
- * comparison would require an additional load of 64-bit address into register.
- * This is not a problem at all, while JIT buffer size is less than 4GB.
- */
-|.macro CMP_IP, addr
-||     if (GCC_GLOBAL_REGS) {
-|              cmp IPl, addr
-||     } else {
-|              cmp dword EX->opline, addr
-||     }
-|.endmacro
-
 |.macro ADDR_OP1, addr_ins, addr, tmp_reg
 |      .if X64
 ||             if (IS_32BIT(addr)) {
@@ -455,6 +381,80 @@ static void* dasm_labels[zend_lb_MAX];
 |      .endif
 |.endmacro
 
+|.macro SAVE_OPLINE
+||     if (GCC_GLOBAL_REGS) {
+|              mov aword EX->opline, IP
+||     }
+|.endmacro
+
+|.macro LOAD_OPLINE
+||     if (GCC_GLOBAL_REGS) {
+|              mov IP, aword EX->opline
+||     }
+|.endmacro
+
+|.macro LOAD_IP_ADDR, addr
+||     if (GCC_GLOBAL_REGS) {
+|              LOAD_ADDR IP, addr
+||     } else {
+|              LOAD_ADDR RX, addr
+|              mov aword EX->opline, RX
+||     }
+|.endmacro
+
+|.macro LOAD_IP_ADDR_ZTS, struct, field
+|      .if ZTS
+||             if (GCC_GLOBAL_REGS) {
+|                      LOAD_TSRM_CACHE IP
+|                      mov IP, aword [IP + (struct.._offset + offsetof(zend_..struct, field))]
+||             } else {
+|                      LOAD_TSRM_CACHE RX
+|                      lea RX, aword [RX + (struct.._offset + offsetof(zend_..struct, field))]
+|                      mov aword EX->opline, RX
+||             }
+|      .else
+|              LOAD_IP_ADDR &struct.field
+|      .endif
+|.endmacro
+
+|.macro GET_IP, reg
+||     if (GCC_GLOBAL_REGS) {
+|              mov reg, IP
+||     } else {
+|              mov reg, aword EX->opline
+||     }
+|.endmacro
+
+|.macro ADD_IP, val
+||     if (GCC_GLOBAL_REGS) {
+|              add IP, val
+||     } else {
+|              add aword EX->opline, val
+||     }
+|.endmacro
+
+|.macro JMP_IP
+||     if (GCC_GLOBAL_REGS) {
+|              jmp aword [IP]
+||     } else {
+|              mov r0, aword EX:FCARG1a->opline
+|              jmp aword [r0]
+||     }
+|.endmacro
+
+/* In 64-bit build we compare only low 32-bits.
+ * x86_64 cmp instruction doesn't support immediate 64-bit operand, and full
+ * comparison would require an additional load of 64-bit address into register.
+ * This is not a problem at all, while JIT buffer size is less than 4GB.
+ */
+|.macro CMP_IP, addr
+||     if (GCC_GLOBAL_REGS) {
+|              cmp IPl, addr
+||     } else {
+|              cmp dword EX->opline, addr
+||     }
+|.endmacro
+
 |.macro LOAD_ZVAL_ADDR, reg, addr
 ||     if (Z_MODE(addr) == IS_CONST_ZVAL) {
 |              LOAD_ADDR reg, Z_ZV(addr)