[AArch64] Add nvcast patterns for v2f32 -> v1f64

Summary: Constant stores of f32 values can create such NvCast nodes.

Reviewers: t.p.northover

Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D62285

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361584 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64InstrInfo.td b/lib/Target/AArch64/AArch64InstrInfo.td
index f426da4f1c8329ca4be6406a3b574c0e7aaea6fd..8b702901d51a97e2c1e785d051f3e6687e263891 100644 (file)
--- a/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/lib/Target/AArch64/AArch64InstrInfo.td
@@ -6203,6 +6203,7 @@ def : Pat<(v4i16 (AArch64NvCast (v2f32 FPR64:$src))), (v4i16 FPR64:$src)>;
 def : Pat<(v2i32 (AArch64NvCast (v2f32 FPR64:$src))), (v2i32 FPR64:$src)>;
 def : Pat<(v2f32 (AArch64NvCast (v2f32 FPR64:$src))), (v2f32 FPR64:$src)>;
 def : Pat<(v1i64 (AArch64NvCast (v2f32 FPR64:$src))), (v1i64 FPR64:$src)>;
+def : Pat<(v1f64 (AArch64NvCast (v2f32 FPR64:$src))), (v1f64 FPR64:$src)>;
 
 // Natural vector casts (128 bit)
 def : Pat<(v16i8 (AArch64NvCast (v4i32 FPR128:$src))), (v16i8 FPR128:$src)>;

diff --git a/test/CodeGen/AArch64/arm64-nvcast.ll b/test/CodeGen/AArch64/arm64-nvcast.ll
index d9486127bf11c26222d62610146f3cd2bde63ed6..59b956c7d90c1895b01bb55145450ef3d1a13e9b 100644 (file)
--- a/test/CodeGen/AArch64/arm64-nvcast.ll
+++ b/test/CodeGen/AArch64/arm64-nvcast.ll
@@ -47,3 +47,15 @@ entry:
   store <2 x float> <float 0xC7DFDFDFC0000000, float 0xC7DFDFDFC0000000>, <2 x float>* bitcast (%"st1"* @_gv to <2 x float>*), align 8
   ret void
 }
+
+%struct.Vector3 = type { float, float, float }
+
+define void @nvcast_v2f32_v1f64(%struct.Vector3*) {
+; CHECK-LABEL: _nvcast_v2f32_v1f64
+; CHECK: fmov.2s v[[REG:[0-9]+]], #1.00000000
+; CHECK: str d[[REG]], [x0]
+entry:
+  %a13 = bitcast %struct.Vector3* %0 to <1 x double>*
+  store <1 x double> <double 0x3F8000003F800000>, <1 x double>* %a13, align 8
+  ret void
+}