[SystemZ] Add missing arithmetic instructions

This adds the remaining general arithmetic instructions
for assembler / disassembler use.  Most of these are not
useful for codegen; a few might be, and those are listed
in the README.txt for future improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302665 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/README.txt b/lib/Target/SystemZ/README.txt
index 86a1322c9e2305567b1b4e80e3b303f5b205e5b2..74cf653b9d95c53b82268eb2cc371c880c7687db 100644 (file)
--- a/lib/Target/SystemZ/README.txt
+++ b/lib/Target/SystemZ/README.txt
@@ -63,7 +63,7 @@ via a register.)
 
 --
 
-We don't use ICM or STCM.
+We don't use ICM, STCM, or CLM.
 
 --
 

diff --git a/lib/Target/SystemZ/SystemZInstrFP.td b/lib/Target/SystemZ/SystemZInstrFP.td
index bb6d27e248287c0e4d196cc381f6d27e7c54d00d..364b81f98eed6086f6aa7f62e1e6e596c5c81e77 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrFP.td
+++ b/lib/Target/SystemZ/SystemZInstrFP.td
@@ -458,6 +458,12 @@ def DXBR : BinaryRRE<"dxbr", 0xB34D, fdiv, FP128, FP128>;
 def DEB : BinaryRXE<"deb", 0xED0D, fdiv, FP32, load, 4>;
 def DDB : BinaryRXE<"ddb", 0xED1D, fdiv, FP64, load, 8>;
 
+// Divide to integer.
+let Defs = [CC] in {
+  def DIEBR : TernaryRRFb<"diebr", 0xB353, FP32, FP32, FP32>;
+  def DIDBR : TernaryRRFb<"didbr", 0xB35B, FP64, FP64, FP64>;
+}
+
 //===----------------------------------------------------------------------===//
 // Comparisons
 //===----------------------------------------------------------------------===//
@@ -469,6 +475,13 @@ let Defs = [CC], CCValues = 0xF in {
 
   def CEB : CompareRXE<"ceb", 0xED09, z_fcmp, FP32, load, 4>;
   def CDB : CompareRXE<"cdb", 0xED19, z_fcmp, FP64, load, 8>;
+
+  def KEBR : CompareRRE<"kebr", 0xB308, null_frag, FP32,  FP32>;
+  def KDBR : CompareRRE<"kdbr", 0xB318, null_frag, FP64,  FP64>;
+  def KXBR : CompareRRE<"kxbr", 0xB348, null_frag, FP128, FP128>;
+
+  def KEB : CompareRXE<"keb", 0xED08, null_frag, FP32, load, 4>;
+  def KDB : CompareRXE<"kdb", 0xED18, null_frag, FP64, load, 8>;
 }
 
 // Test Data Class.

diff --git a/lib/Target/SystemZ/SystemZInstrFormats.td b/lib/Target/SystemZ/SystemZInstrFormats.td
index 2bdcfac060a9abb1f1e61d0f34d7c6c5545e3a9b..624e615c30ed7ff1a4fb1485af8895cca7d5729f 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrFormats.td
+++ b/lib/Target/SystemZ/SystemZInstrFormats.td
@@ -2151,6 +2151,13 @@ multiclass LoadMultipleRSPair<string mnemonic, bits<8> rsOpcode,
   }
 }
 
+class LoadMultipleSSe<string mnemonic, bits<8> opcode, RegisterOperand cls>
+  : InstSSe<opcode, (outs cls:$R1, cls:$R3),
+            (ins bdaddr12only:$BD2, bdaddr12only:$BD4),
+            mnemonic#"\t$R1, $R3, $BD2, $BD4", []> {
+  let mayLoad = 1;
+}
+
 class LoadMultipleVRSa<string mnemonic, bits<16> opcode>
   : InstVRSa<opcode, (outs VR128:$V1, VR128:$V3), (ins bdaddr12only:$BD2),
              mnemonic#"\t$V1, $V3, $BD2", []> {
@@ -3248,6 +3255,34 @@ class BinaryVRX<string mnemonic, bits<16> opcode, SDPatternOperator operator,
   let AccessBytes = bytes;
 }
 
+class StoreBinaryRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
+                    bits<5> bytes, AddressingMode mode = bdaddr12only>
+  : InstRSb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, mode:$BD2),
+            mnemonic#"\t$R1, $M3, $BD2", []> {
+  let mayStore = 1;
+  let AccessBytes = bytes;
+}
+
+class StoreBinaryRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
+                     bits<5> bytes, AddressingMode mode = bdaddr20only>
+  : InstRSYb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, mode:$BD2),
+             mnemonic#"\t$R1, $M3, $BD2", []> {
+  let mayStore = 1;
+  let AccessBytes = bytes;
+}
+
+multiclass StoreBinaryRSPair<string mnemonic, bits<8> rsOpcode,
+                             bits<16> rsyOpcode, RegisterOperand cls,
+                             bits<5> bytes> {
+  let DispKey = mnemonic ## #cls in {
+    let DispSize = "12" in
+      def "" : StoreBinaryRS<mnemonic, rsOpcode, cls, bytes, bdaddr12pair>;
+    let DispSize = "20" in
+      def Y  : StoreBinaryRSY<mnemonic#"y", rsyOpcode, cls, bytes,
+                              bdaddr20pair>;
+  }
+}
+
 class StoreBinaryVRV<string mnemonic, bits<16> opcode, bits<5> bytes,
                      Immediate index>
   : InstVRV<opcode, (outs), (ins VR128:$V1, bdvaddr12only:$VBD2, index:$M3),
@@ -3373,6 +3408,32 @@ multiclass CompareRXPair<string mnemonic, bits<8> rxOpcode, bits<16> rxyOpcode,
   }
 }
 
+class CompareRS<string mnemonic, bits<8> opcode, RegisterOperand cls,
+                bits<5> bytes, AddressingMode mode = bdaddr12only>
+  : InstRSb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, mode:$BD2),
+            mnemonic#"\t$R1, $M3, $BD2", []> {
+  let mayLoad = 1;
+  let AccessBytes = bytes;
+}
+
+class CompareRSY<string mnemonic, bits<16> opcode, RegisterOperand cls,
+                 bits<5> bytes, AddressingMode mode = bdaddr20only>
+  : InstRSYb<opcode, (outs), (ins cls:$R1, imm32zx4:$M3, mode:$BD2),
+             mnemonic#"\t$R1, $M3, $BD2", []> {
+  let mayLoad = 1;
+  let AccessBytes = bytes;
+}
+
+multiclass CompareRSPair<string mnemonic, bits<8> rsOpcode, bits<16> rsyOpcode,
+                         RegisterOperand cls, bits<5> bytes> {
+  let DispKey = mnemonic ## #cls in {
+    let DispSize = "12" in
+      def "" : CompareRS<mnemonic, rsOpcode, cls, bytes, bdaddr12pair>;
+    let DispSize = "20" in
+      def Y  : CompareRSY<mnemonic#"y", rsyOpcode, cls, bytes, bdaddr20pair>;
+  }
+}
+
 class CompareSSb<string mnemonic, bits<8> opcode>
   : InstSSb<opcode,
             (outs), (ins bdladdr12onlylen4:$BDL1, bdladdr12onlylen4:$BDL2),
@@ -3509,6 +3570,16 @@ class SideEffectTernarySSF<string mnemonic, bits<12> opcode,
             (ins bdaddr12only:$BD1, bdaddr12only:$BD2, cls:$R3),
             mnemonic#"\t$BD1, $BD2, $R3", []>;
 
+class TernaryRRFb<string mnemonic, bits<16> opcode,
+                  RegisterOperand cls1, RegisterOperand cls2,
+                  RegisterOperand cls3>
+  : InstRRFb<opcode, (outs cls1:$R1, cls3:$R3),
+             (ins cls1:$R1src, cls2:$R2, imm32zx4:$M4),
+             mnemonic#"\t$R1, $R3, $R2, $M4", []> {
+  let Constraints = "$R1 = $R1src";
+  let DisableEncoding = "$R1src";
+}
+
 class TernaryRRFe<string mnemonic, bits<16> opcode, RegisterOperand cls1,
                   RegisterOperand cls2>
   : InstRRFe<opcode, (outs cls1:$R1),

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index 2c93d2bb20ea54a37ab11891f60449a54512afae..001bac273d9b7044108538a7d89792019b3f9117 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -712,6 +712,10 @@ def  : StoreGR64PC<STHRL, aligned_truncstorei16>;
 defm : StoreGR64Pair<ST, STY, truncstorei32>;
 def  : StoreGR64PC<STRL, aligned_truncstorei32>;
 
+// Store characters under mask -- not (yet) used for codegen.
+defm STCM : StoreBinaryRSPair<"stcm", 0xBE, 0xEB2D, GR32, 0>;
+def STCMH : StoreBinaryRSY<"stcmh", 0xEB2C, GRH32, 0>;
+
 //===----------------------------------------------------------------------===//
 // Multi-register moves
 //===----------------------------------------------------------------------===//
@@ -720,6 +724,7 @@ def  : StoreGR64PC<STRL, aligned_truncstorei32>;
 defm LM : LoadMultipleRSPair<"lm", 0x98, 0xEB98, GR32>;
 def LMG : LoadMultipleRSY<"lmg", 0xEB04, GR64>;
 def LMH : LoadMultipleRSY<"lmh", 0xEB96, GRH32>;
+def LMD : LoadMultipleSSe<"lmd", 0xEF, GR64>;
 
 // Multi-register stores.
 defm STM : StoreMultipleRSPair<"stm", 0x90, 0xEB90, GR32>;
@@ -825,6 +830,7 @@ defm : InsertMem<"inserti8", IC32Y, GR32, azextloadi8, bdxaddr20pair>;
 defm : InsertMem<"inserti8", IC,  GR64, azextloadi8, bdxaddr12pair>;
 defm : InsertMem<"inserti8", ICY, GR64, azextloadi8, bdxaddr20pair>;
 
+// Insert characters under mask -- not (yet) used for codegen.
 let Defs = [CC] in {
   defm ICM : TernaryRSPair<"icm", 0xBF, 0xEB81, GR32, 0>;
   def ICMH : TernaryRSY<"icmh", 0xEB80, GRH32, 0>;
@@ -928,6 +934,10 @@ let Defs = [CC] in {
   defm AL   : BinaryRXPair<"al", 0x5E, 0xE35E, addc, GR32, load, 4>;
   def  ALGF : BinaryRXY<"algf", 0xE31A, addc, GR64, azextloadi32, 4>;
   def  ALG  : BinaryRXY<"alg",  0xE30A, addc, GR64, load, 8>;
+
+  // Addition to memory.
+  def ALSI  : BinarySIY<"alsi",  0xEB6E, null_frag, imm32sx8>;
+  def ALGSI : BinarySIY<"algsi", 0xEB7E, null_frag, imm64sx8>;
 }
 defm : ZXB<addc, GR64, ALGFR>;
 
@@ -1175,9 +1185,14 @@ def  MSGF : BinaryRXY<"msgf", 0xE31C, mul, GR64, asextloadi32, 4>;
 def  MSG  : BinaryRXY<"msg",  0xE30C, mul, GR64, load, 8>;
 
 // Multiplication of a register, producing two results.
+def MR   : BinaryRR <"mr",   0x1C,   null_frag, GR128, GR32>;
+def MLR  : BinaryRRE<"mlr",  0xB996, null_frag, GR128, GR32>;
 def MLGR : BinaryRRE<"mlgr", 0xB986, z_umul_lohi64, GR128, GR64>;
 
 // Multiplication of memory, producing two results.
+def M   : BinaryRX <"m",   0x5C,   null_frag, GR128, load, 4>;
+def MFY : BinaryRXY<"mfy", 0xE35C, null_frag, GR128, load, 4>;
+def ML  : BinaryRXY<"ml",  0xE396, null_frag, GR128, load, 4>;
 def MLG : BinaryRXY<"mlg", 0xE386, z_umul_lohi64, GR128, load, 8>;
 
 //===----------------------------------------------------------------------===//
@@ -1186,12 +1201,14 @@ def MLG : BinaryRXY<"mlg", 0xE386, z_umul_lohi64, GR128, load, 8>;
 
 let hasSideEffects = 1 in {  // Do not speculatively execute.
   // Division and remainder, from registers.
+  def DR    : BinaryRR <"dr",    0x1D,   null_frag,   GR128, GR32>;
   def DSGFR : BinaryRRE<"dsgfr", 0xB91D, z_sdivrem32, GR128, GR32>;
   def DSGR  : BinaryRRE<"dsgr",  0xB90D, z_sdivrem64, GR128, GR64>;
   def DLR   : BinaryRRE<"dlr",   0xB997, z_udivrem32, GR128, GR32>;
   def DLGR  : BinaryRRE<"dlgr",  0xB987, z_udivrem64, GR128, GR64>;
 
   // Division and remainder, from memory.
+  def D    : BinaryRX <"d",    0x5D,   null_frag,   GR128, load, 4>;
   def DSGF : BinaryRXY<"dsgf", 0xE31D, z_sdivrem32, GR128, load, 4>;
   def DSG  : BinaryRXY<"dsg",  0xE30D, z_sdivrem64, GR128, load, 8>;
   def DL   : BinaryRXY<"dl",   0xE397, z_udivrem32, GR128, load, 4>;
@@ -1202,23 +1219,32 @@ let hasSideEffects = 1 in {  // Do not speculatively execute.
 // Shifts
 //===----------------------------------------------------------------------===//
 
-// Shift left.
+// Logical shift left.
 let hasSideEffects = 0 in {
   defm SLL : BinaryRSAndK<"sll", 0x89, 0xEBDF, shl, GR32>;
-  defm SLA : BinaryRSAndK<"sla", 0x8B, 0xEBDD, null_frag, GR32>;
   def SLLG : BinaryRSY<"sllg", 0xEB0D, shl, GR64>;
+  def SLDL : BinaryRS<"sldl", 0x8D, null_frag, GR128>;
+}
+
+// Arithmetic shift left.
+let Defs = [CC] in {
+  defm SLA : BinaryRSAndK<"sla", 0x8B, 0xEBDD, null_frag, GR32>;
+  def SLAG : BinaryRSY<"slag", 0xEB0B, null_frag, GR64>;
+  def SLDA : BinaryRS<"slda", 0x8F, null_frag, GR128>;
 }
 
 // Logical shift right.
 let hasSideEffects = 0 in {
   defm SRL : BinaryRSAndK<"srl", 0x88, 0xEBDE, srl, GR32>;
   def SRLG : BinaryRSY<"srlg", 0xEB0C, srl, GR64>;
+  def SRDL : BinaryRS<"srdl", 0x8C, null_frag, GR128>;
 }
 
 // Arithmetic shift right.
 let Defs = [CC], CCValues = 0xE, CompareZeroCCMask = 0xE in {
   defm SRA : BinaryRSAndK<"sra", 0x8A, 0xEBDC, sra, GR32>;
   def SRAG : BinaryRSY<"srag", 0xEB0A, sra, GR64>;
+  def SRDA : BinaryRS<"srda", 0x8E, null_frag, GR128>;
 }
 
 // Rotate left.
@@ -1394,6 +1420,12 @@ let Defs = [CC] in {
 def TML : InstAlias<"tml\t$R, $I", (TMLL GR32:$R, imm32ll16:$I), 0>;
 def TMH : InstAlias<"tmh\t$R, $I", (TMLH GR32:$R, imm32lh16:$I), 0>;
 
+// Compare logical characters under mask -- not (yet) used for codegen.
+let Defs = [CC] in {
+  defm CLM : CompareRSPair<"clm", 0xBD, 0xEB21, GR32, 0>;
+  def CLMH : CompareRSY<"clmh", 0xEB20, GRH32, 0>;
+}
+
 //===----------------------------------------------------------------------===//
 // Prefetch and execution hint
 //===----------------------------------------------------------------------===//

diff --git a/lib/Target/SystemZ/SystemZScheduleZ13.td b/lib/Target/SystemZ/SystemZScheduleZ13.td
index 858f62cc7a2f34453af93b0febad046f95302881..fa9961e684a052c2923dcdfa3551fb65a8c1efc6 100644 (file)
--- a/lib/Target/SystemZ/SystemZScheduleZ13.td
+++ b/lib/Target/SystemZ/SystemZScheduleZ13.td
@@ -271,6 +271,7 @@ def : InstRW<[FXb, LSU, Lat5], (instregex "LLG(F|T)?AT$")>;
 
 def : InstRW<[FXb, LSU, Lat5], (instregex "STC(H|Y|Mux)?$")>;
 def : InstRW<[FXb, LSU, Lat5], (instregex "STH(H|Y|RL|Mux)?$")>;
+def : InstRW<[FXb, LSU, Lat5], (instregex "STCM(H|Y)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Multi-register moves
@@ -280,6 +281,9 @@ def : InstRW<[FXb, LSU, Lat5], (instregex "STH(H|Y|RL|Mux)?$")>;
 def : InstRW<[LSU, LSU, LSU, LSU, LSU, Lat10, GroupAlone],
              (instregex "LM(H|Y|G)?$")>;
 
+// Load multiple disjoint
+def : InstRW<[FXb, Lat30, GroupAlone], (instregex "LMD$")>;
+
 // Store multiple (estimated average of ceil(5/2) FXb ops)
 def : InstRW<[LSU, LSU, FXb, FXb, FXb, Lat10,
               GroupAlone], (instregex "STM(G|H|Y)?$")>;
@@ -349,7 +353,7 @@ def : InstRW<[FXa], (instregex "ALGF(I|R)$")>;
 def : InstRW<[FXa], (instregex "ALGR(K)?$")>;
 def : InstRW<[FXa], (instregex "ALR(K)?$")>;
 def : InstRW<[FXa], (instregex "AR(K)?$")>;
-def : InstRW<[FXb, LSU, Lat5], (instregex "A(G)?SI$")>;
+def : InstRW<[FXb, LSU, Lat5], (instregex "A(L)?(G)?SI$")>;
 
 // Logical addition with carry
 def : InstRW<[FXa, LSU, Lat6, GroupAlone], (instregex "ALC(G)?$")>;
@@ -442,11 +446,15 @@ def : InstRW<[FXa, Lat9, GroupAlone], (instregex "MLGR$")>;
 def : InstRW<[FXa, Lat5], (instregex "MGHI$")>;
 def : InstRW<[FXa, Lat5], (instregex "MHI$")>;
 def : InstRW<[FXa, LSU, Lat9], (instregex "MH(Y)?$")>;
+def : InstRW<[FXa, Lat7, GroupAlone], (instregex "M(L)?R$")>;
+def : InstRW<[FXa, LSU, Lat7, GroupAlone], (instregex "M(FY|L)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Division and remainder
 //===----------------------------------------------------------------------===//
 
+def : InstRW<[FXa2, FXa2, Lat20, GroupAlone], (instregex "DR$")>;
+def : InstRW<[FXa2, FXa2, LSU, Lat30, GroupAlone], (instregex "D$")>;
 def : InstRW<[FXa, Lat30, GroupAlone], (instregex "DSG(F)?R$")>;
 def : InstRW<[LSU, FXa, Lat30, GroupAlone], (instregex "DSG(F)?$")>;
 def : InstRW<[FXa2, FXa2, Lat20, GroupAlone], (instregex "DLR$")>;
@@ -460,7 +468,8 @@ def : InstRW<[FXa2, FXa2, LSU, Lat30, GroupAlone], (instregex "DL(G)?$")>;
 def : InstRW<[FXa], (instregex "SLL(G|K)?$")>;
 def : InstRW<[FXa], (instregex "SRL(G|K)?$")>;
 def : InstRW<[FXa], (instregex "SRA(G|K)?$")>;
-def : InstRW<[FXa], (instregex "SLA(K)?$")>;
+def : InstRW<[FXa], (instregex "SLA(G|K)?$")>;
+def : InstRW<[FXa, FXa, FXa, FXa, Lat8], (instregex "S(L|R)D(A|L)$")>;
 
 // Rotate
 def : InstRW<[FXa, LSU, Lat6], (instregex "RLL(G)?$")>;
@@ -520,6 +529,9 @@ def : InstRW<[FXb], (instregex "TMHL(64)?$")>;
 def : InstRW<[FXb], (instregex "TMLH(64)?$")>;
 def : InstRW<[FXb], (instregex "TMLL(64)?$")>;
 
+// Compare logical characters under mask
+def : InstRW<[FXb, LSU, Lat5], (instregex "CLM(H|Y)?$")>;
+
 //===----------------------------------------------------------------------===//
 // Prefetch and execution hint
 //===----------------------------------------------------------------------===//
@@ -853,14 +865,17 @@ def : InstRW<[VecFPd, LSU], (instregex "D(E|D)B$")>;
 def : InstRW<[VecFPd], (instregex "D(E|D)BR$")>;
 def : InstRW<[VecFPd, VecFPd, GroupAlone], (instregex "DXBR$")>;
 
+// Divide to integer
+def : InstRW<[VecFPd, Lat30, GroupAlone], (instregex "DI(E|D)BR$")>;
+
 //===----------------------------------------------------------------------===//
 // FP: Comparisons
 //===----------------------------------------------------------------------===//
 
 // Compare
-def : InstRW<[VecXsPm, LSU, Lat8], (instregex "C(E|D)B$")>;
-def : InstRW<[VecXsPm, Lat4], (instregex "C(E|D)BR?$")>;
-def : InstRW<[VecDF, VecDF, Lat20, GroupAlone], (instregex "CXBR$")>;
+def : InstRW<[VecXsPm, LSU, Lat8], (instregex "(K|C)(E|D)B$")>;
+def : InstRW<[VecXsPm, Lat4], (instregex "(K|C)(E|D)BR?$")>;
+def : InstRW<[VecDF, VecDF, Lat20, GroupAlone], (instregex "(K|C)XBR$")>;
 
 // Test Data Class
 def : InstRW<[LSU, VecXsPm, Lat9], (instregex "TC(E|D)B$")>;

diff --git a/lib/Target/SystemZ/SystemZScheduleZ196.td b/lib/Target/SystemZ/SystemZScheduleZ196.td
index 0c4a0dbbe66638e7fd4430167a3ca7e6f151bb12..f39f606366249c6b114d5c4c95f8fc523e994253 100644 (file)
--- a/lib/Target/SystemZ/SystemZScheduleZ196.td
+++ b/lib/Target/SystemZ/SystemZScheduleZ196.td
@@ -230,6 +230,7 @@ def : InstRW<[LSU], (instregex "LLG(C|F|H|T|FRL|HRL)$")>;
 
 def : InstRW<[FXU, LSU, Lat5], (instregex "STC(H|Y|Mux)?$")>;
 def : InstRW<[FXU, LSU, Lat5], (instregex "STH(H|Y|RL|Mux)?$")>;
+def : InstRW<[FXU, LSU, Lat5], (instregex "STCM(H|Y)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Multi-register moves
@@ -239,6 +240,9 @@ def : InstRW<[FXU, LSU, Lat5], (instregex "STH(H|Y|RL|Mux)?$")>;
 def : InstRW<[LSU, LSU, LSU, LSU, LSU, Lat10, GroupAlone],
              (instregex "LM(H|Y|G)?$")>;
 
+// Load multiple disjoint
+def : InstRW<[LSU, Lat30, GroupAlone], (instregex "LMD$")>;
+
 // Store multiple (estimated average of 3 ops)
 def : InstRW<[LSU, LSU, FXU, FXU, FXU, Lat10, GroupAlone],
              (instregex "STM(H|Y|G)?$")>;
@@ -290,7 +294,7 @@ def : InstRW<[FXU], (instregex "IILL(64)?$")>;
 // Addition
 //===----------------------------------------------------------------------===//
 
-def : InstRW<[FXU, LSU, Lat5], (instregex "A(Y|SI)?$")>;
+def : InstRW<[FXU, LSU, Lat5], (instregex "A(L)?(Y|SI)?$")>;
 def : InstRW<[FXU, FXU, LSU, Lat6, GroupAlone], (instregex "AH(Y)?$")>;
 def : InstRW<[FXU], (instregex "AIH$")>;
 def : InstRW<[FXU], (instregex "AFI(Mux)?$")>;
@@ -299,15 +303,14 @@ def : InstRW<[FXU], (instregex "AGHI(K)?$")>;
 def : InstRW<[FXU], (instregex "AGR(K)?$")>;
 def : InstRW<[FXU], (instregex "AHI(K)?$")>;
 def : InstRW<[FXU], (instregex "AHIMux(K)?$")>;
-def : InstRW<[FXU, LSU, Lat5], (instregex "AL(Y)?$")>;
 def : InstRW<[FXU], (instregex "AL(FI|HSIK)$")>;
-def : InstRW<[FXU, LSU, Lat5], (instregex "ALG(F)?$")>;
+def : InstRW<[FXU, LSU, Lat5], (instregex "ALGF$")>;
 def : InstRW<[FXU], (instregex "ALGHSIK$")>;
 def : InstRW<[FXU], (instregex "ALGF(I|R)$")>;
 def : InstRW<[FXU], (instregex "ALGR(K)?$")>;
 def : InstRW<[FXU], (instregex "ALR(K)?$")>;
 def : InstRW<[FXU], (instregex "AR(K)?$")>;
-def : InstRW<[FXU, LSU, Lat5], (instregex "AG(SI)?$")>;
+def : InstRW<[FXU, LSU, Lat5], (instregex "A(L)?G(SI)?$")>;
 
 // Logical addition with carry
 def : InstRW<[FXU, LSU, Lat7, GroupAlone], (instregex "ALC(G)?$")>;
@@ -400,11 +403,17 @@ def : InstRW<[FXU, Lat9, GroupAlone], (instregex "MLGR$")>;
 def : InstRW<[FXU, Lat5], (instregex "MGHI$")>;
 def : InstRW<[FXU, Lat5], (instregex "MHI$")>;
 def : InstRW<[FXU, LSU, Lat9], (instregex "MH(Y)?$")>;
+def : InstRW<[FXU, Lat7, GroupAlone], (instregex "M(L)?R$")>;
+def : InstRW<[FXU, LSU, Lat7, GroupAlone], (instregex "M(FY|L)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Division and remainder
 //===----------------------------------------------------------------------===//
 
+def : InstRW<[FPU2, FPU2, FXU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
+              (instregex "DR$")>;
+def : InstRW<[FPU2, FPU2, LSU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
+              (instregex "D$")>;
 def : InstRW<[FPU2, FPU2, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
               (instregex "DSG(F)?R$")>;
 def : InstRW<[FPU2, FPU2, LSU, FXU, FXU, FXU, Lat30, GroupAlone],
@@ -421,7 +430,8 @@ def : InstRW<[FPU2, FPU2, LSU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
 def : InstRW<[FXU], (instregex "SLL(G|K)?$")>;
 def : InstRW<[FXU], (instregex "SRL(G|K)?$")>;
 def : InstRW<[FXU], (instregex "SRA(G|K)?$")>;
-def : InstRW<[FXU, Lat2], (instregex "SLA(K)?$")>;
+def : InstRW<[FXU, Lat2], (instregex "SLA(G|K)?$")>;
+def : InstRW<[FXU, FXU, FXU, FXU, Lat8], (instregex "S(L|R)D(A|L)$")>;
 
 // Rotate
 def : InstRW<[FXU, LSU, Lat6], (instregex "RLL(G)?$")>;
@@ -481,6 +491,9 @@ def : InstRW<[FXU], (instregex "TMHL(64)?$")>;
 def : InstRW<[FXU], (instregex "TMLH(64)?$")>;
 def : InstRW<[FXU], (instregex "TMLL(64)?$")>;
 
+// Compare logical characters under mask
+def : InstRW<[FXU, LSU, Lat5], (instregex "CLM(H|Y)?$")>;
+
 //===----------------------------------------------------------------------===//
 // Prefetch
 //===----------------------------------------------------------------------===//
@@ -783,14 +796,17 @@ def : InstRW<[FPU, LSU, Lat30], (instregex "D(E|D)B$")>;
 def : InstRW<[FPU, Lat30], (instregex "D(E|D)BR$")>;
 def : InstRW<[FPU2, FPU2, Lat30, GroupAlone], (instregex "DXBR$")>;
 
+// Divide to integer
+def : InstRW<[FPU, Lat30, GroupAlone], (instregex "DI(E|D)BR$")>;
+
 //===----------------------------------------------------------------------===//
 // FP: Comparisons
 //===----------------------------------------------------------------------===//
 
 // Compare
-def : InstRW<[FPU, LSU, Lat12], (instregex "C(E|D)B$")>;
-def : InstRW<[FPU], (instregex "C(E|D)BR$")>;
-def : InstRW<[FPU, FPU, Lat30], (instregex "CXBR$")>;
+def : InstRW<[FPU, LSU, Lat12], (instregex "(K|C)(E|D)B$")>;
+def : InstRW<[FPU], (instregex "(K|C)(E|D)BR$")>;
+def : InstRW<[FPU, FPU, Lat30], (instregex "(K|C)XBR$")>;
 
 // Test Data Class
 def : InstRW<[FPU, LSU, Lat15], (instregex "TC(E|D)B$")>;

diff --git a/lib/Target/SystemZ/SystemZScheduleZEC12.td b/lib/Target/SystemZ/SystemZScheduleZEC12.td
index 03865418499956d34eed0a752d7a589ea0b239a4..e4130cefd9db4470ce741bb96e1f24c224838d84 100644 (file)
--- a/lib/Target/SystemZ/SystemZScheduleZEC12.td
+++ b/lib/Target/SystemZ/SystemZScheduleZEC12.td
@@ -240,6 +240,7 @@ def : InstRW<[FXU, LSU, Lat5], (instregex "LLG(F|T)?AT$")>;
 
 def : InstRW<[FXU, LSU, Lat5], (instregex "STC(H|Y|Mux)?$")>;
 def : InstRW<[FXU, LSU, Lat5], (instregex "STH(H|Y|RL|Mux)?$")>;
+def : InstRW<[FXU, LSU, Lat5], (instregex "STCM(H|Y)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Multi-register moves
@@ -249,6 +250,9 @@ def : InstRW<[FXU, LSU, Lat5], (instregex "STH(H|Y|RL|Mux)?$")>;
 def : InstRW<[LSU, LSU, LSU, LSU, LSU, Lat10, GroupAlone],
              (instregex "LM(H|Y|G)?$")>;
 
+// Load multiple disjoint
+def : InstRW<[FXU, Lat30, GroupAlone], (instregex "LMD$")>;
+
 // Store multiple (estimated average of 3 ops)
 def : InstRW<[LSU, LSU, FXU, FXU, FXU, Lat10, GroupAlone],
              (instregex "STM(H|Y|G)?$")>;
@@ -300,7 +304,7 @@ def : InstRW<[FXU], (instregex "IILL(64)?$")>;
 // Addition
 //===----------------------------------------------------------------------===//
 
-def : InstRW<[FXU, LSU, Lat5], (instregex "A(Y|SI)?$")>;
+def : InstRW<[FXU, LSU, Lat5], (instregex "A(L)?(Y|SI)?$")>;
 def : InstRW<[FXU, LSU, Lat6], (instregex "AH(Y)?$")>;
 def : InstRW<[FXU], (instregex "AIH$")>;
 def : InstRW<[FXU], (instregex "AFI(Mux)?$")>;
@@ -309,15 +313,14 @@ def : InstRW<[FXU], (instregex "AGHI(K)?$")>;
 def : InstRW<[FXU], (instregex "AGR(K)?$")>;
 def : InstRW<[FXU], (instregex "AHI(K)?$")>;
 def : InstRW<[FXU], (instregex "AHIMux(K)?$")>;
-def : InstRW<[FXU, LSU, Lat5], (instregex "AL(Y)?$")>;
 def : InstRW<[FXU], (instregex "AL(FI|HSIK)$")>;
-def : InstRW<[FXU, LSU, Lat5], (instregex "ALG(F)?$")>;
+def : InstRW<[FXU, LSU, Lat5], (instregex "ALGF$")>;
 def : InstRW<[FXU], (instregex "ALGHSIK$")>;
 def : InstRW<[FXU], (instregex "ALGF(I|R)$")>;
 def : InstRW<[FXU], (instregex "ALGR(K)?$")>;
 def : InstRW<[FXU], (instregex "ALR(K)?$")>;
 def : InstRW<[FXU], (instregex "AR(K)?$")>;
-def : InstRW<[FXU, LSU, Lat5], (instregex "AG(SI)?$")>;
+def : InstRW<[FXU, LSU, Lat5], (instregex "A(L)?G(SI)?$")>;
 
 // Logical addition with carry
 def : InstRW<[FXU, LSU, Lat7, GroupAlone], (instregex "ALC(G)?$")>;
@@ -410,11 +413,17 @@ def : InstRW<[FXU, Lat9, GroupAlone], (instregex "MLGR$")>;
 def : InstRW<[FXU, Lat5], (instregex "MGHI$")>;
 def : InstRW<[FXU, Lat5], (instregex "MHI$")>;
 def : InstRW<[FXU, LSU, Lat9], (instregex "MH(Y)?$")>;
+def : InstRW<[FXU, Lat7, GroupAlone], (instregex "M(L)?R$")>;
+def : InstRW<[FXU, LSU, Lat7, GroupAlone], (instregex "M(FY|L)?$")>;
 
 //===----------------------------------------------------------------------===//
 // Division and remainder
 //===----------------------------------------------------------------------===//
 
+def : InstRW<[FPU2, FPU2, FXU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
+              (instregex "DR$")>;
+def : InstRW<[FPU2, FPU2, LSU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
+              (instregex "D$")>;
 def : InstRW<[FPU2, FPU2, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
               (instregex "DSG(F)?R$")>;
 def : InstRW<[FPU2, FPU2, LSU, FXU, FXU, FXU, Lat30, GroupAlone],
@@ -431,7 +440,8 @@ def : InstRW<[FPU2, FPU2, LSU, FXU, FXU, FXU, FXU, Lat30, GroupAlone],
 def : InstRW<[FXU], (instregex "SLL(G|K)?$")>;
 def : InstRW<[FXU], (instregex "SRL(G|K)?$")>;
 def : InstRW<[FXU], (instregex "SRA(G|K)?$")>;
-def : InstRW<[FXU], (instregex "SLA(K)?$")>;
+def : InstRW<[FXU], (instregex "SLA(G|K)?$")>;
+def : InstRW<[FXU, FXU, FXU, FXU, Lat8], (instregex "S(L|R)D(A|L)$")>;
 
 // Rotate
 def : InstRW<[FXU, LSU, Lat6], (instregex "RLL(G)?$")>;
@@ -491,6 +501,9 @@ def : InstRW<[FXU], (instregex "TMHL(64)?$")>;
 def : InstRW<[FXU], (instregex "TMLH(64)?$")>;
 def : InstRW<[FXU], (instregex "TMLL(64)?$")>;
 
+// Compare logical characters under mask
+def : InstRW<[FXU, LSU, Lat5], (instregex "CLM(H|Y)?$")>;
+
 //===----------------------------------------------------------------------===//
 // Prefetch and execution hint
 //===----------------------------------------------------------------------===//
@@ -821,14 +834,17 @@ def : InstRW<[FPU, LSU, Lat30], (instregex "D(E|D)B$")>;
 def : InstRW<[FPU, Lat30], (instregex "D(E|D)BR$")>;
 def : InstRW<[FPU2, FPU2, Lat30, GroupAlone], (instregex "DXBR$")>;
 
+// Divide to integer
+def : InstRW<[FPU, Lat30, GroupAlone], (instregex "DI(E|D)BR$")>;
+
 //===----------------------------------------------------------------------===//
 // FP: Comparisons
 //===----------------------------------------------------------------------===//
 
 // Compare
-def : InstRW<[FPU, LSU, Lat12], (instregex "C(E|D)B$")>;
-def : InstRW<[FPU], (instregex "C(E|D)BR$")>;
-def : InstRW<[FPU, FPU, Lat30], (instregex "CXBR$")>;
+def : InstRW<[FPU, LSU, Lat12], (instregex "(K|C)(E|D)B$")>;
+def : InstRW<[FPU], (instregex "(K|C)(E|D)BR$")>;
+def : InstRW<[FPU, FPU, Lat30], (instregex "(K|C)XBR$")>;
 
 // Test Data Class
 def : InstRW<[FPU, LSU, Lat15], (instregex "TC(E|D)B$")>;

diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt
index de191509ff5414f8897d01efafc735701a08a073..9be6448f160936e2f73a3da26f16a057446cfd1a 100644 (file)
--- a/test/MC/Disassembler/SystemZ/insns.txt
+++ b/test/MC/Disassembler/SystemZ/insns.txt
@@ -616,6 +616,45 @@
 # CHECK: algrk %r2, %r3, %r4
 0xb9 0xea 0x40 0x23
 
+# CHECK: algsi -524288, 0
+0xeb 0x00 0x00 0x00 0x80 0x7e
+
+# CHECK: algsi -1, 0
+0xeb 0x00 0x0f 0xff 0xff 0x7e
+
+# CHECK: algsi 0, 0
+0xeb 0x00 0x00 0x00 0x00 0x7e
+
+# CHECK: algsi 1, 0
+0xeb 0x00 0x00 0x01 0x00 0x7e
+
+# CHECK: algsi 524287, 0
+0xeb 0x00 0x0f 0xff 0x7f 0x7e
+
+# CHECK: algsi 0, -128
+0xeb 0x80 0x00 0x00 0x00 0x7e
+
+# CHECK: algsi 0, -1
+0xeb 0xff 0x00 0x00 0x00 0x7e
+
+# CHECK: algsi 0, 1
+0xeb 0x01 0x00 0x00 0x00 0x7e
+
+# CHECK: algsi 0, 127
+0xeb 0x7f 0x00 0x00 0x00 0x7e
+
+# CHECK: algsi 0(%r1), 42
+0xeb 0x2a 0x10 0x00 0x00 0x7e
+
+# CHECK: algsi 0(%r15), 42
+0xeb 0x2a 0xf0 0x00 0x00 0x7e
+
+# CHECK: algsi 524287(%r1), 42
+0xeb 0x2a 0x1f 0xff 0x7f 0x7e
+
+# CHECK: algsi 524287(%r15), 42
+0xeb 0x2a 0xff 0xff 0x7f 0x7e
+
 # CHECK: alhsik %r0, %r1, -32768
 0xec 0x01 0x80 0x00 0x00 0xda
 
@@ -649,6 +688,45 @@
 # CHECK: alrk %r2, %r3, %r4
 0xb9 0xfa 0x40 0x23
 
+# CHECK: alsi -524288, 0
+0xeb 0x00 0x00 0x00 0x80 0x6e
+
+# CHECK: alsi -1, 0
+0xeb 0x00 0x0f 0xff 0xff 0x6e
+
+# CHECK: alsi 0, 0
+0xeb 0x00 0x00 0x00 0x00 0x6e
+
+# CHECK: alsi 1, 0
+0xeb 0x00 0x00 0x01 0x00 0x6e
+
+# CHECK: alsi 524287, 0
+0xeb 0x00 0x0f 0xff 0x7f 0x6e
+
+# CHECK: alsi 0, -128
+0xeb 0x80 0x00 0x00 0x00 0x6e
+
+# CHECK: alsi 0, -1
+0xeb 0xff 0x00 0x00 0x00 0x6e
+
+# CHECK: alsi 0, 1
+0xeb 0x01 0x00 0x00 0x00 0x6e
+
+# CHECK: alsi 0, 127
+0xeb 0x7f 0x00 0x00 0x00 0x6e
+
+# CHECK: alsi 0(%r1), 42
+0xeb 0x2a 0x10 0x00 0x00 0x6e
+
+# CHECK: alsi 0(%r15), 42
+0xeb 0x2a 0xf0 0x00 0x00 0x6e
+
+# CHECK: alsi 524287(%r1), 42
+0xeb 0x2a 0x1f 0xff 0x7f 0x6e
+
+# CHECK: alsi 524287(%r15), 42
+0xeb 0x2a 0xff 0xff 0x7f 0x6e
+
 # CHECK: aly %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x5e
 
@@ -3208,6 +3286,87 @@
 # CHECK: cliy 524287(%r15), 42
 0xeb 0x2a 0xff 0xff 0x7f 0x55
 
+# CHECK: clm %r0, 0, 0
+0xbd 0x00 0x00 0x00
+
+# CHECK: clm %r0, 15, 4095
+0xbd 0x0f 0x0f 0xff
+
+# CHECK: clm %r0, 0, 0(%r1)
+0xbd 0x00 0x10 0x00
+
+# CHECK: clm %r0, 0, 0(%r15)
+0xbd 0x00 0xf0 0x00
+
+# CHECK: clm %r0, 15, 4095(%r15)
+0xbd 0x0f 0xff 0xff
+
+# CHECK: clm %r0, 0, 4095(%r1)
+0xbd 0x00 0x1f 0xff
+
+# CHECK: clm %r15, 0, 0
+0xbd 0xf0 0x00 0x00
+
+# CHECK: clmh %r0, 0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x20
+
+# CHECK: clmh %r0, 0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x20
+
+# CHECK: clmh %r0, 15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x20
+
+# CHECK: clmh %r0, 15, 1
+0xeb 0x0f 0x00 0x01 0x00 0x20
+
+# CHECK: clmh %r0, 8, 524287
+0xeb 0x08 0x0f 0xff 0x7f 0x20
+
+# CHECK: clmh %r0, 8, 0(%r1)
+0xeb 0x08 0x10 0x00 0x00 0x20
+
+# CHECK: clmh %r0, 4, 0(%r15)
+0xeb 0x04 0xf0 0x00 0x00 0x20
+
+# CHECK: clmh %r0, 4, 524287(%r15)
+0xeb 0x04 0xff 0xff 0x7f 0x20
+
+# CHECK: clmh %r0, 0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x20
+
+# CHECK: clmh %r15, 0, 0
+0xeb 0xf0 0x00 0x00 0x00 0x20
+
+# CHECK: clmy %r0, 0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x21
+
+# CHECK: clmy %r0, 0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x21
+
+# CHECK: clmy %r0, 15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x21
+
+# CHECK: clmy %r0, 15, 1
+0xeb 0x0f 0x00 0x01 0x00 0x21
+
+# CHECK: clmy %r0, 8, 524287
+0xeb 0x08 0x0f 0xff 0x7f 0x21
+
+# CHECK: clmy %r0, 8, 0(%r1)
+0xeb 0x08 0x10 0x00 0x00 0x21
+
+# CHECK: clmy %r0, 4, 0(%r15)
+0xeb 0x04 0xf0 0x00 0x00 0x21
+
+# CHECK: clmy %r0, 4, 524287(%r15)
+0xeb 0x04 0xff 0xff 0x7f 0x21
+
+# CHECK: clmy %r0, 0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x21
+
+# CHECK: clmy %r15, 0, 0
+0xeb 0xf0 0x00 0x00 0x00 0x21
+
 # CHECK: clr %r0, %r0
 0x15 0x00
 
@@ -4144,6 +4303,27 @@
 # CHECK: cy %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x59
 
+# CHECK: d %r0, 0
+0x5d 0x00 0x00 0x00
+
+# CHECK: d %r0, 4095
+0x5d 0x00 0x0f 0xff
+
+# CHECK: d %r0, 0(%r1)
+0x5d 0x00 0x10 0x00
+
+# CHECK: d %r0, 0(%r15)
+0x5d 0x00 0xf0 0x00
+
+# CHECK: d %r0, 4095(%r1,%r15)
+0x5d 0x01 0xff 0xff
+
+# CHECK: d %r0, 4095(%r15,%r1)
+0x5d 0x0f 0x1f 0xff
+
+# CHECK: d %r14, 0
+0x5d 0xe0 0x00 0x00
+
 # CHECK: ddb %f0, 0
 0xed 0x00 0x00 0x00 0x00 0x1d
 
@@ -4210,6 +4390,42 @@
 # CHECK: debr %f15, %f0
 0xb3 0x0d 0x00 0xf0
 
+# CHECK: didbr %f0, %f0, %f0, 1
+0xb3 0x5b 0x01 0x00
+
+# CHECK: didbr %f0, %f0, %f0, 15
+0xb3 0x5b 0x0f 0x00
+
+# CHECK: didbr %f0, %f0, %f15, 1
+0xb3 0x5b 0x01 0x0f
+
+# CHECK: didbr %f0, %f15, %f0, 1
+0xb3 0x5b 0xf1 0x00
+
+# CHECK: didbr %f4, %f5, %f6, 7
+0xb3 0x5b 0x57 0x46
+
+# CHECK: didbr %f15, %f0, %f0, 1
+0xb3 0x5b 0x01 0xf0
+
+# CHECK: diebr %f0, %f0, %f0, 1
+0xb3 0x53 0x01 0x00
+
+# CHECK: diebr %f0, %f0, %f0, 15
+0xb3 0x53 0x0f 0x00
+
+# CHECK: diebr %f0, %f0, %f15, 1
+0xb3 0x53 0x01 0x0f
+
+# CHECK: diebr %f0, %f15, %f0, 1
+0xb3 0x53 0xf1 0x00
+
+# CHECK: diebr %f4, %f5, %f6, 7
+0xb3 0x53 0x57 0x46
+
+# CHECK: diebr %f15, %f0, %f0, 1
+0xb3 0x53 0x01 0xf0
+
 # CHECK: dl %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x97
 
@@ -4336,6 +4552,18 @@
 # CHECK: dp 0(1), 0(16,%r15)
 0xfd 0x0f 0x00 0x00 0xf0 0x00
 
+# CHECK: dr %r0, %r0
+0x1d 0x00
+
+# CHECK: dr %r0, %r15
+0x1d 0x0f
+
+# CHECK: dr %r14, %r0
+0x1d 0xe0
+
+# CHECK: dr %r6, %r9
+0x1d 0x69
+
 # CHECK: dsg %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x0d
 
@@ -4897,6 +5125,72 @@
 # CHECK: ipm %r15
 0xb2 0x22 0x00 0xf0
 
+# CHECK: kdb %f0, 0
+0xed 0x00 0x00 0x00 0x00 0x18
+
+# CHECK: kdb %f0, 4095
+0xed 0x00 0x0f 0xff 0x00 0x18
+
+# CHECK: kdb %f0, 0(%r1)
+0xed 0x00 0x10 0x00 0x00 0x18
+
+# CHECK: kdb %f0, 0(%r15)
+0xed 0x00 0xf0 0x00 0x00 0x18
+
+# CHECK: kdb %f0, 4095(%r1,%r15)
+0xed 0x01 0xff 0xff 0x00 0x18
+
+# CHECK: kdb %f0, 4095(%r15,%r1)
+0xed 0x0f 0x1f 0xff 0x00 0x18
+
+# CHECK: kdb %f15, 0
+0xed 0xf0 0x00 0x00 0x00 0x18
+
+# CHECK: kdbr %f0, %f0
+0xb3 0x18 0x00 0x00
+
+# CHECK: kdbr %f0, %f15
+0xb3 0x18 0x00 0x0f
+
+# CHECK: kdbr %f7, %f8
+0xb3 0x18 0x00 0x78
+
+# CHECK: kdbr %f15, %f0
+0xb3 0x18 0x00 0xf0
+
+# CHECK: keb %f0, 0
+0xed 0x00 0x00 0x00 0x00 0x08
+
+# CHECK: keb %f0, 4095
+0xed 0x00 0x0f 0xff 0x00 0x08
+
+# CHECK: keb %f0, 0(%r1)
+0xed 0x00 0x10 0x00 0x00 0x08
+
+# CHECK: keb %f0, 0(%r15)
+0xed 0x00 0xf0 0x00 0x00 0x08
+
+# CHECK: keb %f0, 4095(%r1,%r15)
+0xed 0x01 0xff 0xff 0x00 0x08
+
+# CHECK: keb %f0, 4095(%r15,%r1)
+0xed 0x0f 0x1f 0xff 0x00 0x08
+
+# CHECK: keb %f15, 0
+0xed 0xf0 0x00 0x00 0x00 0x08
+
+# CHECK: kebr %f0, %f0
+0xb3 0x08 0x00 0x00
+
+# CHECK: kebr %f0, %f15
+0xb3 0x08 0x00 0x0f
+
+# CHECK: kebr %f7, %f8
+0xb3 0x08 0x00 0x78
+
+# CHECK: kebr %f15, %f0
+0xb3 0x08 0x00 0xf0
+
 # CHECK: kimd %r2, %r10
 0xb9 0x3e 0x00 0x2a
 
@@ -4993,6 +5287,18 @@
 # CHECK: kmo %r14, %r10
 0xb9 0x2b 0x00 0xea
 
+# CHECK: kxbr %f0, %f0
+0xb3 0x48 0x00 0x00
+
+# CHECK: kxbr %f0, %f13
+0xb3 0x48 0x00 0x0d
+
+# CHECK: kxbr %f8, %f8
+0xb3 0x48 0x00 0x88
+
+# CHECK: kxbr %f13, %f0
+0xb3 0x48 0x00 0xd0
+
 # CHECK: l %r0, 0
 0x58 0x00 0x00 0x00
 
@@ -6850,6 +7156,27 @@
 # CHECK: lm %r0, %r0, 4095(%r15)
 0x98 0x00 0xff 0xff
 
+# CHECK: lmd %r0, %r0, 0, 0
+0xef 0x00 0x00 0x00 0x00 0x00
+
+# CHECK: lmd %r2, %r4, 0, 4095
+0xef 0x24 0x00 0x00 0x0f 0xff
+
+# CHECK: lmd %r2, %r4, 0, 0(%r1)
+0xef 0x24 0x00 0x00 0x10 0x00
+
+# CHECK: lmd %r2, %r4, 0, 0(%r15)
+0xef 0x24 0x00 0x00 0xf0 0x00
+
+# CHECK: lmd %r2, %r4, 0(%r1), 4095(%r15)
+0xef 0x24 0x10 0x00 0xff 0xff
+
+# CHECK: lmd %r2, %r4, 0(%r1), 0(%r15)
+0xef 0x24 0x10 0x00 0xf0 0x00
+
+# CHECK: lmd %r2, %r4, 4095(%r1), 0(%r15)
+0xef 0x24 0x1f 0xff 0xf0 0x00
+
 # CHECK: lmg %r0, %r0, 0
 0xeb 0x00 0x00 0x00 0x00 0x04
 
@@ -7738,6 +8065,27 @@
 # CHECK: lzxr %f13
 0xb3 0x76 0x00 0xd0
 
+# CHECK: m %r0, 0
+0x5c 0x00 0x00 0x00
+
+# CHECK: m %r0, 4095
+0x5c 0x00 0x0f 0xff
+
+# CHECK: m %r0, 0(%r1)
+0x5c 0x00 0x10 0x00
+
+# CHECK: m %r0, 0(%r15)
+0x5c 0x00 0xf0 0x00
+
+# CHECK: m %r0, 4095(%r1,%r15)
+0x5c 0x01 0xff 0xff
+
+# CHECK: m %r0, 4095(%r15,%r1)
+0x5c 0x0f 0x1f 0xff
+
+# CHECK: m %r14, 0
+0x5c 0xe0 0x00 0x00
+
 # CHECK: madb %f0, %f0, 0
 0xed 0x00 0x00 0x00 0x00 0x1e
 
@@ -7927,6 +8275,36 @@
 # CHECK: meebr %f15, %f0
 0xb3 0x17 0x00 0xf0
 
+# CHECK: mfy %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x5c
+
+# CHECK: mfy %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x5c
+
+# CHECK: mfy %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x5c
+
+# CHECK: mfy %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x5c
+
+# CHECK: mfy %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x5c
+
+# CHECK: mfy %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x5c
+
+# CHECK: mfy %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x5c
+
+# CHECK: mfy %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x5c
+
+# CHECK: mfy %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x5c
+
+# CHECK: mfy %r14, 0
+0xe3 0xe0 0x00 0x00 0x00 0x5c
+
 # CHECK: mghi %r0, -32768
 0xa7 0x0d 0x80 0x00
 
@@ -8014,6 +8392,36 @@
 # CHECK: mhy %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x7c
 
+# CHECK: ml %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x96
+
+# CHECK: ml %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x96
+
+# CHECK: ml %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x96
+
+# CHECK: ml %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x96
+
+# CHECK: ml %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x96
+
+# CHECK: ml %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x96
+
+# CHECK: ml %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x96
+
+# CHECK: ml %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x96
+
+# CHECK: ml %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x96
+
+# CHECK: ml %r14, 0
+0xe3 0xe0 0x00 0x00 0x00 0x96
+
 # CHECK: mlg %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x86
 
@@ -8056,6 +8464,18 @@
 # CHECK: mlgr %r6, %r9
 0xb9 0x86 0x00 0x69
 
+# CHECK: mlr %r0, %r0
+0xb9 0x96 0x00 0x00
+
+# CHECK: mlr %r0, %r15
+0xb9 0x96 0x00 0x0f
+
+# CHECK: mlr %r14, %r0
+0xb9 0x96 0x00 0xe0
+
+# CHECK: mlr %r6, %r9
+0xb9 0x96 0x00 0x69
+
 # CHECK: mp 0(1), 0(1)
 0xfc 0x00 0x00 0x00 0x00 0x00
 
@@ -8098,6 +8518,18 @@
 # CHECK: mp 0(1), 0(16,%r15)
 0xfc 0x0f 0x00 0x00 0xf0 0x00
 
+# CHECK: mr %r0, %r0
+0x1c 0x00
+
+# CHECK: mr %r0, %r15
+0x1c 0x0f
+
+# CHECK: mr %r14, %r0
+0x1c 0xe0
+
+# CHECK: mr %r6, %r9
+0x1c 0x69
+
 # CHECK: ms %r0, 0
 0x71 0x00 0x00 0x00
 
@@ -10162,6 +10594,42 @@
 # CHECK: sla %r0, 4095(%r15)
 0x8b 0x00 0xff 0xff
 
+# CHECK: slag %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0x0b
+
+# CHECK: slag %r15, %r1, 0
+0xeb 0xf1 0x00 0x00 0x00 0x0b
+
+# CHECK: slag %r1, %r15, 0
+0xeb 0x1f 0x00 0x00 0x00 0x0b
+
+# CHECK: slag %r15, %r15, 0
+0xeb 0xff 0x00 0x00 0x00 0x0b
+
+# CHECK: slag %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x0b
+
+# CHECK: slag %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x0b
+
+# CHECK: slag %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0x0b
+
+# CHECK: slag %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0x0b
+
+# CHECK: slag %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0x0b
+
+# CHECK: slag %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0x0b
+
+# CHECK: slag %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x0b
+
+# CHECK: slag %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0x0b
+
 # CHECK: slak %r0, %r0, 0
 0xeb 0x00 0x00 0x00 0x00 0xdd
 
@@ -10282,6 +10750,54 @@
 # CHECK: slbr %r7, %r8
 0xb9 0x99 0x00 0x78
 
+# CHECK: slda %r0, 0
+0x8f 0x00 0x00 0x00
+
+# CHECK: slda %r6, 0
+0x8f 0x60 0x00 0x00
+
+# CHECK: slda %r14, 0
+0x8f 0xe0 0x00 0x00
+
+# CHECK: slda %r0, 4095
+0x8f 0x00 0x0f 0xff
+
+# CHECK: slda %r0, 0(%r1)
+0x8f 0x00 0x10 0x00
+
+# CHECK: slda %r0, 0(%r15)
+0x8f 0x00 0xf0 0x00
+
+# CHECK: slda %r0, 4095(%r1)
+0x8f 0x00 0x1f 0xff
+
+# CHECK: slda %r0, 4095(%r15)
+0x8f 0x00 0xff 0xff
+
+# CHECK: sldl %r0, 0
+0x8d 0x00 0x00 0x00
+
+# CHECK: sldl %r6, 0
+0x8d 0x60 0x00 0x00
+
+# CHECK: sldl %r14, 0
+0x8d 0xe0 0x00 0x00
+
+# CHECK: sldl %r0, 4095
+0x8d 0x00 0x0f 0xff
+
+# CHECK: sldl %r0, 0(%r1)
+0x8d 0x00 0x10 0x00
+
+# CHECK: sldl %r0, 0(%r15)
+0x8d 0x00 0xf0 0x00
+
+# CHECK: sldl %r0, 4095(%r1)
+0x8d 0x00 0x1f 0xff
+
+# CHECK: sldl %r0, 4095(%r15)
+0x8d 0x00 0xff 0xff
+
 # CHECK: slfi %r0, 0
 0xc2 0x05 0x00 0x00 0x00 0x00
 
@@ -10771,6 +11287,54 @@
 # CHECK: srak %r0, %r0, 524287(%r15)
 0xeb 0x00 0xff 0xff 0x7f 0xdc
 
+# CHECK: srda %r0, 0
+0x8e 0x00 0x00 0x00
+
+# CHECK: srda %r6, 0
+0x8e 0x60 0x00 0x00
+
+# CHECK: srda %r14, 0
+0x8e 0xe0 0x00 0x00
+
+# CHECK: srda %r0, 4095
+0x8e 0x00 0x0f 0xff
+
+# CHECK: srda %r0, 0(%r1)
+0x8e 0x00 0x10 0x00
+
+# CHECK: srda %r0, 0(%r15)
+0x8e 0x00 0xf0 0x00
+
+# CHECK: srda %r0, 4095(%r1)
+0x8e 0x00 0x1f 0xff
+
+# CHECK: srda %r0, 4095(%r15)
+0x8e 0x00 0xff 0xff
+
+# CHECK: srdl %r0, 0
+0x8c 0x00 0x00 0x00
+
+# CHECK: srdl %r6, 0
+0x8c 0x60 0x00 0x00
+
+# CHECK: srdl %r14, 0
+0x8c 0xe0 0x00 0x00
+
+# CHECK: srdl %r0, 4095
+0x8c 0x00 0x0f 0xff
+
+# CHECK: srdl %r0, 0(%r1)
+0x8c 0x00 0x10 0x00
+
+# CHECK: srdl %r0, 0(%r15)
+0x8c 0x00 0xf0 0x00
+
+# CHECK: srdl %r0, 4095(%r1)
+0x8c 0x00 0x1f 0xff
+
+# CHECK: srdl %r0, 4095(%r15)
+0x8c 0x00 0xff 0xff
+
 # CHECK: srk %r0, %r0, %r0
 0xb9 0xf9 0x00 0x00
 
@@ -11185,6 +11749,87 @@
 # CHECK: stckf 4095(%r15)
 0xb2 0x7c 0xff 0xff
 
+# CHECK: stcm %r0, 0, 0
+0xbe 0x00 0x00 0x00
+
+# CHECK: stcm %r0, 15, 4095
+0xbe 0x0f 0x0f 0xff
+
+# CHECK: stcm %r0, 0, 0(%r1)
+0xbe 0x00 0x10 0x00
+
+# CHECK: stcm %r0, 0, 0(%r15)
+0xbe 0x00 0xf0 0x00
+
+# CHECK: stcm %r0, 15, 4095(%r15)
+0xbe 0x0f 0xff 0xff
+
+# CHECK: stcm %r0, 0, 4095(%r1)
+0xbe 0x00 0x1f 0xff
+
+# CHECK: stcm %r15, 0, 0
+0xbe 0xf0 0x00 0x00
+
+# CHECK: stcmh %r0, 0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x2c
+
+# CHECK: stcmh %r0, 0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x2c
+
+# CHECK: stcmh %r0, 15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x2c
+
+# CHECK: stcmh %r0, 15, 1
+0xeb 0x0f 0x00 0x01 0x00 0x2c
+
+# CHECK: stcmh %r0, 8, 524287
+0xeb 0x08 0x0f 0xff 0x7f 0x2c
+
+# CHECK: stcmh %r0, 8, 0(%r1)
+0xeb 0x08 0x10 0x00 0x00 0x2c
+
+# CHECK: stcmh %r0, 4, 0(%r15)
+0xeb 0x04 0xf0 0x00 0x00 0x2c
+
+# CHECK: stcmh %r0, 4, 524287(%r15)
+0xeb 0x04 0xff 0xff 0x7f 0x2c
+
+# CHECK: stcmh %r0, 0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x2c
+
+# CHECK: stcmh %r15, 0, 0
+0xeb 0xf0 0x00 0x00 0x00 0x2c
+
+# CHECK: stcmy %r0, 0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x2d
+
+# CHECK: stcmy %r0, 0, -1
+0xeb 0x00 0x0f 0xff 0xff 0x2d
+
+# CHECK: stcmy %r0, 15, 0
+0xeb 0x0f 0x00 0x00 0x00 0x2d
+
+# CHECK: stcmy %r0, 15, 1
+0xeb 0x0f 0x00 0x01 0x00 0x2d
+
+# CHECK: stcmy %r0, 8, 524287
+0xeb 0x08 0x0f 0xff 0x7f 0x2d
+
+# CHECK: stcmy %r0, 8, 0(%r1)
+0xeb 0x08 0x10 0x00 0x00 0x2d
+
+# CHECK: stcmy %r0, 4, 0(%r15)
+0xeb 0x04 0xf0 0x00 0x00 0x2d
+
+# CHECK: stcmy %r0, 4, 524287(%r15)
+0xeb 0x04 0xff 0xff 0x7f 0x2d
+
+# CHECK: stcmy %r0, 0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0x2d
+
+# CHECK: stcmy %r15, 0, 0
+0xeb 0xf0 0x00 0x00 0x00 0x2d
+
 # CHECK: stcy %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x72
 

diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s
index 6616f278318192d8bf8d7f4e5671a2d96b30ee33..7d9f764e888eb370722f2d765f66e67a34f6eb46 100644 (file)
--- a/test/MC/SystemZ/insn-bad.s
+++ b/test/MC/SystemZ/insn-bad.s
@@ -211,6 +211,40 @@
 
        alrk    %r2,%r3,%r4
 
+#CHECK: error: invalid operand
+#CHECK: algsi  -524289, 0
+#CHECK: error: invalid operand
+#CHECK: algsi  524288, 0
+#CHECK: error: invalid use of indexed addressing
+#CHECK: algsi  0(%r1,%r2), 0
+#CHECK: error: invalid operand
+#CHECK: algsi  0, -129
+#CHECK: error: invalid operand
+#CHECK: algsi  0, 128
+
+       algsi   -524289, 0
+       algsi   524288, 0
+       algsi   0(%r1,%r2), 0
+       algsi   0, -129
+       algsi   0, 128
+
+#CHECK: error: invalid operand
+#CHECK: alsi   -524289, 0
+#CHECK: error: invalid operand
+#CHECK: alsi   524288, 0
+#CHECK: error: invalid use of indexed addressing
+#CHECK: alsi   0(%r1,%r2), 0
+#CHECK: error: invalid operand
+#CHECK: alsi   0, -129
+#CHECK: error: invalid operand
+#CHECK: alsi   0, 128
+
+       alsi    -524289, 0
+       alsi    524288, 0
+       alsi    0(%r1,%r2), 0
+       alsi    0, -129
+       alsi    0, 128
+
 #CHECK: error: invalid operand
 #CHECK: aly    %r0, -524289
 #CHECK: error: invalid operand
@@ -1493,6 +1527,48 @@
        cliy    0, -1
        cliy    0, 256
 
+#CHECK: error: invalid operand
+#CHECK: clm    %r0, 0, -1
+#CHECK: error: invalid operand
+#CHECK: clm    %r0, 0, 4096
+#CHECK: error: invalid operand
+#CHECK: clm    %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: clm    %r0, 16, 0
+
+       clm     %r0, 0, -1
+       clm     %r0, 0, 4096
+       clm     %r0, -1, 0
+       clm     %r0, 16, 0
+
+#CHECK: error: invalid operand
+#CHECK: clmh   %r0, 0, -524289
+#CHECK: error: invalid operand
+#CHECK: clmh   %r0, 0, 524288
+#CHECK: error: invalid operand
+#CHECK: clmh   %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: clmh   %r0, 16, 0
+
+       clmh    %r0, 0, -524289
+       clmh    %r0, 0, 524288
+       clmh    %r0, -1, 0
+       clmh    %r0, 16, 0
+
+#CHECK: error: invalid operand
+#CHECK: clmy   %r0, 0, -524289
+#CHECK: error: invalid operand
+#CHECK: clmy   %r0, 0, 524288
+#CHECK: error: invalid operand
+#CHECK: clmy   %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: clmy   %r0, 16, 0
+
+       clmy    %r0, 0, -524289
+       clmy    %r0, 0, 524288
+       clmy    %r0, -1, 0
+       clmy    %r0, 16, 0
+
 #CHECK: error: offset out of range
 #CHECK: clrj   %r0, %r0, 0, -0x100002
 #CHECK: error: offset out of range
@@ -1894,6 +1970,17 @@
        cy      %r0, -524289
        cy      %r0, 524288
 
+#CHECK: error: invalid operand
+#CHECK: d      %r0, -1
+#CHECK: error: invalid operand
+#CHECK: d      %r0, 4096
+#CHECK: error: invalid register pair
+#CHECK: d      %r1, 0
+
+       d       %r0, -1
+       d       %r0, 4096
+       d       %r1, 0
+
 #CHECK: error: invalid operand
 #CHECK: ddb    %f0, -1
 #CHECK: error: invalid operand
@@ -1910,6 +1997,22 @@
        deb     %f0, -1
        deb     %f0, 4096
 
+#CHECK: error: invalid operand
+#CHECK: didbr  %f0, %f0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: didbr  %f0, %f0, %f0, 16
+
+       didbr   %f0, %f0, %f0, -1
+       didbr   %f0, %f0, %f0, 16
+
+#CHECK: error: invalid operand
+#CHECK: diebr  %f0, %f0, %f0, -1
+#CHECK: error: invalid operand
+#CHECK: diebr  %f0, %f0, %f0, 16
+
+       diebr   %f0, %f0, %f0, -1
+       diebr   %f0, %f0, %f0, 16
+
 #CHECK: error: invalid operand
 #CHECK: dl     %r0, -524289
 #CHECK: error: invalid operand
@@ -1921,6 +2024,11 @@
        dl      %r0, 524288
        dl      %r1, 0
 
+#CHECK: error: invalid register pair
+#CHECK: dr     %r1, %r0
+
+       dr      %r1, %r0
+
 #CHECK: error: invalid operand
 #CHECK: dlg    %r0, -524289
 #CHECK: error: invalid operand
@@ -2304,6 +2412,22 @@
        iill    %r0, -1
        iill    %r0, 0x10000
 
+#CHECK: error: invalid operand
+#CHECK: kdb    %f0, -1
+#CHECK: error: invalid operand
+#CHECK: kdb    %f0, 4096
+
+       kdb     %f0, -1
+       kdb     %f0, 4096
+
+#CHECK: error: invalid operand
+#CHECK: keb    %f0, -1
+#CHECK: error: invalid operand
+#CHECK: keb    %f0, 4096
+
+       keb     %f0, -1
+       keb     %f0, 4096
+
 #CHECK: error: invalid register pair
 #CHECK: kimd   %r0, %r1
 
@@ -2350,6 +2474,14 @@
 
        kmo     %r2, %r4
 
+#CHECK: error: invalid register pair
+#CHECK: kxbr   %f0, %f2
+#CHECK: error: invalid register pair
+#CHECK: kxbr   %f2, %f0
+
+       kxbr    %f0, %f2
+       kxbr    %f2, %f0
+
 #CHECK: error: invalid operand
 #CHECK: l      %r0, -1
 #CHECK: error: invalid operand
@@ -2877,6 +3009,23 @@
        lm      %r0, %r0, 4096
        lm      %r0, %r0, 0(%r1,%r2)
 
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lmd    %r2, %r4, 160(%r1,%r15), 160(%r15)
+#CHECK: error: invalid operand
+#CHECK: lmd    %r2, %r4, -1(%r1), 160(%r15)
+#CHECK: error: invalid operand
+#CHECK: lmd    %r2, %r4, 4096(%r1), 160(%r15)
+#CHECK: error: invalid operand
+#CHECK: lmd    %r2, %r4, 0(%r1), -1(%r15)
+#CHECK: error: invalid operand
+#CHECK: lmd    %r2, %r4, 0(%r1), 4096(%r15)
+
+        lmd    %r2, %r4, 160(%r1,%r15), 160(%r15)
+        lmd    %r2, %r4, -1(%r1), 160(%r15)
+        lmd    %r2, %r4, 4096(%r1), 160(%r15)
+        lmd    %r2, %r4, 0(%r1), -1(%r15)
+        lmd    %r2, %r4, 0(%r1), 4096(%r15)
+
 #CHECK: error: invalid operand
 #CHECK: lmg    %r0, %r0, -524289
 #CHECK: error: invalid operand
@@ -3028,6 +3177,17 @@
 
        lzxr    %f2
 
+#CHECK: error: invalid operand
+#CHECK: m      %r0, -1
+#CHECK: error: invalid operand
+#CHECK: m      %r0, 4096
+#CHECK: error: invalid register pair
+#CHECK: m      %r1, 0
+
+       m       %r0, -1
+       m       %r0, 4096
+       m       %r1, 0
+
 #CHECK: error: invalid operand
 #CHECK: madb   %f0, %f0, -1
 #CHECK: error: invalid operand
@@ -3068,6 +3228,17 @@
        meeb    %f0, -1
        meeb    %f0, 4096
 
+#CHECK: error: invalid operand
+#CHECK: mfy    %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: mfy    %r0, 524288
+#CHECK: error: invalid register pair
+#CHECK: mfy    %r1, 0
+
+       mfy     %r0, -524289
+       mfy     %r0, 524288
+       mfy     %r1, 0
+
 #CHECK: error: invalid operand
 #CHECK: mghi   %r0, -32769
 #CHECK: error: invalid operand
@@ -3106,6 +3277,17 @@
        mhy     %r0, -524289
        mhy     %r0, 524288
 
+#CHECK: error: invalid operand
+#CHECK: ml     %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: ml     %r0, 524288
+#CHECK: error: invalid register pair
+#CHECK: ml     %r1, 0
+
+       ml      %r0, -524289
+       ml      %r0, 524288
+       ml      %r1, 0
+
 #CHECK: error: invalid operand
 #CHECK: mlg    %r0, -524289
 #CHECK: error: invalid operand
@@ -3122,6 +3304,11 @@
 
        mlgr    %r1, %r0
 
+#CHECK: error: invalid register pair
+#CHECK: mlr    %r1, %r0
+
+       mlr     %r1, %r0
+
 #CHECK: error: missing length in address
 #CHECK: mp     0, 0(1)
 #CHECK: error: missing length in address
@@ -3175,6 +3362,11 @@
        mp      0(1,%r2), 0(%r1,%r2)
        mp      0(-), 0(1)
 
+#CHECK: error: invalid register pair
+#CHECK: mr     %r1, %r0
+
+       mr      %r1, %r0
+
 #CHECK: error: invalid operand
 #CHECK: ms     %r0, -1
 #CHECK: error: invalid operand
@@ -4369,6 +4561,20 @@
        sla     %r0,0(%r0)
        sla     %r0,0(%r1,%r2)
 
+#CHECK: error: invalid operand
+#CHECK: slag   %r0,%r0,-524289
+#CHECK: error: invalid operand
+#CHECK: slag   %r0,%r0,524288
+#CHECK: error: %r0 used in an address
+#CHECK: slag   %r0,%r0,0(%r0)
+#CHECK: error: invalid use of indexed addressing
+#CHECK: slag   %r0,%r0,0(%r1,%r2)
+
+       slag    %r0,%r0,-524289
+       slag    %r0,%r0,524288
+       slag    %r0,%r0,0(%r0)
+       slag    %r0,%r0,0(%r1,%r2)
+
 #CHECK: error: instruction requires: distinct-ops
 #CHECK: slak   %r2,%r3,4(%r5)
 
@@ -4390,6 +4596,40 @@
        slbg    %r0, -524289
        slbg    %r0, 524288
 
+#CHECK: error: invalid register pair
+#CHECK: slda   %r1,0
+#CHECK: error: invalid operand
+#CHECK: slda   %r0,-1
+#CHECK: error: invalid operand
+#CHECK: slda   %r0,4096
+#CHECK: error: %r0 used in an address
+#CHECK: slda   %r0,0(%r0)
+#CHECK: error: invalid use of indexed addressing
+#CHECK: slda   %r0,0(%r1,%r2)
+
+       slda    %r1,0
+       slda    %r0,-1
+       slda    %r0,4096
+       slda    %r0,0(%r0)
+       slda    %r0,0(%r1,%r2)
+
+#CHECK: error: invalid register pair
+#CHECK: sldl   %r1,0
+#CHECK: error: invalid operand
+#CHECK: sldl   %r0,-1
+#CHECK: error: invalid operand
+#CHECK: sldl   %r0,4096
+#CHECK: error: %r0 used in an address
+#CHECK: sldl   %r0,0(%r0)
+#CHECK: error: invalid use of indexed addressing
+#CHECK: sldl   %r0,0(%r1,%r2)
+
+       sldl    %r1,0
+       sldl    %r0,-1
+       sldl    %r0,4096
+       sldl    %r0,0(%r0)
+       sldl    %r0,0(%r1,%r2)
+
 #CHECK: error: invalid operand
 #CHECK: slfi   %r0, -1
 #CHECK: error: invalid operand
@@ -4583,6 +4823,40 @@
 
        srak    %r2,%r3,4(%r5)
 
+#CHECK: error: invalid register pair
+#CHECK: srda   %r1,0
+#CHECK: error: invalid operand
+#CHECK: srda   %r0,-1
+#CHECK: error: invalid operand
+#CHECK: srda   %r0,4096
+#CHECK: error: %r0 used in an address
+#CHECK: srda   %r0,0(%r0)
+#CHECK: error: invalid use of indexed addressing
+#CHECK: srda   %r0,0(%r1,%r2)
+
+       srda    %r1,0
+       srda    %r0,-1
+       srda    %r0,4096
+       srda    %r0,0(%r0)
+       srda    %r0,0(%r1,%r2)
+
+#CHECK: error: invalid register pair
+#CHECK: srdl   %r1,0
+#CHECK: error: invalid operand
+#CHECK: srdl   %r0,-1
+#CHECK: error: invalid operand
+#CHECK: srdl   %r0,4096
+#CHECK: error: %r0 used in an address
+#CHECK: srdl   %r0,0(%r0)
+#CHECK: error: invalid use of indexed addressing
+#CHECK: srdl   %r0,0(%r1,%r2)
+
+       srdl    %r1,0
+       srdl    %r0,-1
+       srdl    %r0,4096
+       srdl    %r0,0(%r0)
+       srdl    %r0,0(%r1,%r2)
+
 #CHECK: error: instruction requires: distinct-ops
 #CHECK: srk    %r2,%r3,%r4
 
@@ -4738,6 +5012,48 @@
 
        stch    %r0, 0
 
+#CHECK: error: invalid operand
+#CHECK: stcm   %r0, 0, -1
+#CHECK: error: invalid operand
+#CHECK: stcm   %r0, 0, 4096
+#CHECK: error: invalid operand
+#CHECK: stcm   %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: stcm   %r0, 16, 0
+
+       stcm    %r0, 0, -1
+       stcm    %r0, 0, 4096
+       stcm    %r0, -1, 0
+       stcm    %r0, 16, 0
+
+#CHECK: error: invalid operand
+#CHECK: stcmy  %r0, 0, -524289
+#CHECK: error: invalid operand
+#CHECK: stcmy  %r0, 0, 524288
+#CHECK: error: invalid operand
+#CHECK: stcmy  %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: stcmy  %r0, 16, 0
+
+       stcmy   %r0, 0, -524289
+       stcmy   %r0, 0, 524288
+       stcmy   %r0, -1, 0
+       stcmy   %r0, 16, 0
+
+#CHECK: error: invalid operand
+#CHECK: stcmy  %r0, 0, -524289
+#CHECK: error: invalid operand
+#CHECK: stcmy  %r0, 0, 524288
+#CHECK: error: invalid operand
+#CHECK: stcmy  %r0, -1, 0
+#CHECK: error: invalid operand
+#CHECK: stcmy  %r0, 16, 0
+
+       stcmy   %r0, 0, -524289
+       stcmy   %r0, 0, 524288
+       stcmy   %r0, -1, 0
+       stcmy   %r0, 16, 0
+
 #CHECK: error: invalid operand
 #CHECK: stcy   %r0, -524289
 #CHECK: error: invalid operand

diff --git a/test/MC/SystemZ/insn-good.s b/test/MC/SystemZ/insn-good.s
index 6086c9a2aa9d91a6e2fccc2182e67215eb8653fd..189306073a82d05a5251442be10bb8db64c9342c 100644 (file)
--- a/test/MC/SystemZ/insn-good.s
+++ b/test/MC/SystemZ/insn-good.s
@@ -415,6 +415,34 @@
        algr    %r15,%r0
        algr    %r7,%r8
 
+#CHECK: algsi  -524288, 0              # encoding: [0xeb,0x00,0x00,0x00,0x80,0x7e]
+#CHECK: algsi  -1, 0                   # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x7e]
+#CHECK: algsi  0, 0                    # encoding: [0xeb,0x00,0x00,0x00,0x00,0x7e]
+#CHECK: algsi  1, 0                    # encoding: [0xeb,0x00,0x00,0x01,0x00,0x7e]
+#CHECK: algsi  524287, 0               # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x7e]
+#CHECK: algsi  0, -128                 # encoding: [0xeb,0x80,0x00,0x00,0x00,0x7e]
+#CHECK: algsi  0, -1                   # encoding: [0xeb,0xff,0x00,0x00,0x00,0x7e]
+#CHECK: algsi  0, 1                    # encoding: [0xeb,0x01,0x00,0x00,0x00,0x7e]
+#CHECK: algsi  0, 127                  # encoding: [0xeb,0x7f,0x00,0x00,0x00,0x7e]
+#CHECK: algsi  0(%r1), 42              # encoding: [0xeb,0x2a,0x10,0x00,0x00,0x7e]
+#CHECK: algsi  0(%r15), 42             # encoding: [0xeb,0x2a,0xf0,0x00,0x00,0x7e]
+#CHECK: algsi  524287(%r1), 42         # encoding: [0xeb,0x2a,0x1f,0xff,0x7f,0x7e]
+#CHECK: algsi  524287(%r15), 42        # encoding: [0xeb,0x2a,0xff,0xff,0x7f,0x7e]
+
+       algsi   -524288, 0
+       algsi   -1, 0
+       algsi   0, 0
+       algsi   1, 0
+       algsi   524287, 0
+       algsi   0, -128
+       algsi   0, -1
+       algsi   0, 1
+       algsi   0, 127
+       algsi   0(%r1), 42
+       algsi   0(%r15), 42
+       algsi   524287(%r1), 42
+       algsi   524287(%r15), 42
+
 #CHECK: alr    %r0, %r0                # encoding: [0x1e,0x00]
 #CHECK: alr    %r0, %r15               # encoding: [0x1e,0x0f]
 #CHECK: alr    %r15, %r0               # encoding: [0x1e,0xf0]
@@ -425,6 +453,34 @@
        alr     %r15,%r0
        alr     %r7,%r8
 
+#CHECK: alsi   -524288, 0              # encoding: [0xeb,0x00,0x00,0x00,0x80,0x6e]
+#CHECK: alsi   -1, 0                   # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x6e]
+#CHECK: alsi   0, 0                    # encoding: [0xeb,0x00,0x00,0x00,0x00,0x6e]
+#CHECK: alsi   1, 0                    # encoding: [0xeb,0x00,0x00,0x01,0x00,0x6e]
+#CHECK: alsi   524287, 0               # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x6e]
+#CHECK: alsi   0, -128                 # encoding: [0xeb,0x80,0x00,0x00,0x00,0x6e]
+#CHECK: alsi   0, -1                   # encoding: [0xeb,0xff,0x00,0x00,0x00,0x6e]
+#CHECK: alsi   0, 1                    # encoding: [0xeb,0x01,0x00,0x00,0x00,0x6e]
+#CHECK: alsi   0, 127                  # encoding: [0xeb,0x7f,0x00,0x00,0x00,0x6e]
+#CHECK: alsi   0(%r1), 42              # encoding: [0xeb,0x2a,0x10,0x00,0x00,0x6e]
+#CHECK: alsi   0(%r15), 42             # encoding: [0xeb,0x2a,0xf0,0x00,0x00,0x6e]
+#CHECK: alsi   524287(%r1), 42         # encoding: [0xeb,0x2a,0x1f,0xff,0x7f,0x6e]
+#CHECK: alsi   524287(%r15), 42        # encoding: [0xeb,0x2a,0xff,0xff,0x7f,0x6e]
+
+       alsi    -524288, 0
+       alsi    -1, 0
+       alsi    0, 0
+       alsi    1, 0
+       alsi    524287, 0
+       alsi    0, -128
+       alsi    0, -1
+       alsi    0, 1
+       alsi    0, 127
+       alsi    0(%r1), 42
+       alsi    0(%r15), 42
+       alsi    524287(%r1), 42
+       alsi    524287(%r15), 42
+
 #CHECK: aly    %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x5e]
 #CHECK: aly    %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x5e]
 #CHECK: aly    %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x5e]
@@ -4829,6 +4885,66 @@
        cliy    524287(%r1), 42
        cliy    524287(%r15), 42
 
+#CHECK: clm    %r0, 0, 0               # encoding: [0xbd,0x00,0x00,0x00]
+#CHECK: clm    %r0, 15, 4095           # encoding: [0xbd,0x0f,0x0f,0xff]
+#CHECK: clm    %r0, 0, 0(%r1)          # encoding: [0xbd,0x00,0x10,0x00]
+#CHECK: clm    %r0, 0, 0(%r15)         # encoding: [0xbd,0x00,0xf0,0x00]
+#CHECK: clm    %r15, 15, 4095(%r1)     # encoding: [0xbd,0xff,0x1f,0xff]
+#CHECK: clm    %r0, 0, 4095(%r15)      # encoding: [0xbd,0x00,0xff,0xff]
+#CHECK: clm    %r15, 0, 0              # encoding: [0xbd,0xf0,0x00,0x00]
+
+       clm     %r0, 0, 0
+       clm     %r0, 15, 4095
+       clm     %r0, 0, 0(%r1)
+       clm     %r0, 0, 0(%r15)
+       clm     %r15, 15, 4095(%r1)
+       clm     %r0, 0, 4095(%r15)
+       clm     %r15, 0, 0
+
+#CHECK: clmh   %r0, 0, -524288            # encoding: [0xeb,0x00,0x00,0x00,0x80,0x20]
+#CHECK: clmh   %r0, 0, -1                 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x20]
+#CHECK: clmh   %r0, 15, 0                 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x20]
+#CHECK: clmh   %r0, 15, 1                 # encoding: [0xeb,0x0f,0x00,0x01,0x00,0x20]
+#CHECK: clmh   %r0, 8, 524287             # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x20]
+#CHECK: clmh   %r0, 8, 0(%r1)             # encoding: [0xeb,0x08,0x10,0x00,0x00,0x20]
+#CHECK: clmh   %r0, 4, 0(%r15)            # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x20]
+#CHECK: clmh   %r0, 4, 524287(%r15)       # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x20]
+#CHECK: clmh   %r0, 0, 524287(%r1)        # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x20]
+#CHECK: clmh   %r15, 0, 0                 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0x20]
+
+       clmh    %r0, 0, -524288
+       clmh    %r0, 0, -1
+       clmh    %r0, 15, 0
+       clmh    %r0, 15, 1
+       clmh    %r0, 8, 524287
+       clmh    %r0, 8, 0(%r1)
+       clmh    %r0, 4, 0(%r15)
+       clmh    %r0, 4, 524287(%r15)
+       clmh    %r0, 0, 524287(%r1)
+       clmh    %r15, 0, 0
+
+#CHECK: clmy   %r0, 0, -524288            # encoding: [0xeb,0x00,0x00,0x00,0x80,0x21]
+#CHECK: clmy   %r0, 0, -1                 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x21]
+#CHECK: clmy   %r0, 15, 0                 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x21]
+#CHECK: clmy   %r0, 15, 1                 # encoding: [0xeb,0x0f,0x00,0x01,0x00,0x21]
+#CHECK: clmy   %r0, 8, 524287             # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x21]
+#CHECK: clmy   %r0, 8, 0(%r1)             # encoding: [0xeb,0x08,0x10,0x00,0x00,0x21]
+#CHECK: clmy   %r0, 4, 0(%r15)            # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x21]
+#CHECK: clmy   %r0, 4, 524287(%r15)       # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x21]
+#CHECK: clmy   %r0, 0, 524287(%r1)        # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x21]
+#CHECK: clmy   %r15, 0, 0                 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0x21]
+
+       clmy    %r0, 0, -524288
+       clmy    %r0, 0, -1
+       clmy    %r0, 15, 0
+       clmy    %r0, 15, 1
+       clmy    %r0, 8, 524287
+       clmy    %r0, 8, 0(%r1)
+       clmy    %r0, 4, 0(%r15)
+       clmy    %r0, 4, 524287(%r15)
+       clmy    %r0, 0, 524287(%r1)
+       clmy    %r15, 0, 0
+
 #CHECK: clr    %r0, %r0                # encoding: [0x15,0x00]
 #CHECK: clr    %r0, %r15               # encoding: [0x15,0x0f]
 #CHECK: clr    %r15, %r0               # encoding: [0x15,0xf0]
@@ -6059,6 +6175,22 @@
        cy      %r0, 524287(%r15,%r1)
        cy      %r15, 0
 
+#CHECK: d      %r0, 0                  # encoding: [0x5d,0x00,0x00,0x00]
+#CHECK: d      %r0, 4095               # encoding: [0x5d,0x00,0x0f,0xff]
+#CHECK: d      %r0, 0(%r1)             # encoding: [0x5d,0x00,0x10,0x00]
+#CHECK: d      %r0, 0(%r15)            # encoding: [0x5d,0x00,0xf0,0x00]
+#CHECK: d      %r0, 4095(%r1,%r15)     # encoding: [0x5d,0x01,0xff,0xff]
+#CHECK: d      %r0, 4095(%r15,%r1)     # encoding: [0x5d,0x0f,0x1f,0xff]
+#CHECK: d      %r14, 0                 # encoding: [0x5d,0xe0,0x00,0x00]
+
+       d       %r0, 0
+       d       %r0, 4095
+       d       %r0, 0(%r1)
+       d       %r0, 0(%r15)
+       d       %r0, 4095(%r1,%r15)
+       d       %r0, 4095(%r15,%r1)
+       d       %r14, 0
+
 #CHECK: ddb    %f0, 0                  # encoding: [0xed,0x00,0x00,0x00,0x00,0x1d]
 #CHECK: ddb    %f0, 4095               # encoding: [0xed,0x00,0x0f,0xff,0x00,0x1d]
 #CHECK: ddb    %f0, 0(%r1)             # encoding: [0xed,0x00,0x10,0x00,0x00,0x1d]
@@ -6111,6 +6243,34 @@
        debr    %f7, %f8
        debr    %f15, %f0
 
+#CHECK: didbr  %f0, %f0, %f0, 0        # encoding: [0xb3,0x5b,0x00,0x00]
+#CHECK: didbr  %f0, %f0, %f0, 15       # encoding: [0xb3,0x5b,0x0f,0x00]
+#CHECK: didbr  %f0, %f0, %f15, 0       # encoding: [0xb3,0x5b,0x00,0x0f]
+#CHECK: didbr  %f0, %f15, %f0, 0       # encoding: [0xb3,0x5b,0xf0,0x00]
+#CHECK: didbr  %f4, %f5, %f6, 7        # encoding: [0xb3,0x5b,0x57,0x46]
+#CHECK: didbr  %f15, %f0, %f0, 0       # encoding: [0xb3,0x5b,0x00,0xf0]
+
+       didbr   %f0, %f0, %f0, 0
+       didbr   %f0, %f0, %f0, 15
+       didbr   %f0, %f0, %f15, 0
+       didbr   %f0, %f15, %f0, 0
+       didbr   %f4, %f5, %f6, 7
+       didbr   %f15, %f0, %f0, 0
+
+#CHECK: diebr  %f0, %f0, %f0, 0        # encoding: [0xb3,0x53,0x00,0x00]
+#CHECK: diebr  %f0, %f0, %f0, 15       # encoding: [0xb3,0x53,0x0f,0x00]
+#CHECK: diebr  %f0, %f0, %f15, 0       # encoding: [0xb3,0x53,0x00,0x0f]
+#CHECK: diebr  %f0, %f15, %f0, 0       # encoding: [0xb3,0x53,0xf0,0x00]
+#CHECK: diebr  %f4, %f5, %f6, 7        # encoding: [0xb3,0x53,0x57,0x46]
+#CHECK: diebr  %f15, %f0, %f0, 0       # encoding: [0xb3,0x53,0x00,0xf0]
+
+       diebr   %f0, %f0, %f0, 0
+       diebr   %f0, %f0, %f0, 15
+       diebr   %f0, %f0, %f15, 0
+       diebr   %f0, %f15, %f0, 0
+       diebr   %f4, %f5, %f6, 7
+       diebr   %f15, %f0, %f0, 0
+
 #CHECK: dl     %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x97]
 #CHECK: dl     %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x97]
 #CHECK: dl     %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x97]
@@ -6205,6 +6365,16 @@
        dp      0(1), 0(16,%r1)
        dp      0(1), 0(16,%r15)
 
+#CHECK: dr     %r0, %r0                # encoding: [0x1d,0x00]
+#CHECK: dr     %r0, %r15               # encoding: [0x1d,0x0f]
+#CHECK: dr     %r14, %r0               # encoding: [0x1d,0xe0]
+#CHECK: dr     %r6, %r9                # encoding: [0x1d,0x69]
+
+       dr      %r0,%r0
+       dr      %r0,%r15
+       dr      %r14,%r0
+       dr      %r6,%r9
+
 #CHECK: dsg    %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x0d]
 #CHECK: dsg    %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x0d]
 #CHECK: dsg    %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x0d]
@@ -6626,6 +6796,58 @@
        ipm     %r1
        ipm     %r15
 
+#CHECK: kdb    %f0, 0                  # encoding: [0xed,0x00,0x00,0x00,0x00,0x18]
+#CHECK: kdb    %f0, 4095               # encoding: [0xed,0x00,0x0f,0xff,0x00,0x18]
+#CHECK: kdb    %f0, 0(%r1)             # encoding: [0xed,0x00,0x10,0x00,0x00,0x18]
+#CHECK: kdb    %f0, 0(%r15)            # encoding: [0xed,0x00,0xf0,0x00,0x00,0x18]
+#CHECK: kdb    %f0, 4095(%r1,%r15)     # encoding: [0xed,0x01,0xff,0xff,0x00,0x18]
+#CHECK: kdb    %f0, 4095(%r15,%r1)     # encoding: [0xed,0x0f,0x1f,0xff,0x00,0x18]
+#CHECK: kdb    %f15, 0                 # encoding: [0xed,0xf0,0x00,0x00,0x00,0x18]
+
+       kdb     %f0, 0
+       kdb     %f0, 4095
+       kdb     %f0, 0(%r1)
+       kdb     %f0, 0(%r15)
+       kdb     %f0, 4095(%r1,%r15)
+       kdb     %f0, 4095(%r15,%r1)
+       kdb     %f15, 0
+
+#CHECK: kdbr   %f0, %f0                # encoding: [0xb3,0x18,0x00,0x00]
+#CHECK: kdbr   %f0, %f15               # encoding: [0xb3,0x18,0x00,0x0f]
+#CHECK: kdbr   %f7, %f8                # encoding: [0xb3,0x18,0x00,0x78]
+#CHECK: kdbr   %f15, %f0               # encoding: [0xb3,0x18,0x00,0xf0]
+
+       kdbr    %f0, %f0
+       kdbr    %f0, %f15
+       kdbr    %f7, %f8
+       kdbr    %f15, %f0
+
+#CHECK: keb    %f0, 0                  # encoding: [0xed,0x00,0x00,0x00,0x00,0x08]
+#CHECK: keb    %f0, 4095               # encoding: [0xed,0x00,0x0f,0xff,0x00,0x08]
+#CHECK: keb    %f0, 0(%r1)             # encoding: [0xed,0x00,0x10,0x00,0x00,0x08]
+#CHECK: keb    %f0, 0(%r15)            # encoding: [0xed,0x00,0xf0,0x00,0x00,0x08]
+#CHECK: keb    %f0, 4095(%r1,%r15)     # encoding: [0xed,0x01,0xff,0xff,0x00,0x08]
+#CHECK: keb    %f0, 4095(%r15,%r1)     # encoding: [0xed,0x0f,0x1f,0xff,0x00,0x08]
+#CHECK: keb    %f15, 0                 # encoding: [0xed,0xf0,0x00,0x00,0x00,0x08]
+
+       keb     %f0, 0
+       keb     %f0, 4095
+       keb     %f0, 0(%r1)
+       keb     %f0, 0(%r15)
+       keb     %f0, 4095(%r1,%r15)
+       keb     %f0, 4095(%r15,%r1)
+       keb     %f15, 0
+
+#CHECK: kebr   %f0, %f0                # encoding: [0xb3,0x08,0x00,0x00]
+#CHECK: kebr   %f0, %f15               # encoding: [0xb3,0x08,0x00,0x0f]
+#CHECK: kebr   %f7, %f8                # encoding: [0xb3,0x08,0x00,0x78]
+#CHECK: kebr   %f15, %f0               # encoding: [0xb3,0x08,0x00,0xf0]
+
+       kebr    %f0, %f0
+       kebr    %f0, %f15
+       kebr    %f7, %f8
+       kebr    %f15, %f0
+
 #CHECK: kimd   %r0, %r2                # encoding: [0xb9,0x3e,0x00,0x02]
 #CHECK: kimd   %r0, %r14               # encoding: [0xb9,0x3e,0x00,0x0e]
 #CHECK: kimd   %r15, %r2               # encoding: [0xb9,0x3e,0x00,0xf2]
@@ -6676,6 +6898,16 @@
        kmc     %r14, %r2
        kmc     %r6, %r10
 
+#CHECK: kxbr   %f0, %f0                # encoding: [0xb3,0x48,0x00,0x00]
+#CHECK: kxbr   %f0, %f13               # encoding: [0xb3,0x48,0x00,0x0d]
+#CHECK: kxbr   %f8, %f8                # encoding: [0xb3,0x48,0x00,0x88]
+#CHECK: kxbr   %f13, %f0               # encoding: [0xb3,0x48,0x00,0xd0]
+
+       kxbr    %f0, %f0
+       kxbr    %f0, %f13
+       kxbr    %f8, %f8
+       kxbr    %f13, %f0
+
 #CHECK: l      %r0, 0                  # encoding: [0x58,0x00,0x00,0x00]
 #CHECK: l      %r0, 4095               # encoding: [0x58,0x00,0x0f,0xff]
 #CHECK: l      %r0, 0(%r1)             # encoding: [0x58,0x00,0x10,0x00]
@@ -7885,6 +8117,26 @@
        lm      %r0,%r0,4095(%r1)
        lm      %r0,%r0,4095(%r15)
 
+#CHECK: lmd    %r0, %r0, 0, 0               # encoding: [0xef,0x00,0x00,0x00,0x00,0x00]
+#CHECK: lmd    %r0, %r15, 0, 0              # encoding: [0xef,0x0f,0x00,0x00,0x00,0x00]
+#CHECK: lmd    %r14, %r15, 0, 0             # encoding: [0xef,0xef,0x00,0x00,0x00,0x00]
+#CHECK: lmd    %r15, %r15, 0, 0             # encoding: [0xef,0xff,0x00,0x00,0x00,0x00]
+#CHECK: lmd    %r2, %r4, 0(%r1), 0(%r15)    # encoding: [0xef,0x24,0x10,0x00,0xf0,0x00]
+#CHECK: lmd    %r2, %r4, 1(%r1), 0(%r15)    # encoding: [0xef,0x24,0x10,0x01,0xf0,0x00]
+#CHECK: lmd    %r2, %r4, 4095(%r1), 0(%r15) # encoding: [0xef,0x24,0x1f,0xff,0xf0,0x00]
+#CHECK: lmd    %r2, %r4, 0(%r1), 1(%r15)    # encoding: [0xef,0x24,0x10,0x00,0xf0,0x01]
+#CHECK: lmd    %r2, %r4, 0(%r1), 4095(%r15) # encoding: [0xef,0x24,0x10,0x00,0xff,0xff]
+
+        lmd    %r0, %r0, 0, 0
+        lmd    %r0, %r15, 0, 0
+        lmd    %r14, %r15, 0, 0
+        lmd    %r15, %r15, 0, 0
+        lmd    %r2, %r4, 0(%r1), 0(%r15)
+        lmd    %r2, %r4, 1(%r1), 0(%r15)
+        lmd    %r2, %r4, 4095(%r1), 0(%r15)
+        lmd    %r2, %r4, 0(%r1), 1(%r15)
+        lmd    %r2, %r4, 0(%r1), 4095(%r15)
+
 #CHECK: lmg    %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x04]
 #CHECK: lmg    %r0, %r15, 0            # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x04]
 #CHECK: lmg    %r14, %r15, 0           # encoding: [0xeb,0xef,0x00,0x00,0x00,0x04]
@@ -8430,6 +8682,22 @@
        lzxr    %f8
        lzxr    %f13
 
+#CHECK: m      %r0, 0                  # encoding: [0x5c,0x00,0x00,0x00]
+#CHECK: m      %r0, 4095               # encoding: [0x5c,0x00,0x0f,0xff]
+#CHECK: m      %r0, 0(%r1)             # encoding: [0x5c,0x00,0x10,0x00]
+#CHECK: m      %r0, 0(%r15)            # encoding: [0x5c,0x00,0xf0,0x00]
+#CHECK: m      %r0, 4095(%r1,%r15)     # encoding: [0x5c,0x01,0xff,0xff]
+#CHECK: m      %r0, 4095(%r15,%r1)     # encoding: [0x5c,0x0f,0x1f,0xff]
+#CHECK: m      %r14, 0                 # encoding: [0x5c,0xe0,0x00,0x00]
+
+       m       %r0, 0
+       m       %r0, 4095
+       m       %r0, 0(%r1)
+       m       %r0, 0(%r15)
+       m       %r0, 4095(%r1,%r15)
+       m       %r0, 4095(%r15,%r1)
+       m       %r14, 0
+
 #CHECK: madb   %f0, %f0, 0             # encoding: [0xed,0x00,0x00,0x00,0x00,0x1e]
 #CHECK: madb   %f0, %f0, 4095          # encoding: [0xed,0x00,0x0f,0xff,0x00,0x1e]
 #CHECK: madb   %f0, %f0, 0(%r1)        # encoding: [0xed,0x00,0x10,0x00,0x00,0x1e]
@@ -8576,6 +8844,28 @@
        meebr   %f7, %f8
        meebr   %f15, %f0
 
+#CHECK: mfy    %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x5c]
+#CHECK: mfy    %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x5c]
+#CHECK: mfy    %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x5c]
+#CHECK: mfy    %r0, 1                  # encoding: [0xe3,0x00,0x00,0x01,0x00,0x5c]
+#CHECK: mfy    %r0, 524287             # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x5c]
+#CHECK: mfy    %r0, 0(%r1)             # encoding: [0xe3,0x00,0x10,0x00,0x00,0x5c]
+#CHECK: mfy    %r0, 0(%r15)            # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x5c]
+#CHECK: mfy    %r0, 524287(%r1,%r15)   # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x5c]
+#CHECK: mfy    %r0, 524287(%r15,%r1)   # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0x5c]
+#CHECK: mfy    %r14, 0                 # encoding: [0xe3,0xe0,0x00,0x00,0x00,0x5c]
+
+       mfy     %r0, -524288
+       mfy     %r0, -1
+       mfy     %r0, 0
+       mfy     %r0, 1
+       mfy     %r0, 524287
+       mfy     %r0, 0(%r1)
+       mfy     %r0, 0(%r15)
+       mfy     %r0, 524287(%r1,%r15)
+       mfy     %r0, 524287(%r15,%r1)
+       mfy     %r14, 0
+
 #CHECK: mghi   %r0, -32768             # encoding: [0xa7,0x0d,0x80,0x00]
 #CHECK: mghi   %r0, -1                 # encoding: [0xa7,0x0d,0xff,0xff]
 #CHECK: mghi   %r0, 0                  # encoding: [0xa7,0x0d,0x00,0x00]
@@ -8642,6 +8932,28 @@
        mhy     %r0, 524287(%r15,%r1)
        mhy     %r15, 0
 
+#CHECK: ml     %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x96]
+#CHECK: ml     %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x96]
+#CHECK: ml     %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x96]
+#CHECK: ml     %r0, 1                  # encoding: [0xe3,0x00,0x00,0x01,0x00,0x96]
+#CHECK: ml     %r0, 524287             # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x96]
+#CHECK: ml     %r0, 0(%r1)             # encoding: [0xe3,0x00,0x10,0x00,0x00,0x96]
+#CHECK: ml     %r0, 0(%r15)            # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x96]
+#CHECK: ml     %r0, 524287(%r1,%r15)   # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x96]
+#CHECK: ml     %r0, 524287(%r15,%r1)   # encoding: [0xe3,0x0f,0x1f,0xff,0x7f,0x96]
+#CHECK: ml     %r14, 0                 # encoding: [0xe3,0xe0,0x00,0x00,0x00,0x96]
+
+       ml      %r0, -524288
+       ml      %r0, -1
+       ml      %r0, 0
+       ml      %r0, 1
+       ml      %r0, 524287
+       ml      %r0, 0(%r1)
+       ml      %r0, 0(%r15)
+       ml      %r0, 524287(%r1,%r15)
+       ml      %r0, 524287(%r15,%r1)
+       ml      %r14, 0
+
 #CHECK: mlg    %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x86]
 #CHECK: mlg    %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x86]
 #CHECK: mlg    %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x86]
@@ -8674,6 +8986,16 @@
        mlgr    %r14,%r0
        mlgr    %r6,%r9
 
+#CHECK: mlr    %r0, %r0                # encoding: [0xb9,0x96,0x00,0x00]
+#CHECK: mlr    %r0, %r15               # encoding: [0xb9,0x96,0x00,0x0f]
+#CHECK: mlr    %r14, %r0               # encoding: [0xb9,0x96,0x00,0xe0]
+#CHECK: mlr    %r6, %r9                # encoding: [0xb9,0x96,0x00,0x69]
+
+       mlr     %r0,%r0
+       mlr     %r0,%r15
+       mlr     %r14,%r0
+       mlr     %r6,%r9
+
 #CHECK: mp     0(1), 0(1)              # encoding: [0xfc,0x00,0x00,0x00,0x00,0x00]
 #CHECK: mp     0(1), 0(1,%r1)          # encoding: [0xfc,0x00,0x00,0x00,0x10,0x00]
 #CHECK: mp     0(1), 0(1,%r15)         # encoding: [0xfc,0x00,0x00,0x00,0xf0,0x00]
@@ -8704,6 +9026,16 @@
        mp      0(1), 0(16,%r1)
        mp      0(1), 0(16,%r15)
 
+#CHECK: mr     %r0, %r0                # encoding: [0x1c,0x00]
+#CHECK: mr     %r0, %r15               # encoding: [0x1c,0x0f]
+#CHECK: mr     %r14, %r0               # encoding: [0x1c,0xe0]
+#CHECK: mr     %r6, %r9                # encoding: [0x1c,0x69]
+
+       mr      %r0,%r0
+       mr      %r0,%r15
+       mr      %r14,%r0
+       mr      %r6,%r9
+
 #CHECK: ms     %r0, 0                  # encoding: [0x71,0x00,0x00,0x00]
 #CHECK: ms     %r0, 4095               # encoding: [0x71,0x00,0x0f,0xff]
 #CHECK: ms     %r0, 0(%r1)             # encoding: [0x71,0x00,0x10,0x00]
@@ -10198,6 +10530,32 @@
        sla     %r0,4095(%r1)
        sla     %r0,4095(%r15)
 
+#CHECK: slag   %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0x0b]
+#CHECK: slag   %r15, %r1, 0            # encoding: [0xeb,0xf1,0x00,0x00,0x00,0x0b]
+#CHECK: slag   %r1, %r15, 0            # encoding: [0xeb,0x1f,0x00,0x00,0x00,0x0b]
+#CHECK: slag   %r15, %r15, 0           # encoding: [0xeb,0xff,0x00,0x00,0x00,0x0b]
+#CHECK: slag   %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0x0b]
+#CHECK: slag   %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x0b]
+#CHECK: slag   %r0, %r0, 1             # encoding: [0xeb,0x00,0x00,0x01,0x00,0x0b]
+#CHECK: slag   %r0, %r0, 524287        # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0x0b]
+#CHECK: slag   %r0, %r0, 0(%r1)        # encoding: [0xeb,0x00,0x10,0x00,0x00,0x0b]
+#CHECK: slag   %r0, %r0, 0(%r15)       # encoding: [0xeb,0x00,0xf0,0x00,0x00,0x0b]
+#CHECK: slag   %r0, %r0, 524287(%r1)   # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x0b]
+#CHECK: slag   %r0, %r0, 524287(%r15)  # encoding: [0xeb,0x00,0xff,0xff,0x7f,0x0b]
+
+       slag    %r0,%r0,0
+       slag    %r15,%r1,0
+       slag    %r1,%r15,0
+       slag    %r15,%r15,0
+       slag    %r0,%r0,-524288
+       slag    %r0,%r0,-1
+       slag    %r0,%r0,1
+       slag    %r0,%r0,524287
+       slag    %r0,%r0,0(%r1)
+       slag    %r0,%r0,0(%r15)
+       slag    %r0,%r0,524287(%r1)
+       slag    %r0,%r0,524287(%r15)
+
 #CHECK: slb    %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x99]
 #CHECK: slb    %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x99]
 #CHECK: slb    %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x99]
@@ -10262,6 +10620,42 @@
        slbr    %r15,%r0
        slbr    %r7,%r8
 
+#CHECK: slda   %r0, 0                  # encoding: [0x8f,0x00,0x00,0x00]
+#CHECK: slda   %r6, 0                  # encoding: [0x8f,0x60,0x00,0x00]
+#CHECK: slda   %r14, 0                 # encoding: [0x8f,0xe0,0x00,0x00]
+#CHECK: slda   %r0, 4095               # encoding: [0x8f,0x00,0x0f,0xff]
+#CHECK: slda   %r0, 0(%r1)             # encoding: [0x8f,0x00,0x10,0x00]
+#CHECK: slda   %r0, 0(%r15)            # encoding: [0x8f,0x00,0xf0,0x00]
+#CHECK: slda   %r0, 4095(%r1)          # encoding: [0x8f,0x00,0x1f,0xff]
+#CHECK: slda   %r0, 4095(%r15)         # encoding: [0x8f,0x00,0xff,0xff]
+
+       slda    %r0,0
+       slda    %r6,0
+       slda    %r14,0
+       slda    %r0,4095
+       slda    %r0,0(%r1)
+       slda    %r0,0(%r15)
+       slda    %r0,4095(%r1)
+       slda    %r0,4095(%r15)
+
+#CHECK: sldl   %r0, 0                  # encoding: [0x8d,0x00,0x00,0x00]
+#CHECK: sldl   %r6, 0                  # encoding: [0x8d,0x60,0x00,0x00]
+#CHECK: sldl   %r14, 0                 # encoding: [0x8d,0xe0,0x00,0x00]
+#CHECK: sldl   %r0, 4095               # encoding: [0x8d,0x00,0x0f,0xff]
+#CHECK: sldl   %r0, 0(%r1)             # encoding: [0x8d,0x00,0x10,0x00]
+#CHECK: sldl   %r0, 0(%r15)            # encoding: [0x8d,0x00,0xf0,0x00]
+#CHECK: sldl   %r0, 4095(%r1)          # encoding: [0x8d,0x00,0x1f,0xff]
+#CHECK: sldl   %r0, 4095(%r15)         # encoding: [0x8d,0x00,0xff,0xff]
+
+       sldl    %r0,0
+       sldl    %r6,0
+       sldl    %r14,0
+       sldl    %r0,4095
+       sldl    %r0,0(%r1)
+       sldl    %r0,0(%r15)
+       sldl    %r0,4095(%r1)
+       sldl    %r0,4095(%r15)
+
 #CHECK: slfi   %r0, 0                  # encoding: [0xc2,0x05,0x00,0x00,0x00,0x00]
 #CHECK: slfi   %r0, 4294967295         # encoding: [0xc2,0x05,0xff,0xff,0xff,0xff]
 #CHECK: slfi   %r15, 0                 # encoding: [0xc2,0xf5,0x00,0x00,0x00,0x00]
@@ -10572,6 +10966,42 @@
        srag    %r0,%r0,524287(%r1)
        srag    %r0,%r0,524287(%r15)
 
+#CHECK: srda   %r0, 0                  # encoding: [0x8e,0x00,0x00,0x00]
+#CHECK: srda   %r6, 0                  # encoding: [0x8e,0x60,0x00,0x00]
+#CHECK: srda   %r14, 0                 # encoding: [0x8e,0xe0,0x00,0x00]
+#CHECK: srda   %r0, 4095               # encoding: [0x8e,0x00,0x0f,0xff]
+#CHECK: srda   %r0, 0(%r1)             # encoding: [0x8e,0x00,0x10,0x00]
+#CHECK: srda   %r0, 0(%r15)            # encoding: [0x8e,0x00,0xf0,0x00]
+#CHECK: srda   %r0, 4095(%r1)          # encoding: [0x8e,0x00,0x1f,0xff]
+#CHECK: srda   %r0, 4095(%r15)         # encoding: [0x8e,0x00,0xff,0xff]
+
+       srda    %r0,0
+       srda    %r6,0
+       srda    %r14,0
+       srda    %r0,4095
+       srda    %r0,0(%r1)
+       srda    %r0,0(%r15)
+       srda    %r0,4095(%r1)
+       srda    %r0,4095(%r15)
+
+#CHECK: srdl   %r0, 0                  # encoding: [0x8c,0x00,0x00,0x00]
+#CHECK: srdl   %r6, 0                  # encoding: [0x8c,0x60,0x00,0x00]
+#CHECK: srdl   %r14, 0                 # encoding: [0x8c,0xe0,0x00,0x00]
+#CHECK: srdl   %r0, 4095               # encoding: [0x8c,0x00,0x0f,0xff]
+#CHECK: srdl   %r0, 0(%r1)             # encoding: [0x8c,0x00,0x10,0x00]
+#CHECK: srdl   %r0, 0(%r15)            # encoding: [0x8c,0x00,0xf0,0x00]
+#CHECK: srdl   %r0, 4095(%r1)          # encoding: [0x8c,0x00,0x1f,0xff]
+#CHECK: srdl   %r0, 4095(%r15)         # encoding: [0x8c,0x00,0xff,0xff]
+
+       srdl    %r0,0
+       srdl    %r6,0
+       srdl    %r14,0
+       srdl    %r0,4095
+       srdl    %r0,0(%r1)
+       srdl    %r0,0(%r15)
+       srdl    %r0,4095(%r1)
+       srdl    %r0,4095(%r15)
+
 #CHECK: srl    %r0, 0                  # encoding: [0x88,0x00,0x00,0x00]
 #CHECK: srl    %r7, 0                  # encoding: [0x88,0x70,0x00,0x00]
 #CHECK: srl    %r15, 0                 # encoding: [0x88,0xf0,0x00,0x00]
@@ -10816,6 +11246,66 @@
        stckf   4095(%r1)
        stckf   4095(%r15)
 
+#CHECK: stcm   %r0, 0, 0               # encoding: [0xbe,0x00,0x00,0x00]
+#CHECK: stcm   %r0, 15, 4095           # encoding: [0xbe,0x0f,0x0f,0xff]
+#CHECK: stcm   %r0, 0, 0(%r1)          # encoding: [0xbe,0x00,0x10,0x00]
+#CHECK: stcm   %r0, 0, 0(%r15)         # encoding: [0xbe,0x00,0xf0,0x00]
+#CHECK: stcm   %r15, 15, 4095(%r1)     # encoding: [0xbe,0xff,0x1f,0xff]
+#CHECK: stcm   %r0, 0, 4095(%r15)      # encoding: [0xbe,0x00,0xff,0xff]
+#CHECK: stcm   %r15, 0, 0              # encoding: [0xbe,0xf0,0x00,0x00]
+
+       stcm    %r0, 0, 0
+       stcm    %r0, 15, 4095
+       stcm    %r0, 0, 0(%r1)
+       stcm    %r0, 0, 0(%r15)
+       stcm    %r15, 15, 4095(%r1)
+       stcm    %r0, 0, 4095(%r15)
+       stcm    %r15, 0, 0
+
+#CHECK: stcmh  %r0, 0, -524288            # encoding: [0xeb,0x00,0x00,0x00,0x80,0x2c]
+#CHECK: stcmh  %r0, 0, -1                 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x2c]
+#CHECK: stcmh  %r0, 15, 0                 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x2c]
+#CHECK: stcmh  %r0, 15, 1                 # encoding: [0xeb,0x0f,0x00,0x01,0x00,0x2c]
+#CHECK: stcmh  %r0, 8, 524287             # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x2c]
+#CHECK: stcmh  %r0, 8, 0(%r1)             # encoding: [0xeb,0x08,0x10,0x00,0x00,0x2c]
+#CHECK: stcmh  %r0, 4, 0(%r15)            # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x2c]
+#CHECK: stcmh  %r0, 4, 524287(%r15)       # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x2c]
+#CHECK: stcmh  %r0, 0, 524287(%r1)        # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x2c]
+#CHECK: stcmh  %r15, 0, 0                 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0x2c]
+
+       stcmh   %r0, 0, -524288
+       stcmh   %r0, 0, -1
+       stcmh   %r0, 15, 0
+       stcmh   %r0, 15, 1
+       stcmh   %r0, 8, 524287
+       stcmh   %r0, 8, 0(%r1)
+       stcmh   %r0, 4, 0(%r15)
+       stcmh   %r0, 4, 524287(%r15)
+       stcmh   %r0, 0, 524287(%r1)
+       stcmh   %r15, 0, 0
+
+#CHECK: stcmy  %r0, 0, -524288            # encoding: [0xeb,0x00,0x00,0x00,0x80,0x2d]
+#CHECK: stcmy  %r0, 0, -1                 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x2d]
+#CHECK: stcmy  %r0, 15, 0                 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0x2d]
+#CHECK: stcmy  %r0, 15, 1                 # encoding: [0xeb,0x0f,0x00,0x01,0x00,0x2d]
+#CHECK: stcmy  %r0, 8, 524287             # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x2d]
+#CHECK: stcmy  %r0, 8, 0(%r1)             # encoding: [0xeb,0x08,0x10,0x00,0x00,0x2d]
+#CHECK: stcmy  %r0, 4, 0(%r15)            # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x2d]
+#CHECK: stcmy  %r0, 4, 524287(%r15)       # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x2d]
+#CHECK: stcmy  %r0, 0, 524287(%r1)        # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x2d]
+#CHECK: stcmy  %r15, 0, 0                 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0x2d]
+
+       stcmy   %r0, 0, -524288
+       stcmy   %r0, 0, -1
+       stcmy   %r0, 15, 0
+       stcmy   %r0, 15, 1
+       stcmy   %r0, 8, 524287
+       stcmy   %r0, 8, 0(%r1)
+       stcmy   %r0, 4, 0(%r15)
+       stcmy   %r0, 4, 524287(%r15)
+       stcmy   %r0, 0, 524287(%r1)
+       stcmy   %r15, 0, 0
+
 #CHECK: stcy   %r0, -524288            # encoding: [0xe3,0x00,0x00,0x00,0x80,0x72]
 #CHECK: stcy   %r0, -1                 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x72]
 #CHECK: stcy   %r0, 0                  # encoding: [0xe3,0x00,0x00,0x00,0x00,0x72]