// Try to generate X86ISD::FMADDSUB node here.
SDValue Opnd2;
+ // TODO: According to coverage reports, the FMADDSUB transform is not
+ // triggered by any tests.
if (isFMAddSub(Subtarget, DAG, Opnd0, Opnd1, Opnd2))
return DAG.getNode(X86ISD::FMADDSUB, DL, VT, Opnd0, Opnd1, Opnd2);
return VectorConstant;
BuildVectorSDNode *BV = cast<BuildVectorSDNode>(Op.getNode());
+ // TODO: Support FMSUBADD here if we ever get tests for the FMADDSUB
+ // transform here.
if (SDValue AddSub = lowerToAddSubOrFMAddSub(BV, Subtarget, DAG))
return AddSub;
if (SDValue HorizontalOp = LowerToHorizontalOp(BV, Subtarget, DAG))