2009-09-01 Hans Boehm <Hans.Boehm@hp.com> (Really mostly Patrick Marlier)

	* src/atomic_ops/sysdeps/gcc/sparc.h (AO_test_and_set_full): Use
	AO_TS_VAL_t for "oldval" (for 64-bit support).
	* src/atomic_ops/sysdeps/gcc/sparc.h (AO_compare_and_swap_full):
	New function implemented.

diff --git a/ChangeLog b/ChangeLog
index 4965e3eba9311bc4431c3ff4eb5de5964fd33dca..673f82be61f1c9089b87723a6ff98441a86e3c19 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,11 @@
+2009-09-01 Hans Boehm <Hans.Boehm@hp.com> (Really mostly Patrick Marlier)
+       * src/atomic_ops/sysdeps/gcc/sparc.h (AO_test_and_set_full): Use
+       AO_TS_VAL_t for "oldval" (for 64-bit support).
+       * src/atomic_ops/sysdeps/gcc/sparc.h (AO_compare_and_swap_full):
+       New function implemented.
+       
 2009-08-12 Hans Boehm <Hans.Boehm@hp.com> (Really Ivan Maidanski)
-       (diff107_cvs)
+       (diff107_cvs, resembling diff78 and diff88_cvs)
 
        * src/atomic_ops/sysdeps/sunc/x86.h: New file.
         * src/atomic_ops/sysdeps/sunc/x86_64.h: Ditto.

diff --git a/src/atomic_ops/sysdeps/gcc/sparc.h b/src/atomic_ops/sysdeps/gcc/sparc.h
index 4850855d651dacbd14de391405f747edc169a693..a1936c4f1173480086674cf096d104c750cb64a3 100644 (file)
--- a/src/atomic_ops/sysdeps/gcc/sparc.h
+++ b/src/atomic_ops/sysdeps/gcc/sparc.h
@@ -29,7 +29,7 @@
 
 AO_INLINE AO_TS_VAL_t
 AO_test_and_set_full(volatile AO_TS_t *addr) {
-  int oldval;
+   AO_TS_VAL_t oldval;
 
    __asm__ __volatile__("ldstub %1,%0"
                        : "=r"(oldval), "=m"(*addr)
@@ -39,6 +39,32 @@ AO_test_and_set_full(volatile AO_TS_t *addr) {
 
 #define AO_HAVE_test_and_set_full
 
+#ifndef NO_SPARC_V9
+/* Returns nonzero if the comparison succeeded. */
+AO_INLINE int
+AO_compare_and_swap_full(volatile AO_t *addr, AO_t old, AO_t new_val) {
+  char ret;
+  __asm__ __volatile__ ("membar #StoreLoad | #LoadLoad\n\t"
+#                      if defined(__arch64__)
+                         "casx [%2],%0,%1\n\t"
+#                      else
+                         "cas [%2],%0,%1\n\t" /* 32-bit version */
+#                      endif
+                       "membar #StoreLoad | #StoreStore\n\t"
+                       "cmp %0,%1\n\t"
+                       "be,a 0f\n\t"
+                       "mov 1,%0\n\t"/* one insn after branch always executed */
+                       "clr %0\n\t"
+                       "0:\n\t"
+                       : "=r" (ret), "+r" (new_val)
+                       : "r" (addr), "0" (old)
+                       : "memory", "cc");
+  return (int)ret;
+}
+
+#define AO_HAVE_compare_and_swap_full
+#endif /* NO_SPARC_V9 */
+
 /* FIXME: This needs to be extended for SPARC v8 and v9.       */
 /* SPARC V8 also has swap.  V9 has CAS.                                */
 /* There are barriers like membar #LoadStore.                  */