}
def VABSH : AHuI<0b11101, 0b11, 0b0000, 0b11, 0,
- (outs SPR:$Sd), (ins SPR:$Sm),
+ (outs HPR:$Sd), (ins HPR:$Sm),
IIC_fpUNA16, "vabs", ".f16\t$Sd, $Sm",
- []>;
+ [(set HPR:$Sd, (fabs (f16 HPR:$Sm)))]>;
let Defs = [FPSCR_NZCV] in {
def VCMPEZD : ADuI<0b11101, 0b11, 0b0101, 0b11, 0,
; ret void
;}
-; FIXME
-;define void @test_fabs(half* %p) {
-; %a = load half, half* %p, align 2
-; %r = call half @llvm.fabs.f16(half %a)
-; store half %r, half* %p
-; ret void
-;}
+define void @test_fabs(half* %p) {
+; CHECK-LABEL: test_fabs:
+; CHECK: vldr.16 s0, [r0]
+; CHECK-NEXT: vabs.f16 s0, s0
+; CHECK-NEXT: vstr.16 s0, [r0]
+; CHECK-NEXT: bx lr
+ %a = load half, half* %p, align 2
+ %r = call half @llvm.fabs.f16(half %a)
+ store half %r, half* %p
+ ret void
+}
define void @test_minnum(half* %p, half* %q) {
; CHECK-LABEL: test_minnum: