1. move settings of WIFI_CLK_EN_REG for bluetooth into controller init/deinit APIs
2. modify the bit mask used in phy_rf init/deinit to use WIFI-BT shared bits
#include "esp_log.h"
#include "esp_pm.h"
#include "esp_ipc.h"
+#include "driver/periph_ctrl.h"
#if CONFIG_BT_ENABLED
btdm_controller_mem_init();
+ periph_module_enable(PERIPH_BT_MODULE);
+
btdm_cfg_mask = btdm_config_mask_load();
ret = btdm_controller_init(btdm_cfg_mask, cfg);
return ESP_ERR_NO_MEM;
}
+ periph_module_disable(PERIPH_BT_MODULE);
+
btdm_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
#ifdef CONFIG_PM_ENABLE
-Subproject commit 9a8e4ee159e59bb7308f3b5f6fcb89049da48777
+Subproject commit 8e62573de3dd9565b2209a3e8fe19a9900320b77
PERIPH_SDIO_SLAVE_MODULE,
PERIPH_CAN_MODULE,
PERIPH_EMAC_MODULE,
+ PERIPH_BT_MODULE,
+ PERIPH_WIFI_BT_COMMON_MODULE,
} periph_module_t;
/**
return DPORT_CAN_CLK_EN;
case PERIPH_EMAC_MODULE:
return DPORT_WIFI_CLK_EMAC_EN;
+ case PERIPH_BT_MODULE:
+ return DPORT_WIFI_CLK_BT_EN_M;
+ case PERIPH_WIFI_BT_COMMON_MODULE:
+ return DPORT_WIFI_CLK_WIFI_BT_COMMON_M;
default:
return 0;
}
return DPORT_CAN_RST;
case PERIPH_EMAC_MODULE:
return DPORT_WIFI_CLK_EMAC_EN;
+ case PERIPH_BT_MODULE:
+ case PERIPH_WIFI_BT_COMMON_MODULE:
+ return 0;
default:
return 0;
}
case PERIPH_SDMMC_MODULE:
case PERIPH_SDIO_SLAVE_MODULE:
case PERIPH_EMAC_MODULE:
+ case PERIPH_BT_MODULE:
+ case PERIPH_WIFI_BT_COMMON_MODULE:
return true;
default:
return false;
#include "phy.h"
#include "phy_init_data.h"
#include "esp_coexist.h"
+#include "driver/periph_ctrl.h"
static const char* TAG = "phy_init";
_lock_acquire(&s_phy_rf_init_lock);
if (s_phy_rf_init_count == 0) {
// Enable WiFi peripheral clock
- DPORT_SET_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN | DPORT_WIFI_CLK_RNG_EN);
+ periph_module_enable(PERIPH_WIFI_BT_COMMON_MODULE);
ESP_LOGV(TAG, "register_chipv7_phy, init_data=%p, cal_data=%p, mode=%d",
init_data, calibration_data, mode);
phy_set_wifi_mode_only(0);
// Disable PHY and RF.
phy_close_rf();
// Disable WiFi peripheral clock. Do not disable clock for hardware RNG
- DPORT_CLEAR_PERI_REG_MASK(DPORT_WIFI_CLK_EN_REG, DPORT_WIFI_CLK_WIFI_EN);
+ periph_module_disable(PERIPH_WIFI_BT_COMMON_MODULE);
} else {
#if CONFIG_SW_COEXIST_ENABLE
coex_deinit();
#define DPORT_WIFI_CLK_BT_EN_M ((DPORT_WIFI_CLK_BT_EN_V)<<(DPORT_WIFI_CLK_BT_EN_S))
#define DPORT_WIFI_CLK_BT_EN_V 0x61
#define DPORT_WIFI_CLK_BT_EN_S 11
+/* Mask for clock bits used by both WIFI and Bluetooth, bit 0, 3, 6, 7, 8, 9 */
+#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
+
/* Remaining single bit clock masks */
#define DPORT_WIFI_CLK_SDIOSLAVE_EN BIT(4)
#define DPORT_WIFI_CLK_UNUSED_BIT5 BIT(5)