AMDGPU: s_waitcnt field should be treated as unsigned

Also make it an ImmLeaf, so it should work with global isel as well,
which was part of the point of moving it in the first place.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365842 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AMDGPU/SIInstrInfo.td b/lib/Target/AMDGPU/SIInstrInfo.td
index 5792efedb903bf0867fc0fcc8ac65db5a789bfad..91843f308a043e8096dbeac1caecb499d9dbfb15 100644 (file)
--- a/lib/Target/AMDGPU/SIInstrInfo.td
+++ b/lib/Target/AMDGPU/SIInstrInfo.td
@@ -622,8 +622,12 @@ class bitextract_imm<int bitnum> : SDNodeXForm<imm, [{
   return CurDAG->getTargetConstant(Bit, SDLoc(N), MVT::i1);
 }]>;
 
-def SIMM16bit : PatLeaf <(imm),
-  [{return isInt<16>(N->getSExtValue());}]
+def SIMM16bit : ImmLeaf <i32,
+  [{return isInt<16>(Imm);}]
+>;
+
+def UIMM16bit : ImmLeaf <i32,
+  [{return isUInt<16>(Imm); }]
 >;
 
 class InlineImm <ValueType vt> : PatLeaf <(vt imm), [{

diff --git a/lib/Target/AMDGPU/SOPInstructions.td b/lib/Target/AMDGPU/SOPInstructions.td
index 480772b4974f5b9971633984bd74881f31c56de0..f46bee126043d62df7004eb7672df78c466b9a2c 100644 (file)
--- a/lib/Target/AMDGPU/SOPInstructions.td
+++ b/lib/Target/AMDGPU/SOPInstructions.td
@@ -1090,7 +1090,7 @@ def S_WAKEUP : SOPP <0x00000003, (ins), "s_wakeup"> {
 
 let mayLoad = 1, mayStore = 1, hasSideEffects = 1 in
 def S_WAITCNT : SOPP <0x0000000c, (ins WAIT_FLAG:$simm16), "s_waitcnt $simm16",
-    [(int_amdgcn_s_waitcnt SIMM16bit:$simm16)]>;
+    [(int_amdgcn_s_waitcnt UIMM16bit:$simm16)]>;
 def S_SETHALT : SOPP <0x0000000d, (ins i16imm:$simm16), "s_sethalt $simm16">;
 def S_SETKILL : SOPP <0x0000000b, (ins i16imm:$simm16), "s_setkill $simm16">;
 

diff --git a/test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll b/test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll
index dbe48067187145f59f33fc6290d5cb45285cc441..51cd4e053b96e7d5b60b7f1268f7b7ccc3ea9f2f 100644 (file)
--- a/test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll
+++ b/test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll
@@ -31,6 +31,18 @@ define amdgpu_ps void @test2(<8 x i32> inreg %rsrc, i32 %c) {
   ret void
 }
 
+; CHECK-LABEL: {{^}}test3:
+; CHECK: image_load
+; CHECK: s_waitcnt vmcnt(0) lgkmcnt(0)
+; CHECK: image_store
+define amdgpu_ps void @test3(<8 x i32> inreg %rsrc, i32 %c) {
+  %t = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32 15, i32 %c, <8 x i32> %rsrc, i32 0, i32 0)
+  call void @llvm.amdgcn.s.waitcnt(i32 49279) ; not isInt<16>, but isUInt<16>
+  %c.1 = mul i32 %c, 2
+  call void @llvm.amdgcn.image.store.1d.v4f32.i32(<4 x float> %t, i32 15, i32 %c.1, <8 x i32> %rsrc, i32 0, i32 0)
+  ret void
+}
+
 declare void @llvm.amdgcn.s.waitcnt(i32) #0
 
 declare <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32(i32, i32, <8 x i32>, i32, i32) #1