let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SBWriteResGroup0], (instregex "CVTSS2SDrr")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "PSLLDri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "PSLLQri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "PSLLWri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "PSRADri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "PSRAWri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "PSRLDri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "PSRLQri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "PSRLWri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VCVTSS2SDrr")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VPMOVMSKBrr")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VPSLLDri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VPSLLQri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VPSLLWri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VPSRADri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VPSRAWri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VPSRLDri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VPSRLQri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VPSRLWri")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VTESTPDYrr")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VTESTPDrr")>;\r
-def: InstRW<[SBWriteResGroup0], (instregex "VTESTPSYrr")>;\r
+def: InstRW<[SBWriteResGroup0], (instregex "CVTSS2SDrr")>;
+def: InstRW<[SBWriteResGroup0], (instregex "PSLLDri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "PSLLQri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "PSLLWri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "PSRADri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "PSRAWri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "PSRLDri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "PSRLQri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "PSRLWri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VCVTSS2SDrr")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VPMOVMSKBrr")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VPSLLDri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VPSLLQri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VPSLLWri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VPSRADri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VPSRAWri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VPSRLDri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VPSRLQri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VPSRLWri")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VTESTPDYrr")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VTESTPDrr")>;
+def: InstRW<[SBWriteResGroup0], (instregex "VTESTPSYrr")>;
def: InstRW<[SBWriteResGroup0], (instregex "VTESTPSrr")>;
def SBWriteResGroup1 : SchedWriteRes<[SBPort1]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SBWriteResGroup2], (instregex "ANDNPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "ANDNPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "ANDPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "ANDPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "FDECSTP")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "FFREE")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "FINCSTP")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "FNOP")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "INSERTPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JAE_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JAE_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JA_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JA_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JBE_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JBE_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JB_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JB_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JE_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JE_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JGE_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JGE_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JG_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JG_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JLE_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JLE_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JL_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JL_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JMP64r")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JMP_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JMP_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JNE_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JNE_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JNO_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JNO_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JNP_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JNP_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JNS_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JNS_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JO_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JO_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JP_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JP_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JS_1")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "JS_4")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "LD_Frr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "LOOP")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "LOOPE")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "LOOPNE")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOV64toPQIrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVAPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVAPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVDDUPrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVDI2PDIrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVHLPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVLHPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVSDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVSHDUPrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVSLDUPrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVSSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVUPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "MOVUPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "ORPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "ORPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "RETQ")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "SHUFPDrri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "SHUFPSrri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "ST_FPrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "ST_Frr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "UNPCKHPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "UNPCKHPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "UNPCKLPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "UNPCKLPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VANDNPDYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VANDNPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VANDNPSYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VANDNPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VANDPDYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VANDPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VANDPSYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VANDPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VEXTRACTF128rr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VINSERTF128rr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VINSERTPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOV64toPQIrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPDYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPSYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVDDUPYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVDDUPrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVDI2PDIrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVSDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVSLDUPYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVSLDUPrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVSSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPDYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPSYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VORPDYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VORPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VORPSYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VORPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VPERM2F128rr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDYri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSYri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPDYrri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPDrri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPSYrri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPSrri")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPDYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPSYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPDYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPSYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VXORPDYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VXORPDrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VXORPSYrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "VXORPSrr")>;\r
-def: InstRW<[SBWriteResGroup2], (instregex "XORPDrr")>;\r
+def: InstRW<[SBWriteResGroup2], (instregex "ANDNPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "ANDNPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "ANDPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "ANDPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "FDECSTP")>;
+def: InstRW<[SBWriteResGroup2], (instregex "FFREE")>;
+def: InstRW<[SBWriteResGroup2], (instregex "FINCSTP")>;
+def: InstRW<[SBWriteResGroup2], (instregex "FNOP")>;
+def: InstRW<[SBWriteResGroup2], (instregex "INSERTPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JAE_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JAE_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JA_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JA_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JBE_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JBE_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JB_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JB_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JE_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JE_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JGE_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JGE_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JG_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JG_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JLE_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JLE_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JL_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JL_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JMP64r")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JMP_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JMP_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JNE_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JNE_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JNO_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JNO_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JNP_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JNP_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JNS_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JNS_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JO_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JO_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JP_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JP_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JS_1")>;
+def: InstRW<[SBWriteResGroup2], (instregex "JS_4")>;
+def: InstRW<[SBWriteResGroup2], (instregex "LD_Frr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "LOOP")>;
+def: InstRW<[SBWriteResGroup2], (instregex "LOOPE")>;
+def: InstRW<[SBWriteResGroup2], (instregex "LOOPNE")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOV64toPQIrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVAPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVAPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVDDUPrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVDI2PDIrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVHLPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVLHPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVSDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVSHDUPrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVSLDUPrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVSSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVUPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "MOVUPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "ORPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "ORPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "RETQ")>;
+def: InstRW<[SBWriteResGroup2], (instregex "SHUFPDrri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "SHUFPSrri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "ST_FPrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "ST_Frr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "UNPCKHPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "UNPCKHPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "UNPCKLPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "UNPCKLPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VANDNPDYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VANDNPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VANDNPSYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VANDNPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VANDPDYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VANDPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VANDPSYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VANDPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VEXTRACTF128rr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VINSERTF128rr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VINSERTPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOV64toPQIrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPDYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPSYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVAPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVDDUPYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVDDUPrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVDI2PDIrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVHLPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVSDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVSHDUPrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVSLDUPYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVSLDUPrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVSSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPDYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPSYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VMOVUPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VORPDYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VORPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VORPSYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VORPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VPERM2F128rr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDYri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSYri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VPERMILPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPDYrri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPDrri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPSYrri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VSHUFPSrri")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPDYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPSYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKHPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPDYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPSYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VUNPCKLPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VXORPDYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VXORPDrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VXORPSYrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "VXORPSrr")>;
+def: InstRW<[SBWriteResGroup2], (instregex "XORPDrr")>;
def: InstRW<[SBWriteResGroup2], (instregex "XORPSrr")>;
def SBWriteResGroup3 : SchedWriteRes<[SBPort01]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SBWriteResGroup4], (instregex "BLENDPDrri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "BLENDPSrri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "BT(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "BT(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "BTC(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "BTC(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "BTR(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "BTR(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "BTS(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "BTS(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "CDQ")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "CQO")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "LAHF")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SAHF")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SAR(16|32|64)ri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SAR8ri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETAEr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETBr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETEr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETGEr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETGr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETLEr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETLr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETNEr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETNOr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETNPr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETNSr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETOr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETPr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SETSr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SHL(16|32|64)ri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SHL(16|32|64)r1")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SHL8r1")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SHL8ri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SHR(16|32|64)ri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "SHR8ri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDYrri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDrri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPSYrri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPSrri")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQAYrr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQArr")>;\r
-def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQUYrr")>;\r
+def: InstRW<[SBWriteResGroup4], (instregex "BLENDPDrri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "BLENDPSrri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "BT(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup4], (instregex "BT(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "BTC(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup4], (instregex "BTC(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "BTR(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup4], (instregex "BTR(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "BTS(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup4], (instregex "BTS(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "CDQ")>;
+def: InstRW<[SBWriteResGroup4], (instregex "CQO")>;
+def: InstRW<[SBWriteResGroup4], (instregex "LAHF")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SAHF")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SAR(16|32|64)ri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SAR8ri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETAEr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETBr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETEr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETGEr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETGr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETLEr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETLr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETNEr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETNOr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETNPr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETNSr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETOr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETPr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SETSr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SHL(16|32|64)ri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SHL(16|32|64)r1")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SHL8r1")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SHL8ri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SHR(16|32|64)ri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "SHR8ri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDYrri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDrri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPSYrri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPSrri")>;
+def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQAYrr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQArr")>;
+def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQUYrr")>;
def: InstRW<[SBWriteResGroup4], (instregex "VMOVDQUrr")>;
def SBWriteResGroup5 : SchedWriteRes<[SBPort15]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSBrr64")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSDrr64")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSWrr64")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "MMX_PADDQirr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "MMX_PALIGNR64irr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSHUFBrr64")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNBrr64")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNDrr64")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNWrr64")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PABSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PABSDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PABSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PACKSSDWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PACKSSWBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PACKUSDWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PACKUSWBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PADDBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PADDDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PADDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PADDSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PADDSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PADDUSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PADDUSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PADDWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PALIGNRrri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PAVGBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PAVGWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PBLENDWrri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMAXSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMAXSDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMAXSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMAXUBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMAXUDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMAXUWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMINSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMINSDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMINSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMINUBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMINUDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMINUWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXWDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXWQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXWDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXWQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSHUFBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSHUFDri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSHUFHWri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSHUFLWri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSIGNBrr128")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSIGNDrr128")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSIGNWrr128")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSLLDQri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSRLDQri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSUBBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSUBDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSUBQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSUBSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSUBSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSUBUSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSUBUSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PSUBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHQDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHWDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLQDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLWDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPABSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPABSDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPABSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPACKSSDWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPACKSSWBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPACKUSDWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPACKUSWBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPADDBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPADDDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPADDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPADDSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPADDSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPADDUSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPADDUSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPADDWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPALIGNRrri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPAVGBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPAVGWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPBLENDWrri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMINSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMINSDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMINSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMINUBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMINUDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMINUWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXWDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXWQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXWDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXWQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFDri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFHWri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFLWri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNBrr128")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNDrr128")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNWrr128")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSLLDQri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSRLDQri")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSUBBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSUBDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSUBQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSUBSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSUBSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSUBUSBrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSUBUSWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPSUBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHQDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHWDrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLBWrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLDQrr")>;\r
-def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLQDQrr")>;\r
+def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSBrr64")>;
+def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSDrr64")>;
+def: InstRW<[SBWriteResGroup5], (instregex "MMX_PABSWrr64")>;
+def: InstRW<[SBWriteResGroup5], (instregex "MMX_PADDQirr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "MMX_PALIGNR64irr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSHUFBrr64")>;
+def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNBrr64")>;
+def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNDrr64")>;
+def: InstRW<[SBWriteResGroup5], (instregex "MMX_PSIGNWrr64")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PABSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PABSDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PABSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PACKSSDWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PACKSSWBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PACKUSDWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PACKUSWBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PADDBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PADDDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PADDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PADDSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PADDSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PADDUSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PADDUSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PADDWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PALIGNRrri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PAVGBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PAVGWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PBLENDWrri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PCMPEQWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PCMPGTWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMAXSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMAXSDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMAXSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMAXUBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMAXUDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMAXUWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMINSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMINSDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMINSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMINUBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMINUDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMINUWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXWDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVSXWQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXWDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PMOVZXWQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSHUFBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSHUFDri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSHUFHWri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSHUFLWri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSIGNBrr128")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSIGNDrr128")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSIGNWrr128")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSLLDQri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSRLDQri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSUBBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSUBDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSUBQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSUBSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSUBSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSUBUSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSUBUSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PSUBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHQDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKHWDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLQDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "PUNPCKLWDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPABSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPABSDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPABSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPACKSSDWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPACKSSWBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPACKUSDWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPACKUSWBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPADDBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPADDDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPADDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPADDSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPADDSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPADDUSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPADDUSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPADDWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPALIGNRrri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPAVGBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPAVGWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPBLENDWrri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPCMPEQWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPCMPGTWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMAXSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMAXUWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMINSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMINSDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMINSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMINUBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMINUDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMINUWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXWDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVSXWQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXWDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPMOVZXWQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFDri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFHWri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSHUFLWri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNBrr128")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNDrr128")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSIGNWrr128")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSLLDQri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSRLDQri")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSUBBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSUBDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSUBQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSUBSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSUBSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSUBUSBrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSUBUSWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPSUBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHQDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKHWDrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLBWrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLDQrr")>;
+def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLQDQrr")>;
def: InstRW<[SBWriteResGroup5], (instregex "VPUNPCKLWDrr")>;
def SBWriteResGroup6 : SchedWriteRes<[SBPort015]> {
let ResourceCycles = [1];
}
def: InstRW<[SBWriteResGroup6], (instregex "ADD(16|32|64)ri8")>;
-def: InstRW<[SBWriteResGroup6], (instregex "ADD(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "ADD8i8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "ADD8ri")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "ADD8rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "AND(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "AND(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "AND8i8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "AND8ri")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "AND8rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "CBW")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "CMC")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "CMP(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "CMP(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "CMP8i8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "CMP8ri")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "CMP8rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "CWDE")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "DEC(16|32|64)r")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "DEC8r")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "INC(16|32|64)r")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "INC8r")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MMX_MOVD64from64rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MMX_MOVQ2DQrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOV(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOV8ri")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOV8rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOVDQArr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOVDQUrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOVPQI2QIrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOVSX(16|32|64)rr16")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOVSX(16|32|64)rr32")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOVSX(16|32|64)rr8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOVZX(16|32|64)rr16")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "MOVZX(16|32|64)rr8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "NEG(16|32|64)r")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "NEG8r")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "NOT(16|32|64)r")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "NOT8r")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "OR(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "OR(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "OR8i8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "OR8ri")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "OR8rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "PANDNrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "PANDrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "PORrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "PXORrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "STC")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "SUB(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "SUB(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "SUB8i8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "SUB8ri")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "SUB8rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "TEST(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "TEST8i8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "TEST8ri")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "TEST8rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "VMOVPQI2QIrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "VMOVZPQILo2PQIrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "VPANDNrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "VPANDrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "VPORrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "VPXORrr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "XOR(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "XOR(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "XOR8i8")>;\r
-def: InstRW<[SBWriteResGroup6], (instregex "XOR8ri")>;\r
+def: InstRW<[SBWriteResGroup6], (instregex "ADD(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "ADD8i8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "ADD8ri")>;
+def: InstRW<[SBWriteResGroup6], (instregex "ADD8rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "AND(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "AND(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "AND8i8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "AND8ri")>;
+def: InstRW<[SBWriteResGroup6], (instregex "AND8rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "CBW")>;
+def: InstRW<[SBWriteResGroup6], (instregex "CMC")>;
+def: InstRW<[SBWriteResGroup6], (instregex "CMP(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "CMP(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "CMP8i8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "CMP8ri")>;
+def: InstRW<[SBWriteResGroup6], (instregex "CMP8rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "CWDE")>;
+def: InstRW<[SBWriteResGroup6], (instregex "DEC(16|32|64)r")>;
+def: InstRW<[SBWriteResGroup6], (instregex "DEC8r")>;
+def: InstRW<[SBWriteResGroup6], (instregex "INC(16|32|64)r")>;
+def: InstRW<[SBWriteResGroup6], (instregex "INC8r")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MMX_MOVD64from64rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MMX_MOVQ2DQrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOV(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOV8ri")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOV8rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOVDQArr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOVDQUrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOVPQI2QIrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOVSX(16|32|64)rr16")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOVSX(16|32|64)rr32")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOVSX(16|32|64)rr8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOVZX(16|32|64)rr16")>;
+def: InstRW<[SBWriteResGroup6], (instregex "MOVZX(16|32|64)rr8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "NEG(16|32|64)r")>;
+def: InstRW<[SBWriteResGroup6], (instregex "NEG8r")>;
+def: InstRW<[SBWriteResGroup6], (instregex "NOT(16|32|64)r")>;
+def: InstRW<[SBWriteResGroup6], (instregex "NOT8r")>;
+def: InstRW<[SBWriteResGroup6], (instregex "OR(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "OR(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "OR8i8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "OR8ri")>;
+def: InstRW<[SBWriteResGroup6], (instregex "OR8rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "PANDNrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "PANDrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "PORrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "PXORrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "STC")>;
+def: InstRW<[SBWriteResGroup6], (instregex "SUB(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "SUB(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "SUB8i8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "SUB8ri")>;
+def: InstRW<[SBWriteResGroup6], (instregex "SUB8rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "TEST(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "TEST8i8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "TEST8ri")>;
+def: InstRW<[SBWriteResGroup6], (instregex "TEST8rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "VMOVPQI2QIrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "VMOVZPQILo2PQIrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "VPANDNrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "VPANDrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "VPORrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "VPXORrr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "XOR(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "XOR(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup6], (instregex "XOR8i8")>;
+def: InstRW<[SBWriteResGroup6], (instregex "XOR8ri")>;
def: InstRW<[SBWriteResGroup6], (instregex "XOR8rr")>;
def SBWriteResGroup7 : SchedWriteRes<[SBPort0]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SBWriteResGroup7], (instregex "MOVMSKPDrr")>;\r
-def: InstRW<[SBWriteResGroup7], (instregex "MOVMSKPSrr")>;\r
-def: InstRW<[SBWriteResGroup7], (instregex "MOVPDI2DIrr")>;\r
-def: InstRW<[SBWriteResGroup7], (instregex "MOVPQIto64rr")>;\r
-def: InstRW<[SBWriteResGroup7], (instregex "PMOVMSKBrr")>;\r
-def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPDYrr")>;\r
-def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPDrr")>;\r
-def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPSYrr")>;\r
-def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPSrr")>;\r
-def: InstRW<[SBWriteResGroup7], (instregex "VMOVPDI2DIrr")>;\r
+def: InstRW<[SBWriteResGroup7], (instregex "MOVMSKPDrr")>;
+def: InstRW<[SBWriteResGroup7], (instregex "MOVMSKPSrr")>;
+def: InstRW<[SBWriteResGroup7], (instregex "MOVPDI2DIrr")>;
+def: InstRW<[SBWriteResGroup7], (instregex "MOVPQIto64rr")>;
+def: InstRW<[SBWriteResGroup7], (instregex "PMOVMSKBrr")>;
+def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPDYrr")>;
+def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPDrr")>;
+def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPSYrr")>;
+def: InstRW<[SBWriteResGroup7], (instregex "VMOVMSKPSrr")>;
+def: InstRW<[SBWriteResGroup7], (instregex "VMOVPDI2DIrr")>;
def: InstRW<[SBWriteResGroup7], (instregex "VMOVPQIto64rr")>;
def SBWriteResGroup9 : SchedWriteRes<[SBPort05]> {
let NumMicroOps = 2;
let ResourceCycles = [2];
}
-def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPDrr0")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPSrr0")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "ROL(16|32|64)ri")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "ROL8ri")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "ROR(16|32|64)ri")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "ROR8ri")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "SETAr")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "SETBEr")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDYrr")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDrr")>;\r
-def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPSYrr")>;\r
+def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPDrr0")>;
+def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPSrr0")>;
+def: InstRW<[SBWriteResGroup9], (instregex "ROL(16|32|64)ri")>;
+def: InstRW<[SBWriteResGroup9], (instregex "ROL8ri")>;
+def: InstRW<[SBWriteResGroup9], (instregex "ROR(16|32|64)ri")>;
+def: InstRW<[SBWriteResGroup9], (instregex "ROR8ri")>;
+def: InstRW<[SBWriteResGroup9], (instregex "SETAr")>;
+def: InstRW<[SBWriteResGroup9], (instregex "SETBEr")>;
+def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDYrr")>;
+def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDrr")>;
+def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPSYrr")>;
def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPSrr")>;
def SBWriteResGroup10 : SchedWriteRes<[SBPort15]> {
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup14], (instregex "PSLLDrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "PSLLQrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "PSLLWrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "PSRADrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "PSRAWrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "PSRLDrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "PSRLQrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "PSRLWrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "VPSLLDrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "VPSLLQrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "VPSLLWrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "VPSRADrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "VPSRAWrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "VPSRLDrr")>;\r
-def: InstRW<[SBWriteResGroup14], (instregex "VPSRLQrr")>;\r
+def: InstRW<[SBWriteResGroup14], (instregex "PSLLDrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "PSLLQrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "PSLLWrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "PSRADrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "PSRAWrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "PSRLDrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "PSRLQrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "PSRLWrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "VPSLLDrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "VPSLLQrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "VPSLLWrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "VPSRADrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "VPSRAWrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "VPSRLDrr")>;
+def: InstRW<[SBWriteResGroup14], (instregex "VPSRLQrr")>;
def: InstRW<[SBWriteResGroup14], (instregex "VPSRLWrr")>;
def SBWriteResGroup15 : SchedWriteRes<[SBPort0,SBPort015]> {
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup18], (instregex "JRCXZ")>;\r
+def: InstRW<[SBWriteResGroup18], (instregex "JRCXZ")>;
def: InstRW<[SBWriteResGroup18], (instregex "MMX_MOVDQ2Qrr")>;
def SBWriteResGroup19 : SchedWriteRes<[SBPort05,SBPort015]> {
let ResourceCycles = [1,1];
}
def: InstRW<[SBWriteResGroup19], (instregex "ADC(16|32|64)ri8")>;
-def: InstRW<[SBWriteResGroup19], (instregex "ADC(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "ADC8ri")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "ADC8rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVAE(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVB(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVE(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVG(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVGE(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVL(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVLE(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVNE(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVNO(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVNP(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVNS(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVO(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVP(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "CMOVS(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "SBB(16|32|64)ri8")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "SBB(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "SBB8ri")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "SBB8rr")>;\r
-def: InstRW<[SBWriteResGroup19], (instregex "SHLD(16|32|64)rri8")>;\r
+def: InstRW<[SBWriteResGroup19], (instregex "ADC(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "ADC8ri")>;
+def: InstRW<[SBWriteResGroup19], (instregex "ADC8rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVAE(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVB(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVE(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVG(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVGE(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVL(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVLE(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVNE(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVNO(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVNP(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVNS(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVO(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVP(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "CMOVS(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "SBB(16|32|64)ri8")>;
+def: InstRW<[SBWriteResGroup19], (instregex "SBB(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "SBB8ri")>;
+def: InstRW<[SBWriteResGroup19], (instregex "SBB8rr")>;
+def: InstRW<[SBWriteResGroup19], (instregex "SHLD(16|32|64)rri8")>;
def: InstRW<[SBWriteResGroup19], (instregex "SHRD(16|32|64)rri8")>;
def SBWriteResGroup20 : SchedWriteRes<[SBPort0]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMADDUBSWrr64")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMULHRSWrr64")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMULUDQirr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PMADDUBSWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PMADDWDrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PMULDQrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PMULHRSWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PMULHUWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PMULHWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PMULLDrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PMULLWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PMULUDQrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "PSADBWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "VPMADDUBSWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "VPMADDWDrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "VPMULDQrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "VPMULHRSWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "VPMULHUWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "VPMULHWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "VPMULLDrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "VPMULLWrr")>;\r
-def: InstRW<[SBWriteResGroup20], (instregex "VPMULUDQrr")>;\r
+def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMADDUBSWrr64")>;
+def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMULHRSWrr64")>;
+def: InstRW<[SBWriteResGroup20], (instregex "MMX_PMULUDQirr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PMADDUBSWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PMADDWDrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PMULDQrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PMULHRSWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PMULHUWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PMULHWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PMULLDrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PMULLWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PMULUDQrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "PSADBWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "VPMADDUBSWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "VPMADDWDrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "VPMULDQrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "VPMULHRSWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "VPMULHUWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "VPMULHWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "VPMULLDrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "VPMULLWrr")>;
+def: InstRW<[SBWriteResGroup20], (instregex "VPMULUDQrr")>;
def: InstRW<[SBWriteResGroup20], (instregex "VPSADBWrr")>;
def SBWriteResGroup21 : SchedWriteRes<[SBPort1]> {
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SBWriteResGroup21], (instregex "ADDPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ADDPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ADDSDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ADDSSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ADDSUBPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ADDSUBPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ADD_FPrST0")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ADD_FST0r")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ADD_FrST0")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "BSF(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "BSR(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "CMPPDrri")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "CMPPSrri")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "CMPSSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "CRC32r(16|32|64)r8")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "CRC32r(16|32|64)r64")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "CVTDQ2PSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "CVTPS2DQrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "CVTTPS2DQrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MAXPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MAXPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MAXSDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MAXSSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MINPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MINPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MINSDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MINSSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTPI2PSirr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTPS2PIirr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTTPS2PIirr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "MUL8r")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "POPCNT(16|32|64)rr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "PUSHFS64")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ROUNDPDr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ROUNDPSr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ROUNDSDr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "ROUNDSSr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUBPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUBPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FPrST0")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FST0r")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FrST0")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUBSDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUBSSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUB_FPrST0")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUB_FST0r")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "SUB_FrST0")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDPDYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDPSYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDSDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDSSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPDYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPSYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCMPPDYrri")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCMPPDrri")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCMPPSYrri")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCMPPSrri")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCMPSDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCMPSSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCVTDQ2PSYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCVTDQ2PSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCVTPS2DQYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCVTPS2DQrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCVTTPS2DQYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VCVTTPS2DQrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMAXPDYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMAXPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMAXPSYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMAXPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMAXSDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMAXSSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMINPDYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMINPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMINPSYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMINPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMINSDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VMINSSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VROUNDPDr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VROUNDPSr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VROUNDSDr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VROUNDSSr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VROUNDYPDr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VROUNDYPSr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VSUBPDYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VSUBPDrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VSUBPSYrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VSUBPSrr")>;\r
-def: InstRW<[SBWriteResGroup21], (instregex "VSUBSDrr")>;\r
+def: InstRW<[SBWriteResGroup21], (instregex "ADDPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ADDPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ADDSDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ADDSSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ADDSUBPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ADDSUBPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ADD_FPrST0")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ADD_FST0r")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ADD_FrST0")>;
+def: InstRW<[SBWriteResGroup21], (instregex "BSF(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "BSR(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "CMPPDrri")>;
+def: InstRW<[SBWriteResGroup21], (instregex "CMPPSrri")>;
+def: InstRW<[SBWriteResGroup21], (instregex "CMPSSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "CRC32r(16|32|64)r8")>;
+def: InstRW<[SBWriteResGroup21], (instregex "CRC32r(16|32|64)r64")>;
+def: InstRW<[SBWriteResGroup21], (instregex "CVTDQ2PSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "CVTPS2DQrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "CVTTPS2DQrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MAXPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MAXPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MAXSDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MAXSSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MINPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MINPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MINSDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MINSSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTPI2PSirr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTPS2PIirr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MMX_CVTTPS2PIirr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "MUL8r")>;
+def: InstRW<[SBWriteResGroup21], (instregex "POPCNT(16|32|64)rr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "PUSHFS64")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ROUNDPDr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ROUNDPSr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ROUNDSDr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "ROUNDSSr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUBPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUBPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FPrST0")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FST0r")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUBR_FrST0")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUBSDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUBSSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUB_FPrST0")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUB_FST0r")>;
+def: InstRW<[SBWriteResGroup21], (instregex "SUB_FrST0")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDPDYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDPSYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDSDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDSSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPDYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPSYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VADDSUBPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCMPPDYrri")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCMPPDrri")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCMPPSYrri")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCMPPSrri")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCMPSDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCMPSSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCVTDQ2PSYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCVTDQ2PSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCVTPS2DQYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCVTPS2DQrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCVTTPS2DQYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VCVTTPS2DQrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMAXPDYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMAXPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMAXPSYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMAXPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMAXSDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMAXSSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMINPDYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMINPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMINPSYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMINPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMINSDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VMINSSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VROUNDPDr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VROUNDPSr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VROUNDSDr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VROUNDSSr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VROUNDYPDr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VROUNDYPSr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VSUBPDYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VSUBPDrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VSUBPSYrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VSUBPSrr")>;
+def: InstRW<[SBWriteResGroup21], (instregex "VSUBSDrr")>;
def: InstRW<[SBWriteResGroup21], (instregex "VSUBSSrr")>;
def SBWriteResGroup22 : SchedWriteRes<[SBPort0,SBPort5]> {
def: InstRW<[SBWriteResGroup23], (instregex "VPEXTRQrr")>;
def: InstRW<[SBWriteResGroup23], (instregex "VPEXTRWri")>;
-def SBWriteResGroup23_2 : SchedWriteRes<[SBPort05]> {\r
- let Latency = 3;\r
- let NumMicroOps = 3;\r
- let ResourceCycles = [3];\r
-}\r
-def: InstRW<[SBWriteResGroup23_2], (instregex "ROL(16|32|64)rCL")>;\r
-def: InstRW<[SBWriteResGroup23_2], (instregex "ROL8rCL")>;\r
-def: InstRW<[SBWriteResGroup23_2], (instregex "ROR(16|32|64)rCL")>;\r
-def: InstRW<[SBWriteResGroup23_2], (instregex "ROR8rCL")>;\r
-def: InstRW<[SBWriteResGroup23_2], (instregex "SAR(16|32|64)rCL")>;\r
-def: InstRW<[SBWriteResGroup23_2], (instregex "SAR8rCL")>;\r
-def: InstRW<[SBWriteResGroup23_2], (instregex "SHL(16|32|64)rCL")>;\r
-def: InstRW<[SBWriteResGroup23_2], (instregex "SHL8rCL")>;\r
-def: InstRW<[SBWriteResGroup23_2], (instregex "SHR(16|32|64)rCL")>;\r
+def SBWriteResGroup23_2 : SchedWriteRes<[SBPort05]> {
+ let Latency = 3;
+ let NumMicroOps = 3;
+ let ResourceCycles = [3];
+}
+def: InstRW<[SBWriteResGroup23_2], (instregex "ROL(16|32|64)rCL")>;
+def: InstRW<[SBWriteResGroup23_2], (instregex "ROL8rCL")>;
+def: InstRW<[SBWriteResGroup23_2], (instregex "ROR(16|32|64)rCL")>;
+def: InstRW<[SBWriteResGroup23_2], (instregex "ROR8rCL")>;
+def: InstRW<[SBWriteResGroup23_2], (instregex "SAR(16|32|64)rCL")>;
+def: InstRW<[SBWriteResGroup23_2], (instregex "SAR8rCL")>;
+def: InstRW<[SBWriteResGroup23_2], (instregex "SHL(16|32|64)rCL")>;
+def: InstRW<[SBWriteResGroup23_2], (instregex "SHL8rCL")>;
+def: InstRW<[SBWriteResGroup23_2], (instregex "SHR(16|32|64)rCL")>;
def: InstRW<[SBWriteResGroup23_2], (instregex "SHR8rCL")>;
def SBWriteResGroup24 : SchedWriteRes<[SBPort15]> {
let NumMicroOps = 3;
let ResourceCycles = [3];
}
-def: InstRW<[SBWriteResGroup25], (instregex "ADC8i8")>;\r
-def: InstRW<[SBWriteResGroup25], (instregex "LEAVE64")>;\r
-def: InstRW<[SBWriteResGroup25], (instregex "OUT32rr")>;\r
-def: InstRW<[SBWriteResGroup25], (instregex "OUT8rr")>;\r
+def: InstRW<[SBWriteResGroup25], (instregex "ADC8i8")>;
+def: InstRW<[SBWriteResGroup25], (instregex "LEAVE64")>;
+def: InstRW<[SBWriteResGroup25], (instregex "OUT32rr")>;
+def: InstRW<[SBWriteResGroup25], (instregex "OUT8rr")>;
def: InstRW<[SBWriteResGroup25], (instregex "SBB8i8")>;
def: InstRW<[SBWriteResGroup25], (instregex "XADD(16|32|64)rr")>;
def: InstRW<[SBWriteResGroup25], (instregex "XADD8rr")>;
-def SBWriteResGroup25_2 : SchedWriteRes<[SBPort5,SBPort05]> {\r
- let Latency = 3;\r
- let NumMicroOps = 3;\r
- let ResourceCycles = [2,1];\r
-}\r
-def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVBE_F")>;\r
-def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVB_F")>;\r
-def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVE_F")>;\r
-def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNBE_F")>;\r
-def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNB_F")>;\r
-def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNE_F")>;\r
-def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNP_F")>;\r
+def SBWriteResGroup25_2 : SchedWriteRes<[SBPort5,SBPort05]> {
+ let Latency = 3;
+ let NumMicroOps = 3;
+ let ResourceCycles = [2,1];
+}
+def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVBE_F")>;
+def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVB_F")>;
+def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVE_F")>;
+def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNBE_F")>;
+def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNB_F")>;
+def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNE_F")>;
+def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVNP_F")>;
def: InstRW<[SBWriteResGroup25_2], (instregex "CMOVP_F")>;
def SBWriteResGroup26 : SchedWriteRes<[SBPort05,SBPort015]> {
let NumMicroOps = 3;
let ResourceCycles = [2,1];
}
-def: InstRW<[SBWriteResGroup26], (instregex "CMOVA(16|32|64)rr")>;\r
+def: InstRW<[SBWriteResGroup26], (instregex "CMOVA(16|32|64)rr")>;
def: InstRW<[SBWriteResGroup26], (instregex "CMOVBE(16|32|64)rr")>;
-def SBWriteResGroup26_2 : SchedWriteRes<[SBPort0,SBPort1,SBPort5]> {\r
- let Latency = 3;\r
- let NumMicroOps = 3;\r
- let ResourceCycles = [1,1,1];\r
-}\r
-def: InstRW<[SBWriteResGroup26_2], (instregex "COM_FIPr")>;\r
-def: InstRW<[SBWriteResGroup26_2], (instregex "COM_FIr")>;\r
-def: InstRW<[SBWriteResGroup26_2], (instregex "UCOM_FIPr")>;\r
+def SBWriteResGroup26_2 : SchedWriteRes<[SBPort0,SBPort1,SBPort5]> {
+ let Latency = 3;
+ let NumMicroOps = 3;
+ let ResourceCycles = [1,1,1];
+}
+def: InstRW<[SBWriteResGroup26_2], (instregex "COM_FIPr")>;
+def: InstRW<[SBWriteResGroup26_2], (instregex "COM_FIr")>;
+def: InstRW<[SBWriteResGroup26_2], (instregex "UCOM_FIPr")>;
def: InstRW<[SBWriteResGroup26_2], (instregex "UCOM_FIr")>;
def SBWriteResGroup27 : SchedWriteRes<[SBPort0,SBPort1]> {
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup29], (instregex "MOV64sr")>;\r
-\r
-def SBWriteResGroup29_2 : SchedWriteRes<[SBPort5,SBPort015]> {\r
- let Latency = 4;\r
- let NumMicroOps = 4;\r
- let ResourceCycles = [1,3];\r
-}\r
-def: InstRW<[SBWriteResGroup29_2], (instregex "OUT32ir")>;\r
-def: InstRW<[SBWriteResGroup29_2], (instregex "OUT8ir")>;\r
+def: InstRW<[SBWriteResGroup29], (instregex "MOV64sr")>;
+
+def SBWriteResGroup29_2 : SchedWriteRes<[SBPort5,SBPort015]> {
+ let Latency = 4;
+ let NumMicroOps = 4;
+ let ResourceCycles = [1,3];
+}
+def: InstRW<[SBWriteResGroup29_2], (instregex "OUT32ir")>;
+def: InstRW<[SBWriteResGroup29_2], (instregex "OUT8ir")>;
def: InstRW<[SBWriteResGroup29_2], (instregex "PAUSE")>;
-def SBWriteResGroup29_3 : SchedWriteRes<[SBPort05,SBPort015]> {\r
- let Latency = 4;\r
- let NumMicroOps = 4;\r
- let ResourceCycles = [3,1];\r
-}\r
-def: InstRW<[SBWriteResGroup29_3], (instregex "SHLD(16|32|64)rrCL")>;\r
-def: InstRW<[SBWriteResGroup29_3], (instregex "SHRD(16|32|64)rrCL")>;\r
+def SBWriteResGroup29_3 : SchedWriteRes<[SBPort05,SBPort015]> {
+ let Latency = 4;
+ let NumMicroOps = 4;
+ let ResourceCycles = [3,1];
+}
+def: InstRW<[SBWriteResGroup29_3], (instregex "SHLD(16|32|64)rrCL")>;
+def: InstRW<[SBWriteResGroup29_3], (instregex "SHRD(16|32|64)rrCL")>;
def SBWriteResGroup30 : SchedWriteRes<[SBPort0]> {
let Latency = 5;
def: InstRW<[SBWriteResGroup30], (instregex "VMULSSrr")>;
def: InstRW<[SBWriteResGroup30], (instregex "VPCMPGTQrr")>;
def: InstRW<[SBWriteResGroup30], (instregex "VPHMINPOSUWrr128")>;
-def: InstRW<[SBWriteResGroup30], (instregex "VRCPPSr")>;\r
+def: InstRW<[SBWriteResGroup30], (instregex "VRCPPSr")>;
def: InstRW<[SBWriteResGroup30], (instregex "VRCPSSr")>;
def: InstRW<[SBWriteResGroup30], (instregex "VRSQRTPSr")>;
def: InstRW<[SBWriteResGroup30], (instregex "VRSQRTSSr")>;
let NumMicroOps = 1;
let ResourceCycles = [1];
}
-def: InstRW<[SBWriteResGroup31], (instregex "MOV(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup31], (instregex "MOV8rm")>;\r
-def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm16")>;\r
-def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm32")>;\r
-def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm8")>;\r
-def: InstRW<[SBWriteResGroup31], (instregex "MOVZX(16|32|64)rm16")>;\r
-def: InstRW<[SBWriteResGroup31], (instregex "MOVZX(16|32|64)rm8")>;\r
-def: InstRW<[SBWriteResGroup31], (instregex "PREFETCH")>;\r
+def: InstRW<[SBWriteResGroup31], (instregex "MOV(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup31], (instregex "MOV8rm")>;
+def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm16")>;
+def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm32")>;
+def: InstRW<[SBWriteResGroup31], (instregex "MOVSX(16|32|64)rm8")>;
+def: InstRW<[SBWriteResGroup31], (instregex "MOVZX(16|32|64)rm16")>;
+def: InstRW<[SBWriteResGroup31], (instregex "MOVZX(16|32|64)rm8")>;
+def: InstRW<[SBWriteResGroup31], (instregex "PREFETCH")>;
def SBWriteResGroup32 : SchedWriteRes<[SBPort0,SBPort1]> {
let Latency = 5;
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup32], (instregex "CVTSD2SI64rr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "CVTSD2SIrr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "CVTSS2SI64rr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "CVTSS2SIrr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "CVTTSD2SI64rr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "CVTTSD2SIrr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "CVTTSS2SI64rr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "CVTTSS2SIrr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "VCVTSD2SI64rr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "VCVTSD2SIrr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "VCVTSS2SI64rr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "VCVTSS2SIrr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSD2SI64rr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSD2SIrr")>;\r
-def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSS2SI64rr")>;\r
+def: InstRW<[SBWriteResGroup32], (instregex "CVTSD2SI64rr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "CVTSD2SIrr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "CVTSS2SI64rr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "CVTSS2SIrr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "CVTTSD2SI64rr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "CVTTSD2SIrr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "CVTTSS2SI64rr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "CVTTSS2SIrr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "VCVTSD2SI64rr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "VCVTSD2SIrr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "VCVTSS2SI64rr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "VCVTSS2SIrr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSD2SI64rr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSD2SIrr")>;
+def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSS2SI64rr")>;
def: InstRW<[SBWriteResGroup32], (instregex "VCVTTSS2SIrr")>;
def SBWriteResGroup33 : SchedWriteRes<[SBPort4,SBPort23]> {
def: InstRW<[SBWriteResGroup33], (instregex "MOVLPDmr")>;
def: InstRW<[SBWriteResGroup33], (instregex "MOVLPSmr")>;
def: InstRW<[SBWriteResGroup33], (instregex "MOVNTDQmr")>;
-def: InstRW<[SBWriteResGroup33], (instregex "MOVNTI_64mr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "MOVNTImr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "MOVNTPDmr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "MOVNTPSmr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "MOVPDI2DImr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "MOVPQI2QImr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "MOVPQIto64mr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "MOVSSmr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "MOVUPDmr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "MOVUPSmr")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "PUSH64i8")>;\r
-def: InstRW<[SBWriteResGroup33], (instregex "PUSH(16|32|64)r")>;\r
+def: InstRW<[SBWriteResGroup33], (instregex "MOVNTI_64mr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVNTImr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVNTPDmr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVNTPSmr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVPDI2DImr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVPQI2QImr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVPQIto64mr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVSSmr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVUPDmr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "MOVUPSmr")>;
+def: InstRW<[SBWriteResGroup33], (instregex "PUSH64i8")>;
+def: InstRW<[SBWriteResGroup33], (instregex "PUSH(16|32|64)r")>;
def: InstRW<[SBWriteResGroup33], (instregex "VEXTRACTF128mr")>;
def: InstRW<[SBWriteResGroup33], (instregex "VMOVAPDYmr")>;
def: InstRW<[SBWriteResGroup33], (instregex "VMOVAPDmr")>;
let NumMicroOps = 3;
let ResourceCycles = [1,2];
}
-def: InstRW<[SBWriteResGroup35], (instregex "CLI")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "CVTSI2SS64rr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "CVTSI2SSrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "HADDPDrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "HADDPSrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "HSUBPDrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "HSUBPSrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "VCVTSI2SS64rr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "VCVTSI2SSrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "VHADDPDYrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "VHADDPDrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "VHADDPSYrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "VHADDPSrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPDYrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPDrr")>;\r
-def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPSYrr")>;\r
+def: InstRW<[SBWriteResGroup35], (instregex "CLI")>;
+def: InstRW<[SBWriteResGroup35], (instregex "CVTSI2SS64rr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "CVTSI2SSrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "HADDPDrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "HADDPSrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "HSUBPDrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "HSUBPSrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "VCVTSI2SS64rr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "VCVTSI2SSrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "VHADDPDYrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "VHADDPDrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "VHADDPSYrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "VHADDPSrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPDYrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPDrr")>;
+def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPSYrr")>;
def: InstRW<[SBWriteResGroup35], (instregex "VHSUBPSrr")>;
-def SBWriteResGroup35_2 : SchedWriteRes<[SBPort1,SBPort4,SBPort23]> {\r
- let Latency = 5;\r
- let NumMicroOps = 3;\r
- let ResourceCycles = [1,1,1];\r
-}\r
-def: InstRW<[SBWriteResGroup35_2], (instregex "ISTT_FP16m")>;\r
-def: InstRW<[SBWriteResGroup35_2], (instregex "ISTT_FP32m")>;\r
-def: InstRW<[SBWriteResGroup35_2], (instregex "ISTT_FP64m")>;\r
+def SBWriteResGroup35_2 : SchedWriteRes<[SBPort1,SBPort4,SBPort23]> {
+ let Latency = 5;
+ let NumMicroOps = 3;
+ let ResourceCycles = [1,1,1];
+}
+def: InstRW<[SBWriteResGroup35_2], (instregex "ISTT_FP16m")>;
+def: InstRW<[SBWriteResGroup35_2], (instregex "ISTT_FP32m")>;
+def: InstRW<[SBWriteResGroup35_2], (instregex "ISTT_FP64m")>;
def: InstRW<[SBWriteResGroup35_2], (instregex "PUSHGS64")>;
def SBWriteResGroup36 : SchedWriteRes<[SBPort4,SBPort5,SBPort23]> {
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
}
-def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPDYmr")>;\r
-def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPDmr")>;\r
-def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPSYmr")>;\r
-def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPSmr")>;\r
+def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPDYmr")>;
+def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPDmr")>;
+def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPSYmr")>;
+def: InstRW<[SBWriteResGroup37], (instregex "VMASKMOVPSmr")>;
def SBWriteResGroup38 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> {
let Latency = 5;
let NumMicroOps = 4;
let ResourceCycles = [1,3];
}
-def: InstRW<[SBWriteResGroup42], (instregex "CMPXCHG(16|32|64)rr")>;\r
+def: InstRW<[SBWriteResGroup42], (instregex "CMPXCHG(16|32|64)rr")>;
def: InstRW<[SBWriteResGroup42], (instregex "CMPXCHG8rr")>;
def SBWriteResGroup43 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> {
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup50], (instregex "BT(16|32|64)mi8")>;\r
+def: InstRW<[SBWriteResGroup50], (instregex "BT(16|32|64)mi8")>;
def SBWriteResGroup51 : SchedWriteRes<[SBPort23,SBPort15]> {
let Latency = 6;
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup52], (instregex "ADD(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "ADD8rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "AND(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "AND8rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "CMP(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "CMP(16|32|64)mr")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "CMP(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "CMP8mi")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "CMP8mr")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "CMP8rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "LODSL")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "LODSQ")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "OR(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "OR8rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "SUB(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "SUB8rm")>;\r
-def: InstRW<[SBWriteResGroup52], (instregex "XOR(16|32|64)rm")>;\r
+def: InstRW<[SBWriteResGroup52], (instregex "ADD(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "ADD8rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "AND(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "AND8rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "CMP(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup52], (instregex "CMP(16|32|64)mr")>;
+def: InstRW<[SBWriteResGroup52], (instregex "CMP(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "CMP8mi")>;
+def: InstRW<[SBWriteResGroup52], (instregex "CMP8mr")>;
+def: InstRW<[SBWriteResGroup52], (instregex "CMP8rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "LODSL")>;
+def: InstRW<[SBWriteResGroup52], (instregex "LODSQ")>;
+def: InstRW<[SBWriteResGroup52], (instregex "OR(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "OR8rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "SUB(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "SUB8rm")>;
+def: InstRW<[SBWriteResGroup52], (instregex "XOR(16|32|64)rm")>;
def: InstRW<[SBWriteResGroup52], (instregex "XOR8rm")>;
def SBWriteResGroup53 : SchedWriteRes<[SBPort4,SBPort23]> {
def: InstRW<[SBWriteResGroup56], (instregex "VMOVLPSrm")>;
def: InstRW<[SBWriteResGroup56], (instregex "VORPDrm")>;
def: InstRW<[SBWriteResGroup56], (instregex "VORPSrm")>;
-def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPDmi")>;\r
-def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPDrm")>;\r
-def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPSmi")>;\r
+def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPDmi")>;
+def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPDrm")>;
+def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPSmi")>;
def: InstRW<[SBWriteResGroup56], (instregex "VPERMILPSrm")>;
def: InstRW<[SBWriteResGroup56], (instregex "VSHUFPDrmi")>;
def: InstRW<[SBWriteResGroup56], (instregex "VSHUFPSrmi")>;
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup57], (instregex "AESDECLASTrr")>;\r
-def: InstRW<[SBWriteResGroup57], (instregex "AESDECrr")>;\r
-def: InstRW<[SBWriteResGroup57], (instregex "AESENCLASTrr")>;\r
-def: InstRW<[SBWriteResGroup57], (instregex "AESENCrr")>;\r
-def: InstRW<[SBWriteResGroup57], (instregex "VAESDECLASTrr")>;\r
-def: InstRW<[SBWriteResGroup57], (instregex "VAESDECrr")>;\r
-def: InstRW<[SBWriteResGroup57], (instregex "VAESENCLASTrr")>;\r
+def: InstRW<[SBWriteResGroup57], (instregex "AESDECLASTrr")>;
+def: InstRW<[SBWriteResGroup57], (instregex "AESDECrr")>;
+def: InstRW<[SBWriteResGroup57], (instregex "AESENCLASTrr")>;
+def: InstRW<[SBWriteResGroup57], (instregex "AESENCrr")>;
+def: InstRW<[SBWriteResGroup57], (instregex "VAESDECLASTrr")>;
+def: InstRW<[SBWriteResGroup57], (instregex "VAESDECrr")>;
+def: InstRW<[SBWriteResGroup57], (instregex "VAESENCLASTrr")>;
def: InstRW<[SBWriteResGroup57], (instregex "VAESENCrr")>;
def SBWriteResGroup58 : SchedWriteRes<[SBPort23,SBPort05]> {
let NumMicroOps = 3;
let ResourceCycles = [2,1];
}
-def: InstRW<[SBWriteResGroup61], (instregex "VRCPPSYr")>;\r
+def: InstRW<[SBWriteResGroup61], (instregex "VRCPPSYr")>;
def: InstRW<[SBWriteResGroup61], (instregex "VRSQRTPSYr")>;
def SBWriteResGroup62 : SchedWriteRes<[SBPort5,SBPort23]> {
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
}
-def: InstRW<[SBWriteResGroup65], (instregex "ADC(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "ADC8rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVAE(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVB(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVE(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVG(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVGE(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVL(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVLE(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVNE(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVNO(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVNP(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVNS(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVO(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVP(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "CMOVS(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup65], (instregex "SBB(16|32|64)rm")>;\r
+def: InstRW<[SBWriteResGroup65], (instregex "ADC(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "ADC8rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVAE(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVB(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVE(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVG(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVGE(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVL(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVLE(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVNE(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVNO(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVNP(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVNS(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVO(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVP(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "CMOVS(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup65], (instregex "SBB(16|32|64)rm")>;
def: InstRW<[SBWriteResGroup65], (instregex "SBB8rm")>;
def SBWriteResGroup66 : SchedWriteRes<[SBPort0,SBPort4,SBPort23]> {
let NumMicroOps = 4;
let ResourceCycles = [1,2,1];
}
-def: InstRW<[SBWriteResGroup67], (instregex "SLDT(16|32|64)r")>;\r
-def: InstRW<[SBWriteResGroup67], (instregex "STR(16|32|64)r")>;\r
+def: InstRW<[SBWriteResGroup67], (instregex "SLDT(16|32|64)r")>;
+def: InstRW<[SBWriteResGroup67], (instregex "STR(16|32|64)r")>;
def SBWriteResGroup68 : SchedWriteRes<[SBPort4,SBPort5,SBPort23]> {
let Latency = 7;
let NumMicroOps = 4;
let ResourceCycles = [1,2,1];
}
-def: InstRW<[SBWriteResGroup69], (instregex "BTC(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "BTR(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "BTS(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "SAR(16|32|64)mi")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "SAR8mi")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "SHL(16|32|64)m1")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "SHL(16|32|64)mi")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "SHL8m1")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "SHL8mi")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "SHR(16|32|64)mi")>;\r
-def: InstRW<[SBWriteResGroup69], (instregex "SHR8mi")>;\r
+def: InstRW<[SBWriteResGroup69], (instregex "BTC(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup69], (instregex "BTR(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup69], (instregex "BTS(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup69], (instregex "SAR(16|32|64)mi")>;
+def: InstRW<[SBWriteResGroup69], (instregex "SAR8mi")>;
+def: InstRW<[SBWriteResGroup69], (instregex "SHL(16|32|64)m1")>;
+def: InstRW<[SBWriteResGroup69], (instregex "SHL(16|32|64)mi")>;
+def: InstRW<[SBWriteResGroup69], (instregex "SHL8m1")>;
+def: InstRW<[SBWriteResGroup69], (instregex "SHL8mi")>;
+def: InstRW<[SBWriteResGroup69], (instregex "SHR(16|32|64)mi")>;
+def: InstRW<[SBWriteResGroup69], (instregex "SHR8mi")>;
def SBWriteResGroup70 : SchedWriteRes<[SBPort4,SBPort23,SBPort015]> {
let Latency = 7;
let NumMicroOps = 4;
let ResourceCycles = [1,2,1];
}
-def: InstRW<[SBWriteResGroup70], (instregex "ADD(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "ADD(16|32|64)mr")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "ADD8mi")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "ADD8mr")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "AND(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "AND(16|32|64)mr")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "AND8mi")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "AND8mr")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "DEC(16|32|64)m")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "DEC8m")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "INC(16|32|64)m")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "INC8m")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "NEG(16|32|64)m")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "NEG8m")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "NOT(16|32|64)m")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "NOT8m")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "OR(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "OR(16|32|64)mr")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "OR8mi")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "OR8mr")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "SUB(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "SUB(16|32|64)mr")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "SUB8mi")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "SUB8mr")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "TEST(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "TEST8mi")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "TEST8rm")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "XOR(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "XOR(16|32|64)mr")>;\r
-def: InstRW<[SBWriteResGroup70], (instregex "XOR8mi")>;\r
+def: InstRW<[SBWriteResGroup70], (instregex "ADD(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup70], (instregex "ADD(16|32|64)mr")>;
+def: InstRW<[SBWriteResGroup70], (instregex "ADD8mi")>;
+def: InstRW<[SBWriteResGroup70], (instregex "ADD8mr")>;
+def: InstRW<[SBWriteResGroup70], (instregex "AND(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup70], (instregex "AND(16|32|64)mr")>;
+def: InstRW<[SBWriteResGroup70], (instregex "AND8mi")>;
+def: InstRW<[SBWriteResGroup70], (instregex "AND8mr")>;
+def: InstRW<[SBWriteResGroup70], (instregex "DEC(16|32|64)m")>;
+def: InstRW<[SBWriteResGroup70], (instregex "DEC8m")>;
+def: InstRW<[SBWriteResGroup70], (instregex "INC(16|32|64)m")>;
+def: InstRW<[SBWriteResGroup70], (instregex "INC8m")>;
+def: InstRW<[SBWriteResGroup70], (instregex "NEG(16|32|64)m")>;
+def: InstRW<[SBWriteResGroup70], (instregex "NEG8m")>;
+def: InstRW<[SBWriteResGroup70], (instregex "NOT(16|32|64)m")>;
+def: InstRW<[SBWriteResGroup70], (instregex "NOT8m")>;
+def: InstRW<[SBWriteResGroup70], (instregex "OR(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup70], (instregex "OR(16|32|64)mr")>;
+def: InstRW<[SBWriteResGroup70], (instregex "OR8mi")>;
+def: InstRW<[SBWriteResGroup70], (instregex "OR8mr")>;
+def: InstRW<[SBWriteResGroup70], (instregex "SUB(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup70], (instregex "SUB(16|32|64)mr")>;
+def: InstRW<[SBWriteResGroup70], (instregex "SUB8mi")>;
+def: InstRW<[SBWriteResGroup70], (instregex "SUB8mr")>;
+def: InstRW<[SBWriteResGroup70], (instregex "TEST(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup70], (instregex "TEST8mi")>;
+def: InstRW<[SBWriteResGroup70], (instregex "TEST8rm")>;
+def: InstRW<[SBWriteResGroup70], (instregex "XOR(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup70], (instregex "XOR(16|32|64)mr")>;
+def: InstRW<[SBWriteResGroup70], (instregex "XOR8mi")>;
def: InstRW<[SBWriteResGroup70], (instregex "XOR8mr")>;
def SBWriteResGroup71 : SchedWriteRes<[SBPort0,SBPort23]> {
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup72], (instregex "BSF(16|32|64)rm")>;\r
+def: InstRW<[SBWriteResGroup72], (instregex "BSF(16|32|64)rm")>;
def: InstRW<[SBWriteResGroup72], (instregex "BSR(16|32|64)rm")>;
-def: InstRW<[SBWriteResGroup72], (instregex "CRC32r(16|32|64)m64")>;\r
-def: InstRW<[SBWriteResGroup72], (instregex "CRC32r(16|32|64)m8")>;\r
-def: InstRW<[SBWriteResGroup72], (instregex "FCOM32m")>;\r
-def: InstRW<[SBWriteResGroup72], (instregex "FCOM64m")>;\r
-def: InstRW<[SBWriteResGroup72], (instregex "FCOMP32m")>;\r
-def: InstRW<[SBWriteResGroup72], (instregex "FCOMP64m")>;\r
+def: InstRW<[SBWriteResGroup72], (instregex "CRC32r(16|32|64)m64")>;
+def: InstRW<[SBWriteResGroup72], (instregex "CRC32r(16|32|64)m8")>;
+def: InstRW<[SBWriteResGroup72], (instregex "FCOM32m")>;
+def: InstRW<[SBWriteResGroup72], (instregex "FCOM64m")>;
+def: InstRW<[SBWriteResGroup72], (instregex "FCOMP32m")>;
+def: InstRW<[SBWriteResGroup72], (instregex "FCOMP64m")>;
def: InstRW<[SBWriteResGroup72], (instregex "MUL8m")>;
def SBWriteResGroup73 : SchedWriteRes<[SBPort5,SBPort23]> {
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup73], (instregex "VANDNPDYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VANDNPSYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VANDPDYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VANDPSYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VORPDYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VORPSYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VPERM2F128rm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPDYmi")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPDYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPSYmi")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPSYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VSHUFPDYrmi")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VSHUFPSYrmi")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKHPDYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKHPSYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKLPDYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKLPSYrm")>;\r
-def: InstRW<[SBWriteResGroup73], (instregex "VXORPDYrm")>;\r
+def: InstRW<[SBWriteResGroup73], (instregex "VANDNPDYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VANDNPSYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VANDPDYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VANDPSYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VORPDYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VORPSYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VPERM2F128rm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPDYmi")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPDYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPSYmi")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VPERMILPSYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VSHUFPDYrmi")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VSHUFPSYrmi")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKHPDYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKHPSYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKLPDYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VUNPCKLPSYrm")>;
+def: InstRW<[SBWriteResGroup73], (instregex "VXORPDYrm")>;
def: InstRW<[SBWriteResGroup73], (instregex "VXORPSYrm")>;
def SBWriteResGroup74 : SchedWriteRes<[SBPort23,SBPort05]> {
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
}
-def: InstRW<[SBWriteResGroup79], (instregex "PSLLDrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "PSLLQrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "PSLLWrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "PSRADrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "PSRAWrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "PSRLDrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "PSRLQrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "PSRLWrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "VPSLLDrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "VPSLLQrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "VPSLLWrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "VPSRADrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "VPSRAWrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "VPSRLDrm")>;\r
-def: InstRW<[SBWriteResGroup79], (instregex "VPSRLQrm")>;\r
+def: InstRW<[SBWriteResGroup79], (instregex "PSLLDrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "PSLLQrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "PSLLWrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "PSRADrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "PSRAWrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "PSRLDrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "PSRLQrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "PSRLWrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "VPSLLDrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "VPSLLQrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "VPSLLWrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "VPSRADrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "VPSRAWrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "VPSRLDrm")>;
+def: InstRW<[SBWriteResGroup79], (instregex "VPSRLQrm")>;
def: InstRW<[SBWriteResGroup79], (instregex "VPSRLWrm")>;
def SBWriteResGroup80 : SchedWriteRes<[SBPort23,SBPort15]> {
let NumMicroOps = 4;
let ResourceCycles = [1,3];
}
-def: InstRW<[SBWriteResGroup81], (instregex "CMPXCHG(16|32|64)rm")>;\r
+def: InstRW<[SBWriteResGroup81], (instregex "CMPXCHG(16|32|64)rm")>;
def: InstRW<[SBWriteResGroup81], (instregex "CMPXCHG8rm")>;
def SBWriteResGroup82 : SchedWriteRes<[SBPort23,SBPort05,SBPort015]> {
let NumMicroOps = 4;
let ResourceCycles = [1,2,1];
}
-def: InstRW<[SBWriteResGroup82], (instregex "CMOVA(16|32|64)rm")>;\r
-def: InstRW<[SBWriteResGroup82], (instregex "CMOVBE(16|32|64)rm")>;\r
+def: InstRW<[SBWriteResGroup82], (instregex "CMOVA(16|32|64)rm")>;
+def: InstRW<[SBWriteResGroup82], (instregex "CMOVBE(16|32|64)rm")>;
def SBWriteResGroup83 : SchedWriteRes<[SBPort23,SBPort015]> {
let Latency = 8;
let NumMicroOps = 5;
let ResourceCycles = [1,2,2];
}
-def: InstRW<[SBWriteResGroup85], (instregex "ROL(16|32|64)mi")>;\r
-def: InstRW<[SBWriteResGroup85], (instregex "ROL8mi")>;\r
-def: InstRW<[SBWriteResGroup85], (instregex "ROR(16|32|64)mi")>;\r
+def: InstRW<[SBWriteResGroup85], (instregex "ROL(16|32|64)mi")>;
+def: InstRW<[SBWriteResGroup85], (instregex "ROL8mi")>;
+def: InstRW<[SBWriteResGroup85], (instregex "ROR(16|32|64)mi")>;
def: InstRW<[SBWriteResGroup85], (instregex "ROR8mi")>;
def SBWriteResGroup86 : SchedWriteRes<[SBPort4,SBPort23,SBPort015]> {
let NumMicroOps = 5;
let ResourceCycles = [1,2,1,1];
}
-def: InstRW<[SBWriteResGroup88], (instregex "SHLD(16|32|64)mri8")>;\r
-def: InstRW<[SBWriteResGroup88], (instregex "SHRD(16|32|64)mri8")>;\r
+def: InstRW<[SBWriteResGroup88], (instregex "SHLD(16|32|64)mri8")>;
+def: InstRW<[SBWriteResGroup88], (instregex "SHRD(16|32|64)mri8")>;
def SBWriteResGroup89 : SchedWriteRes<[SBPort0,SBPort23]> {
let Latency = 9;
let NumMicroOps = 3;
let ResourceCycles = [1,2];
}
-def: InstRW<[SBWriteResGroup91], (instregex "VBLENDVPDYrm")>;\r
-def: InstRW<[SBWriteResGroup91], (instregex "VBLENDVPSYrm")>;\r
-def: InstRW<[SBWriteResGroup91], (instregex "VMASKMOVPDYrm")>;\r
+def: InstRW<[SBWriteResGroup91], (instregex "VBLENDVPDYrm")>;
+def: InstRW<[SBWriteResGroup91], (instregex "VBLENDVPSYrm")>;
+def: InstRW<[SBWriteResGroup91], (instregex "VMASKMOVPDYrm")>;
def: InstRW<[SBWriteResGroup91], (instregex "VMASKMOVPSYrm")>;
def SBWriteResGroup92 : SchedWriteRes<[SBPort0,SBPort1,SBPort5]> {
def: InstRW<[SBWriteResGroup97], (instregex "IST_FP32m")>;
def: InstRW<[SBWriteResGroup97], (instregex "IST_FP64m")>;
-def SBWriteResGroup97_2 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> {\r
- let Latency = 9;\r
- let NumMicroOps = 6;\r
- let ResourceCycles = [1,2,3];\r
-}\r
-def: InstRW<[SBWriteResGroup97_2], (instregex "ROL(16|32|64)mCL")>;\r
-def: InstRW<[SBWriteResGroup97_2], (instregex "ROL8mCL")>;\r
-def: InstRW<[SBWriteResGroup97_2], (instregex "ROR(16|32|64)mCL")>;\r
-def: InstRW<[SBWriteResGroup97_2], (instregex "ROR8mCL")>;\r
-def: InstRW<[SBWriteResGroup97_2], (instregex "SAR(16|32|64)mCL")>;\r
-def: InstRW<[SBWriteResGroup97_2], (instregex "SAR8mCL")>;\r
-def: InstRW<[SBWriteResGroup97_2], (instregex "SHL(16|32|64)mCL")>;\r
-def: InstRW<[SBWriteResGroup97_2], (instregex "SHL8mCL")>;\r
-def: InstRW<[SBWriteResGroup97_2], (instregex "SHR(16|32|64)mCL")>;\r
+def SBWriteResGroup97_2 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> {
+ let Latency = 9;
+ let NumMicroOps = 6;
+ let ResourceCycles = [1,2,3];
+}
+def: InstRW<[SBWriteResGroup97_2], (instregex "ROL(16|32|64)mCL")>;
+def: InstRW<[SBWriteResGroup97_2], (instregex "ROL8mCL")>;
+def: InstRW<[SBWriteResGroup97_2], (instregex "ROR(16|32|64)mCL")>;
+def: InstRW<[SBWriteResGroup97_2], (instregex "ROR8mCL")>;
+def: InstRW<[SBWriteResGroup97_2], (instregex "SAR(16|32|64)mCL")>;
+def: InstRW<[SBWriteResGroup97_2], (instregex "SAR8mCL")>;
+def: InstRW<[SBWriteResGroup97_2], (instregex "SHL(16|32|64)mCL")>;
+def: InstRW<[SBWriteResGroup97_2], (instregex "SHL8mCL")>;
+def: InstRW<[SBWriteResGroup97_2], (instregex "SHR(16|32|64)mCL")>;
def: InstRW<[SBWriteResGroup97_2], (instregex "SHR8mCL")>;
def SBWriteResGroup98 : SchedWriteRes<[SBPort4,SBPort23,SBPort015]> {
let NumMicroOps = 6;
let ResourceCycles = [1,2,3];
}
-def: InstRW<[SBWriteResGroup98], (instregex "ADC(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup98], (instregex "ADC8mi")>;\r
-def: InstRW<[SBWriteResGroup98], (instregex "SBB(16|32|64)mi8")>;\r
-def: InstRW<[SBWriteResGroup98], (instregex "SBB8mi")>;\r
+def: InstRW<[SBWriteResGroup98], (instregex "ADC(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup98], (instregex "ADC8mi")>;
+def: InstRW<[SBWriteResGroup98], (instregex "SBB(16|32|64)mi8")>;
+def: InstRW<[SBWriteResGroup98], (instregex "SBB8mi")>;
def SBWriteResGroup99 : SchedWriteRes<[SBPort4,SBPort23,SBPort05,SBPort015]> {
let Latency = 9;
let NumMicroOps = 6;
let ResourceCycles = [1,2,2,1];
}
-def: InstRW<[SBWriteResGroup99], (instregex "ADC(16|32|64)mr")>;\r
-def: InstRW<[SBWriteResGroup99], (instregex "ADC8mr")>;\r
-def: InstRW<[SBWriteResGroup99], (instregex "SBB(16|32|64)mr")>;\r
+def: InstRW<[SBWriteResGroup99], (instregex "ADC(16|32|64)mr")>;
+def: InstRW<[SBWriteResGroup99], (instregex "ADC8mr")>;
+def: InstRW<[SBWriteResGroup99], (instregex "SBB(16|32|64)mr")>;
def: InstRW<[SBWriteResGroup99], (instregex "SBB8mr")>;
def SBWriteResGroup100 : SchedWriteRes<[SBPort4,SBPort5,SBPort23,SBPort05,SBPort015]> {
let NumMicroOps = 6;
let ResourceCycles = [1,1,2,1,1];
}
-def: InstRW<[SBWriteResGroup100], (instregex "BT(16|32|64)mr")>;\r
-def: InstRW<[SBWriteResGroup100], (instregex "BTC(16|32|64)mr")>;\r
-def: InstRW<[SBWriteResGroup100], (instregex "BTR(16|32|64)mr")>;\r
+def: InstRW<[SBWriteResGroup100], (instregex "BT(16|32|64)mr")>;
+def: InstRW<[SBWriteResGroup100], (instregex "BTC(16|32|64)mr")>;
+def: InstRW<[SBWriteResGroup100], (instregex "BTR(16|32|64)mr")>;
def: InstRW<[SBWriteResGroup100], (instregex "BTS(16|32|64)mr")>;
def SBWriteResGroup101 : SchedWriteRes<[SBPort1,SBPort23]> {
let NumMicroOps = 2;
let ResourceCycles = [1,1];
}
-def: InstRW<[SBWriteResGroup101], (instregex "ADD_F32m")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "ADD_F64m")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "ILD_F16m")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "ILD_F32m")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "ILD_F64m")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "SUBR_F32m")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "SUBR_F64m")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "SUB_F32m")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "SUB_F64m")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VADDPDYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VADDPSYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VADDSUBPDYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VADDSUBPSYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VCMPPDYrmi")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VCMPPSYrmi")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VCVTDQ2PSYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VCVTPS2DQYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VCVTTPS2DQYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VMAXPDYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VMAXPSYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VMINPDYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VMINPSYrm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VROUNDYPDm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VROUNDYPSm")>;\r
-def: InstRW<[SBWriteResGroup101], (instregex "VSUBPDYrm")>;\r
+def: InstRW<[SBWriteResGroup101], (instregex "ADD_F32m")>;
+def: InstRW<[SBWriteResGroup101], (instregex "ADD_F64m")>;
+def: InstRW<[SBWriteResGroup101], (instregex "ILD_F16m")>;
+def: InstRW<[SBWriteResGroup101], (instregex "ILD_F32m")>;
+def: InstRW<[SBWriteResGroup101], (instregex "ILD_F64m")>;
+def: InstRW<[SBWriteResGroup101], (instregex "SUBR_F32m")>;
+def: InstRW<[SBWriteResGroup101], (instregex "SUBR_F64m")>;
+def: InstRW<[SBWriteResGroup101], (instregex "SUB_F32m")>;
+def: InstRW<[SBWriteResGroup101], (instregex "SUB_F64m")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VADDPDYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VADDPSYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VADDSUBPDYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VADDSUBPSYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VCMPPDYrmi")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VCMPPSYrmi")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VCVTDQ2PSYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VCVTPS2DQYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VCVTTPS2DQYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VMAXPDYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VMAXPSYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VMINPDYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VMINPSYrm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VROUNDYPDm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VROUNDYPSm")>;
+def: InstRW<[SBWriteResGroup101], (instregex "VSUBPDYrm")>;
def: InstRW<[SBWriteResGroup101], (instregex "VSUBPSYrm")>;
def SBWriteResGroup102 : SchedWriteRes<[SBPort0,SBPort1,SBPort23]> {
let NumMicroOps = 3;
let ResourceCycles = [1,1,1];
}
-def: InstRW<[SBWriteResGroup102], (instregex "VCVTSD2SI64rm")>;\r
-def: InstRW<[SBWriteResGroup102], (instregex "VCVTSD2SIrm")>;\r
-def: InstRW<[SBWriteResGroup102], (instregex "VCVTSS2SI64rm")>;\r
-def: InstRW<[SBWriteResGroup102], (instregex "VCVTSS2SIrm")>;\r
-def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSD2SI64rm")>;\r
-def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSD2SIrm")>;\r
-def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSS2SI64rm")>;\r
+def: InstRW<[SBWriteResGroup102], (instregex "VCVTSD2SI64rm")>;
+def: InstRW<[SBWriteResGroup102], (instregex "VCVTSD2SIrm")>;
+def: InstRW<[SBWriteResGroup102], (instregex "VCVTSS2SI64rm")>;
+def: InstRW<[SBWriteResGroup102], (instregex "VCVTSS2SIrm")>;
+def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSD2SI64rm")>;
+def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSD2SIrm")>;
+def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSS2SI64rm")>;
def: InstRW<[SBWriteResGroup102], (instregex "VCVTTSS2SIrm")>;
def SBWriteResGroup103 : SchedWriteRes<[SBPort1,SBPort5,SBPort23]> {
def: InstRW<[SBWriteResGroup103], (instregex "VCVTSI2SSrm")>;
def: InstRW<[SBWriteResGroup103], (instregex "VCVTTPD2DQrm")>;
-def SBWriteResGroup103_2 : SchedWriteRes<[SBPort4,SBPort23,SBPort05,SBPort015]> {\r
- let Latency = 10;\r
- let NumMicroOps = 7;\r
- let ResourceCycles = [1,2,3,1];\r
-}\r
-def: InstRW<[SBWriteResGroup103_2], (instregex "SHLD(16|32|64)mrCL")>;\r
-def: InstRW<[SBWriteResGroup103_2], (instregex "SHRD(16|32|64)mrCL")>;\r
+def SBWriteResGroup103_2 : SchedWriteRes<[SBPort4,SBPort23,SBPort05,SBPort015]> {
+ let Latency = 10;
+ let NumMicroOps = 7;
+ let ResourceCycles = [1,2,3,1];
+}
+def: InstRW<[SBWriteResGroup103_2], (instregex "SHLD(16|32|64)mrCL")>;
+def: InstRW<[SBWriteResGroup103_2], (instregex "SHRD(16|32|64)mrCL")>;
def SBWriteResGroup104 : SchedWriteRes<[SBPort0,SBPort23]> {
let Latency = 11;
projects / llvm / commitdiff