Fix incorrect vaesimc encoding (need to set VEX.vvvv=1111).

Reported by: Gil Dabah <arkon@ragestorm.net>

svn path=/trunk/yasm/; revision=2249

diff --git a/modules/arch/x86/gen_x86_insn.py b/modules/arch/x86/gen_x86_insn.py
index 40147358549088e5213346dfae49a1079501b14e..91889ac0843bf5d0c1746dad83a0bb4688cbda3b 100755 (executable)
--- a/modules/arch/x86/gen_x86_insn.py
+++ b/modules/arch/x86/gen_x86_insn.py
@@ -6649,7 +6649,7 @@ add_group("aesimc",
     modifiers=["Op1Add", "Op2Add", "SetVEX"],
     prefix=0x66,
     opcode=[0x0F, 0x00, 0x00],
-    operands=[Operand(type="SIMDReg", size=128, dest="SpareVEX"),
+    operands=[Operand(type="SIMDReg", size=128, dest="Spare"),
               Operand(type="SIMDRM", size=128, relaxed=True, dest="EA")])
 
 add_insn("aesimc", "aesimc", modifiers=[0x38, 0xDB])

diff --git a/modules/arch/x86/tests/aes.hex b/modules/arch/x86/tests/aes.hex
index 5396dee7125b65353eef6fa104b9ba2d827e5378..6583be83be43a243c3e61609401b446e090b954a 100644 (file)
--- a/modules/arch/x86/tests/aes.hex
+++ b/modules/arch/x86/tests/aes.hex
@@ -215,17 +215,17 @@ db
 08 
 c4 
 e2 
-71 
+79 
 db 
 ca 
 c4 
 e2 
-71 
+79 
 db 
 08 
 c4 
 e2 
-71 
+79 
 db 
 08 
 66