// little-Endian, the high bits in big-Endian. Therefore, on big-Endian
// we need to shift the high bits down to the low before truncating.
Width >>= 1;
- if (CGF.getTarget().isBigEndian()) {\r
- Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width);\r
- V = CGF.Builder.CreateLShr(V, ShiftCst);\r
- } \r
- // We are truncating value in order to extract the higher-order \r
- // double, which we will be using to extract the sign from.\r
- IntTy = llvm::IntegerType::get(C, Width);\r
- V = CGF.Builder.CreateTrunc(V, IntTy);\r
+ if (CGF.getTarget().isBigEndian()) {
+ Value *ShiftCst = llvm::ConstantInt::get(IntTy, Width);
+ V = CGF.Builder.CreateLShr(V, ShiftCst);
+ }
+ // We are truncating value in order to extract the higher-order
+ // double, which we will be using to extract the sign from.
+ IntTy = llvm::IntegerType::get(C, Width);
+ V = CGF.Builder.CreateTrunc(V, IntTy);
}
Value *Zero = llvm::Constant::getNullValue(IntTy);
return CGF.Builder.CreateICmpSLT(V, Zero);
case Builtin::BI__builtin_smull_overflow:
case Builtin::BI__builtin_smulll_overflow:
IntrinsicId = llvm::Intrinsic::smul_with_overflow;
- break;\r
- }\r
-\r
- \r
- llvm::Value *Carry;\r
- llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry);\r
- Builder.CreateStore(Sum, SumOutPtr);\r
+ break;
+ }
+
+
+ llvm::Value *Carry;
+ llvm::Value *Sum = EmitOverflowIntrinsic(*this, IntrinsicId, X, Y, Carry);
+ Builder.CreateStore(Sum, SumOutPtr);
return RValue::get(Carry);
}
llvm::Type *ResTy, unsigned IntID,
const char *Name) {
SmallVector<Value *, 2> TblOps;
- if (ExtOp)\r
- TblOps.push_back(ExtOp);\r
-\r
- // Build a vector containing sequential number like (0, 1, 2, ..., 15) \r
- SmallVector<uint32_t, 16> Indices;\r
- llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType());\r
- for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) {\r
+ if (ExtOp)
+ TblOps.push_back(ExtOp);
+
+ // Build a vector containing sequential number like (0, 1, 2, ..., 15)
+ SmallVector<uint32_t, 16> Indices;
+ llvm::VectorType *TblTy = cast<llvm::VectorType>(Ops[0]->getType());
+ for (unsigned i = 0, e = TblTy->getNumElements(); i != e; ++i) {
Indices.push_back(2*i);
Indices.push_back(2*i+1);
}
ZeroTbl, Indices, Name));
}
- Function *TblF;\r
- TblOps.push_back(IndexOp);\r
- TblF = CGF.CGM.getIntrinsic(IntID, ResTy);\r
- \r
- return CGF.EmitNeonCall(TblF, TblOps, Name);\r
-}\r
-\r
+ Function *TblF;
+ TblOps.push_back(IndexOp);
+ TblF = CGF.CGM.getIntrinsic(IntID, ResTy);
+
+ return CGF.EmitNeonCall(TblF, TblOps, Name);
+}
+
Value *CodeGenFunction::GetValueForARMHint(unsigned BuiltinID) {
unsigned Value;
switch (BuiltinID) {
"vsha1h");
// The ARM _MoveToCoprocessor builtins put the input register value as
- // the first argument, but the LLVM intrinsic expects it as the third one.\r
- case ARM::BI_MoveToCoprocessor:\r
- case ARM::BI_MoveToCoprocessor2: {\r
- Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ? \r
- Intrinsic::arm_mcr : Intrinsic::arm_mcr2);\r
- return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0],\r
- Ops[3], Ops[4], Ops[5]});\r
+ // the first argument, but the LLVM intrinsic expects it as the third one.
+ case ARM::BI_MoveToCoprocessor:
+ case ARM::BI_MoveToCoprocessor2: {
+ Function *F = CGM.getIntrinsic(BuiltinID == ARM::BI_MoveToCoprocessor ?
+ Intrinsic::arm_mcr : Intrinsic::arm_mcr2);
+ return Builder.CreateCall(F, {Ops[1], Ops[2], Ops[0],
+ Ops[3], Ops[4], Ops[5]});
}
}
if (Ops.size() == 3)
return Align;
- return EmitX86Select(*this, Ops[4], Align, Ops[3]);\r
- }\r
-\r
- case X86::BI__builtin_ia32_movnti:\r
- case X86::BI__builtin_ia32_movnti64: {\r
- llvm::MDNode *Node = llvm::MDNode::get(\r
+ return EmitX86Select(*this, Ops[4], Align, Ops[3]);
+ }
+
+ case X86::BI__builtin_ia32_movnti:
+ case X86::BI__builtin_ia32_movnti64: {
+ llvm::MDNode *Node = llvm::MDNode::get(
getLLVMContext(), llvm::ConstantAsMetadata::get(Builder.getInt32(1)));
// Convert the type of the pointer to a pointer to the stored type.
Value *BC = Builder.CreateBitCast(Ops[0],
llvm::PointerType::getUnqual(Ops[1]->getType()),
"cast");
- StoreInst *SI = Builder.CreateDefaultAlignedStore(Ops[1], BC);\r
- SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node);\r
-\r
- // No alignment for scalar intrinsic store.\r
- QualType ArgTy = E->getArg(1)->getType();\r
- SI->setAlignment(1);\r
- return SI;\r
- }\r
- case X86::BI__builtin_ia32_selectb_128:\r
+ StoreInst *SI = Builder.CreateDefaultAlignedStore(Ops[1], BC);
+ SI->setMetadata(CGM.getModule().getMDKindID("nontemporal"), Node);
+
+ // No alignment for scalar intrinsic store.
+ SI->setAlignment(1);
+ return SI;
+ }
+ case X86::BI__builtin_ia32_selectb_128:
case X86::BI__builtin_ia32_selectb_256:
case X86::BI__builtin_ia32_selectb_512:
case X86::BI__builtin_ia32_selectw_128: