]> granicus.if.org Git - llvm/commitdiff
AMDGPU/GlobalISel: Fix non-power-of-2 implicit_def
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 8 Feb 2019 14:46:27 +0000 (14:46 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 8 Feb 2019 14:46:27 +0000 (14:46 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353522 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir

index 02528b621776cbbb10824f49b08311c52fdae828..0002aece5577f81335ac0c66655a52db172d661c 100644 (file)
@@ -139,7 +139,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
                ConstantPtr, LocalPtr, FlatPtr, PrivatePtr})
     .legalFor({LLT::vector(3, 16)})// FIXME: Hack
     .clampScalarOrElt(0, S32, S512)
-    .legalIf(isMultiple32(0));
+    .legalIf(isMultiple32(0))
+    .widenScalarToNextPow2(0, 32);
 
 
   // FIXME: i1 operands to intrinsics should always be legal, but other i1
index 786ec1335be56ee082f09662fcc814e4c0736fda..b9a27740c89fbb08803d400cbc30fb9296b8cc71 100644 (file)
@@ -69,6 +69,20 @@ body: |
     $vgpr0 = COPY %0
 ...
 
+---
+name: test_implicit_def_48
+body: |
+  bb.0:
+
+    ; CHECK-LABEL: name: test_implicit_def_48
+    ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
+    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY [[DEF]](s64)
+    ; CHECK: $vgpr0_vgpr1 = COPY [[COPY]](s64)
+    %0:_(s48) = G_IMPLICIT_DEF
+    %1:_(s64) = G_ANYEXT %0
+    $vgpr0_vgpr1 = COPY %1
+...
+
 ---
 name: test_implicit_def_s64
 body: |
@@ -81,6 +95,20 @@ body: |
     $vgpr0_vgpr1 = COPY %0
 ...
 
+---
+name: test_implicit_def_s65
+body: |
+  bb.0:
+
+    ; CHECK-LABEL: name: test_implicit_def_s65
+    ; CHECK: [[DEF:%[0-9]+]]:_(s128) = G_IMPLICIT_DEF
+    ; CHECK: [[TRUNC:%[0-9]+]]:_(s96) = G_TRUNC [[DEF]](s128)
+    ; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[TRUNC]](s96)
+    %0:_(s65) = G_IMPLICIT_DEF
+    %1:_(s96) = G_ANYEXT %0
+    $vgpr0_vgpr1_vgpr2 = COPY %1
+...
+
 ---
 name: test_implicit_def_s128
 body: |