git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@313649
91177308-0d34-0410-b5e6-
96231b3b80d8
<< " = {\n";
for (unsigned M = 0; M < NumModes; ++M) {
unsigned EV = 0;
- (void)EV;
OS << " // Mode = " << M << " (";
if (M == 0)
OS << "Default";
OS << ")\n";
for (const auto &RC : RegisterClasses) {
assert(RC.EnumValue == EV++ && "Unexpected order of register classes");
+ (void)EV;
const RegSizeInfo &RI = RC.RSI.get(M);
OS << " { " << RI.RegSize << ", " << RI.SpillSize << ", "
<< RI.SpillAlignment;