This was meant to test arm anyhow, make the registers agree with the

instruction and the architecture for which the instruction exists.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@136301 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/2010-05-26-AsmSideEffect.c b/test/CodeGen/2010-05-26-AsmSideEffect.c
index e99ec6188008ca6d55adacacb07239c2fc9610e5..c9231e253303b8089a231a7dc41ea48eaf63b50d 100644 (file)
--- a/test/CodeGen/2010-05-26-AsmSideEffect.c
+++ b/test/CodeGen/2010-05-26-AsmSideEffect.c
@@ -1,9 +1,9 @@
-// RUN: %clang_cc1 %s -emit-llvm -o - | FileCheck %s
+// RUN: %clang_cc1 %s -emit-llvm -triple arm-apple-darwin -o - | FileCheck %s
 // Radar 8026855
 
 int test (void *src) {
   register int w0 asm ("0");
-  // CHECK: call i32 asm "ldr $0, [$1]", "={ax},r,~{dirflag},~{fpsr},~{flags}"(i8*
+  // CHECK: call i32 asm "ldr $0, [$1]", "={r0},r,~{dirflag},~{fpsr},~{flags}"(i8*
   asm ("ldr %0, [%1]": "=r" (w0): "r" (src));
   return w0;
 }