[AArch64] Fix incorrect CSEL node created

Under -enable-unsafe-fp-math, SELECT_CC lowering in AArch64
transforms floating point comparisons of the form "a == 0.0 ? 0.0 : x" to
"a == 0.0 ? a : x". But it incorrectly assumes that 'x' and 'a' have
the same type which can lead to a wrong CSEL node that crashes later
due to nonsensical copies.

Differential Revision: https://reviews.llvm.org/D26394

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286231 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp
index 04219baf041f66a0b2b277d82316d71a9abfa67a..5bea916ad2ab44454fcb135d29d59e3c302a887a 100644 (file)
--- a/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -4106,10 +4106,11 @@ SDValue AArch64TargetLowering::LowerSELECT_CC(ISD::CondCode CC, SDValue LHS,
       ConstantFPSDNode *CTVal = dyn_cast<ConstantFPSDNode>(TVal);
 
       if ((CC == ISD::SETEQ || CC == ISD::SETOEQ || CC == ISD::SETUEQ) &&
-          CTVal && CTVal->isZero())
+          CTVal && CTVal->isZero() && TVal.getValueType() == LHS.getValueType())
         TVal = LHS;
       else if ((CC == ISD::SETNE || CC == ISD::SETONE || CC == ISD::SETUNE) &&
-               CFVal && CFVal->isZero())
+               CFVal && CFVal->isZero() &&
+               FVal.getValueType() == LHS.getValueType())
         FVal = LHS;
     }
   }

diff --git a/test/CodeGen/AArch64/csel-zero-float.ll b/test/CodeGen/AArch64/csel-zero-float.ll
new file mode 100644 (file)
index 0000000..9869c65
--- /dev/null
+++ b/test/CodeGen/AArch64/csel-zero-float.ll
@@ -0,0 +1,15 @@
+; RUN: llc -mtriple=aarch64-none-linux-gnu -enable-unsafe-fp-math < %s
+; There is no invocation to FileCheck as this
+; caused a crash in "Post-RA pseudo instruction expansion"
+
+define double @foo(float *%user, float %t17) {
+  %t16 = load float, float* %user, align 8
+  %conv = fpext float %t16 to double
+  %cmp26 = fcmp fast oeq float %t17, 0.000000e+00
+  %div = fdiv fast float %t16, %t17
+  %div.op = fmul fast float %div, 1.000000e+02
+  %t18 = fpext float %div.op to double
+  %conv31 = select i1 %cmp26, double 0.000000e+00, double %t18
+  ret double %conv31
+}
+