]> granicus.if.org Git - llvm/commitdiff
AMDGPU: Work around build special casing .inc files
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 8 Jun 2017 19:25:21 +0000 (19:25 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 8 Jun 2017 19:25:21 +0000 (19:25 +0000)
It complains because it assumes these were autogenerated files
in the source directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305005 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp [moved from lib/Target/AMDGPU/AMDGPURegAsmNames.inc with 99% similarity]
lib/Target/AMDGPU/CMakeLists.txt
lib/Target/AMDGPU/SIRegisterInfo.cpp

similarity index 99%
rename from lib/Target/AMDGPU/AMDGPURegAsmNames.inc
rename to lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp
index 6e17aa3fbad4bfa805390e4bfcbe4459f0a33995..36d88f52910d59e05230eba475519bfa2dfa02a0 100644 (file)
@@ -1,5 +1,7 @@
 //===-- AMDGPURegAsmNames.inc - Register asm names ----------*- C++ -*-----===//
 
+#ifdef AMDGPU_REG_ASM_NAMES
+
 static const char *const VGPR32RegNames[] = {
     "v0",   "v1",   "v2",   "v3",   "v4",   "v5",   "v6",   "v7",   "v8",
     "v9",   "v10",  "v11",  "v12",  "v13",  "v14",  "v15",  "v16",  "v17",
@@ -347,3 +349,5 @@ static const char *const SGPR512RegNames[] = {
     "s[48:63]", "s[52:67]", "s[56:71]", "s[60:75]", "s[64:79]",  "s[68:83]",
     "s[72:87]", "s[76:91]", "s[80:95]", "s[84:99]", "s[88:103]"
 };
+
+#endif
index cafce0164fa9104776aaf4f695ed47434e514d20..e30844f082cdd8fef0363605458696ae6c3dfe0b 100644 (file)
@@ -58,6 +58,7 @@ add_llvm_target(AMDGPUCodeGen
   AMDGPUISelLowering.cpp
   AMDGPUInstrInfo.cpp
   AMDGPUPromoteAlloca.cpp
+  AMDGPURegAsmNames.inc.cpp
   AMDGPURegisterInfo.cpp
   AMDGPUUnifyDivergentExitNodes.cpp
   GCNHazardRecognizer.cpp
index 122d62ff17598acc9a7474073d2c6a3d9306f279..b611f28fcabdfc5daa83450b2a8e8163faa69ac2 100644 (file)
@@ -1105,7 +1105,8 @@ void SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
 }
 
 StringRef SIRegisterInfo::getRegAsmName(unsigned Reg) const {
-  #include "AMDGPURegAsmNames.inc"
+  #define AMDGPU_REG_ASM_NAMES
+  #include "AMDGPURegAsmNames.inc.cpp"
 
   #define REG_RANGE(BeginReg, EndReg, RegTable)            \
     if (Reg >= BeginReg && Reg <= EndReg) {                \