Merging r268053:

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r268053 | sdardis | 2016-04-29 17:07:47 +0100 (Fri, 29 Apr 2016) | 9 lines

[mips][FastISel] A store is not a load.

Correct trivial error. One of the failing tests from PR/27458.

Reviewers: dsanders, vkalintiris, mcrosier

Differential Review: http://reviews.llvm.org/D19726

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@271123 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Mips/MipsFastISel.cpp b/lib/Target/Mips/MipsFastISel.cpp
index b94cdeb3c96766df847d85ef0c8711a9d9d214ec..cda0f0165c2c8fa059bfd662c8ba4b76c542ae79 100644 (file)
--- a/lib/Target/Mips/MipsFastISel.cpp
+++ b/lib/Target/Mips/MipsFastISel.cpp
@@ -803,7 +803,7 @@ bool MipsFastISel::emitStore(MVT VT, unsigned SrcReg, Address &Addr,
     unsigned Offset = Addr.getOffset();
     MachineFrameInfo &MFI = *MF->getFrameInfo();
     MachineMemOperand *MMO = MF->getMachineMemOperand(
-        MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOLoad,
+        MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOStore,
         MFI.getObjectSize(FI), Align);
     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc))
         .addReg(SrcReg)

diff --git a/test/CodeGen/Mips/Fast-ISel/fastalloca.ll b/test/CodeGen/Mips/Fast-ISel/fastalloca.ll
index 00bc7f485e08f45176e742e0db038199e05bb455..9c91567eabf019ce069eb6a8bcbca7cc1c709e4d 100644 (file)
--- a/test/CodeGen/Mips/Fast-ISel/fastalloca.ll
+++ b/test/CodeGen/Mips/Fast-ISel/fastalloca.ll
@@ -1,5 +1,5 @@
 ; RUN: llc -march=mipsel -relocation-model=pic -O0 -fast-isel-abort=1 -mcpu=mips32r2 \
-; RUN:     < %s | FileCheck %s
+; RUN:     < %s -verify-machineinstrs | FileCheck %s
 
 %struct.x = type { i32 }