if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
continue;
- bool isLiveIn = MF.getRegInfo().isLiveIn(Reg);
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+ bool isLiveIn = MRI.isLiveIn(Reg);
if (!isLiveIn)
MBB.addLiveIn(Reg);
+ // Decide whether we can add a kill flag to the use.
+ bool CanKill = !isLiveIn;
+ // Check if any subregister is live-in
+ if (CanKill) {
+ for (MCRegAliasIterator AReg(Reg, TRI, false); AReg.isValid(); ++AReg) {
+ if (MRI.isLiveIn(*AReg)) {
+ CanKill = false;
+ break;
+ }
+ }
+ }
+
// Do not set a kill flag on values that are also marked as live-in. This
// happens with the @llvm-returnaddress intrinsic and with arguments
// passed in callee saved registers.
// Omitting the kill flags is conservatively correct even if the live-in
// is not used after all.
- bool isKill = !isLiveIn;
- BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, getKillRegState(isKill))
+ BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, getKillRegState(CanKill))
.setMIFlag(MachineInstr::FrameSetup);
}
--- /dev/null
+; RUN: llc -verify-machineinstrs -o - %s | FileCheck %s
+target triple = "x86_64--"
+
+; This function gets a AL live-in and at same time saves+restores RAX. We must
+; not add a kill flag to the "PUSHQ %rax" or the machine verifier will complain.
+; CHECK-LABEL: test:
+; CHECK: pushq %rax
+; CHECK: testb %al, %al
+; CHECK: je .LBB
+define void @test(i64 %a, i8* %b, ...) {
+entry:
+ %bar = alloca i8
+ call void @llvm.va_start(i8* %bar)
+ call void @llvm.eh.unwind.init()
+ call void @llvm.eh.return.i64(i64 %a, i8* %b)
+ unreachable
+}
+
+declare void @llvm.eh.return.i64(i64, i8*)
+declare void @llvm.eh.unwind.init()
+declare void @llvm.va_start(i8*)