[SystemZ] Add crypto instructions

This adds the set of message-security assist instructions for
assembler / disassembler use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302645 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/SystemZFeatures.td b/lib/Target/SystemZ/SystemZFeatures.td
index 716e5add8051b7a7bdfb162dce17448cf30a89be..7bfa378aa85c2aaa407696c03264deb38fa393c8 100644 (file)
--- a/lib/Target/SystemZ/SystemZFeatures.td
+++ b/lib/Target/SystemZ/SystemZFeatures.td
@@ -68,6 +68,11 @@ def FeaturePopulationCount : SystemZFeature<
   "Assume that the population-count facility is installed"
 >;
 
+def FeatureMessageSecurityAssist4 : SystemZFeature<
+  "message-security-assist-extension4", "MessageSecurityAssist4",
+  "Assume that the message-security-assist extension facility 4 is installed"
+>;
+
 def Arch9NewFeatures : SystemZFeatureList<[
     FeatureDistinctOps,
     FeatureFastSerialization,
@@ -75,7 +80,8 @@ def Arch9NewFeatures : SystemZFeatureList<[
     FeatureHighWord,
     FeatureInterlockedAccess1,
     FeatureLoadStoreOnCond,
-    FeaturePopulationCount
+    FeaturePopulationCount,
+    FeatureMessageSecurityAssist4
 ]>;
 
 //===----------------------------------------------------------------------===//
@@ -133,6 +139,11 @@ def FeatureLoadStoreOnCond2 : SystemZFeature<
   "Assume that the load/store-on-condition facility 2 is installed"
 >;
 
+def FeatureMessageSecurityAssist5 : SystemZFeature<
+  "message-security-assist-extension5", "MessageSecurityAssist5",
+  "Assume that the message-security-assist extension facility 5 is installed"
+>;
+
 def FeatureVector : SystemZFeature<
   "vector", "Vector",
   "Assume that the vectory facility is installed"
@@ -142,6 +153,7 @@ def FeatureNoVector : SystemZMissingFeature<"Vector">;
 def Arch11NewFeatures : SystemZFeatureList<[
     FeatureLoadAndZeroRightmostByte,
     FeatureLoadStoreOnCond2,
+    FeatureMessageSecurityAssist5,
     FeatureVector
 ]>;
 

diff --git a/lib/Target/SystemZ/SystemZInstrFormats.td b/lib/Target/SystemZ/SystemZInstrFormats.td
index e60dba1db521e9bf38d7844f5499016e5ebde959..333425d2ad79bd42158745005a2bdf0e08609426 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrFormats.td
+++ b/lib/Target/SystemZ/SystemZInstrFormats.td
@@ -1714,6 +1714,12 @@ class SideEffectInherentS<string mnemonic, bits<16> opcode,
   let BD2 = 0;
 }
 
+class SideEffectInherentRRE<string mnemonic, bits<16> opcode>
+  : InstRRE<opcode, (outs), (ins), mnemonic, []> {
+  let R1 = 0;
+  let R2 = 0;
+}
+
 // Allow an optional TLS marker symbol to generate TLS call relocations.
 class CallRI<string mnemonic, bits<12> opcode>
   : InstRIb<opcode, (outs), (ins GR64:$R1, brtarget16tls:$RI2),
@@ -2611,6 +2617,14 @@ class SideEffectBinaryMemMemRR<string mnemonic, bits<8> opcode,
     let DisableEncoding = "$R1src, $R2src";
 }
 
+class SideEffectBinaryMemRRE<string mnemonic, bits<16> opcode,
+                             RegisterOperand cls1, RegisterOperand cls2>
+  : InstRRE<opcode, (outs cls2:$R2), (ins cls1:$R1, cls2:$R2src),
+            mnemonic#"\t$R1, $R2", []> {
+  let Constraints = "$R2 = $R2src";
+  let DisableEncoding = "$R2src";
+}
+
 class SideEffectBinaryMemMemRRE<string mnemonic, bits<16> opcode,
                                 RegisterOperand cls1, RegisterOperand cls2>
   : InstRRE<opcode, (outs cls1:$R1, cls2:$R2), (ins cls1:$R1src, cls2:$R2src),
@@ -3365,6 +3379,18 @@ class TestRXE<string mnemonic, bits<16> opcode, SDPatternOperator operator,
   let M3 = 0;
 }
 
+class SideEffectTernaryMemMemMemRRFb<string mnemonic, bits<16> opcode,
+                                     RegisterOperand cls1,
+                                     RegisterOperand cls2,
+                                     RegisterOperand cls3>
+  : InstRRFb<opcode, (outs cls1:$R1, cls2:$R2, cls3:$R3),
+             (ins cls1:$R1src, cls2:$R2src, cls3:$R3src),
+             mnemonic#"\t$R1, $R3, $R2", []> {
+  let Constraints = "$R1 = $R1src, $R2 = $R2src, $R3 = $R3src";
+  let DisableEncoding = "$R1src, $R2src, $R3src";
+  let M4 = 0;
+}
+
 class SideEffectTernaryRRFc<string mnemonic, bits<16> opcode,
                             RegisterOperand cls1, RegisterOperand cls2,
                             Immediate imm>

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index f76e1612a35fdf9c1aef5d336d70a99ca2fc4dca..7b3893e7b8e1e31dcced5fbe324686170d19cd13 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -1634,6 +1634,29 @@ let mayLoad = 1, mayStore = 1, Defs = [CC] in {
   }
 }
 
+//===----------------------------------------------------------------------===//
+// Message-security assist
+//===----------------------------------------------------------------------===//
+
+let mayLoad = 1, mayStore = 1, Uses = [R0L, R1D], Defs = [CC] in {
+  def KM  : SideEffectBinaryMemMemRRE<"km",  0xB92E, GR128, GR128>;
+  def KMC : SideEffectBinaryMemMemRRE<"kmc", 0xB92F, GR128, GR128>;
+
+  def KIMD : SideEffectBinaryMemRRE<"kimd", 0xB93E, GR64, GR128>;
+  def KLMD : SideEffectBinaryMemRRE<"klmd", 0xB93F, GR64, GR128>;
+  def KMAC : SideEffectBinaryMemRRE<"kmac", 0xB91E, GR64, GR128>;
+
+  let Predicates = [FeatureMessageSecurityAssist4] in {
+    def KMF   : SideEffectBinaryMemMemRRE<"kmf", 0xB92A, GR128, GR128>;
+    def KMO   : SideEffectBinaryMemMemRRE<"kmo", 0xB92B, GR128, GR128>;
+    def KMCTR : SideEffectTernaryMemMemMemRRFb<"kmctr", 0xB92D,
+                                               GR128, GR128, GR128>;
+    def PCC   : SideEffectInherentRRE<"pcc", 0xB92C>;
+  }
+  let Predicates = [FeatureMessageSecurityAssist5] in
+    def PPNO  : SideEffectBinaryMemMemRRE<"ppno", 0xB93C, GR128, GR128>;
+}
+
 //===----------------------------------------------------------------------===//
 // Access registers
 //===----------------------------------------------------------------------===//

diff --git a/lib/Target/SystemZ/SystemZScheduleZ13.td b/lib/Target/SystemZ/SystemZScheduleZ13.td
index 06850de8253009da0976e84ecb87f01e1809a068..8058293ca852a3a95e9d55f1959dd6493978375a 100644 (file)
--- a/lib/Target/SystemZ/SystemZScheduleZ13.td
+++ b/lib/Target/SystemZ/SystemZScheduleZ13.td
@@ -573,6 +573,13 @@ def : InstRW<[FXa, Lat30, GroupAlone], (instregex "TR(T|O)(T|O)(Opt)?$")>;
 def : InstRW<[FXa, Lat30, GroupAlone], (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
 def : InstRW<[FXa, Lat30, GroupAlone], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
 
+//===----------------------------------------------------------------------===//
+// Message-security assist
+//===----------------------------------------------------------------------===//
+
+def : InstRW<[FXa, Lat30, GroupAlone], (instregex "KM(C|F|O|CTR)?$")>;
+def : InstRW<[FXa, Lat30, GroupAlone], (instregex "(KIMD|KLMD|KMAC|PCC|PPNO)$")>;
+
 //===----------------------------------------------------------------------===//
 // Access registers
 //===----------------------------------------------------------------------===//

diff --git a/lib/Target/SystemZ/SystemZScheduleZ196.td b/lib/Target/SystemZ/SystemZScheduleZ196.td
index 740d02ffe09310337c8e599f903d16712dccb217..664c674b31f4f9b050e5536df21e87febdd18066 100644 (file)
--- a/lib/Target/SystemZ/SystemZScheduleZ196.td
+++ b/lib/Target/SystemZ/SystemZScheduleZ196.td
@@ -530,6 +530,13 @@ def : InstRW<[FXU, Lat30, GroupAlone], (instregex "TR(T|O)(T|O)(Opt)?$")>;
 def : InstRW<[FXU, Lat30, GroupAlone], (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
 def : InstRW<[FXU, Lat30, GroupAlone], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
 
+//===----------------------------------------------------------------------===//
+// Message-security assist
+//===----------------------------------------------------------------------===//
+
+def : InstRW<[FXU, Lat30, GroupAlone], (instregex "KM(C|F|O|CTR)?$")>;
+def : InstRW<[FXU, Lat30, GroupAlone], (instregex "(KIMD|KLMD|KMAC|PCC)$")>;
+
 //===----------------------------------------------------------------------===//
 // Access registers
 //===----------------------------------------------------------------------===//

diff --git a/lib/Target/SystemZ/SystemZScheduleZEC12.td b/lib/Target/SystemZ/SystemZScheduleZEC12.td
index 05835828a1befc05065d0aad74656857db8ea321..324f5d1c76b6c6658d494f64a1e0cb77250f2f9f 100644 (file)
--- a/lib/Target/SystemZ/SystemZScheduleZEC12.td
+++ b/lib/Target/SystemZ/SystemZScheduleZEC12.td
@@ -542,6 +542,13 @@ def : InstRW<[FXU, Lat30, GroupAlone], (instregex "TR(T|O)(T|O)(Opt)?$")>;
 def : InstRW<[FXU, Lat30, GroupAlone], (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
 def : InstRW<[FXU, Lat30, GroupAlone], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
 
+//===----------------------------------------------------------------------===//
+// Message-security assist
+//===----------------------------------------------------------------------===//
+
+def : InstRW<[FXU, Lat30, GroupAlone], (instregex "KM(C|F|O|CTR)?$")>;
+def : InstRW<[FXU, Lat30, GroupAlone], (instregex "(KIMD|KLMD|KMAC|PCC)$")>;
+
 //===----------------------------------------------------------------------===//
 // Access registers
 //===----------------------------------------------------------------------===//

diff --git a/lib/Target/SystemZ/SystemZSubtarget.cpp b/lib/Target/SystemZ/SystemZSubtarget.cpp
index ce07ea3318a56565937ca1fced8dc700ebb4c758..022679a7bc180fed5ad8481cc65d17b774d0ae3f 100644 (file)
--- a/lib/Target/SystemZ/SystemZSubtarget.cpp
+++ b/lib/Target/SystemZ/SystemZSubtarget.cpp
@@ -37,12 +37,13 @@ SystemZSubtarget::SystemZSubtarget(const Triple &TT, const std::string &CPU,
                                    const TargetMachine &TM)
     : SystemZGenSubtargetInfo(TT, CPU, FS), HasDistinctOps(false),
       HasLoadStoreOnCond(false), HasHighWord(false), HasFPExtension(false),
-      HasPopulationCount(false), HasFastSerialization(false),
-      HasInterlockedAccess1(false), HasMiscellaneousExtensions(false),
+      HasPopulationCount(false), HasMessageSecurityAssist4(false),
+      HasFastSerialization(false), HasInterlockedAccess1(false),
+      HasMiscellaneousExtensions(false),
       HasExecutionHint(false), HasLoadAndTrap(false),
       HasTransactionalExecution(false), HasProcessorAssist(false),
       HasVector(false), HasLoadStoreOnCond2(false),
-      HasLoadAndZeroRightmostByte(false),
+      HasLoadAndZeroRightmostByte(false), HasMessageSecurityAssist5(false),
       TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
       TLInfo(TM, *this), TSInfo(), FrameLowering() {}
 

diff --git a/lib/Target/SystemZ/SystemZSubtarget.h b/lib/Target/SystemZ/SystemZSubtarget.h
index cdb61327a16af6d0c30cbbd8a8e7a0889017bb8b..770dd7cd939ffbbad4e28c472f0d49cc02a94761 100644 (file)
--- a/lib/Target/SystemZ/SystemZSubtarget.h
+++ b/lib/Target/SystemZ/SystemZSubtarget.h
@@ -39,6 +39,7 @@ protected:
   bool HasHighWord;
   bool HasFPExtension;
   bool HasPopulationCount;
+  bool HasMessageSecurityAssist4;
   bool HasFastSerialization;
   bool HasInterlockedAccess1;
   bool HasMiscellaneousExtensions;
@@ -49,6 +50,7 @@ protected:
   bool HasVector;
   bool HasLoadStoreOnCond2;
   bool HasLoadAndZeroRightmostByte;
+  bool HasMessageSecurityAssist5;
 
 private:
   Triple TargetTriple;
@@ -104,6 +106,10 @@ public:
   // Return true if the target has the population-count facility.
   bool hasPopulationCount() const { return HasPopulationCount; }
 
+  // Return true if the target has the message-security-assist
+  // extension facility 4.
+  bool hasMessageSecurityAssist4() const { return HasMessageSecurityAssist4; }
+
   // Return true if the target has the fast-serialization facility.
   bool hasFastSerialization() const { return HasFastSerialization; }
 
@@ -132,6 +138,10 @@ public:
     return HasLoadAndZeroRightmostByte;
   }
 
+  // Return true if the target has the message-security-assist
+  // extension facility 5.
+  bool hasMessageSecurityAssist5() const { return HasMessageSecurityAssist5; }
+
   // Return true if the target has the vector facility.
   bool hasVector() const { return HasVector; }
 

diff --git a/test/MC/Disassembler/SystemZ/insns-z13.txt b/test/MC/Disassembler/SystemZ/insns-z13.txt
index dcee2768584117bb9b09243c4cf0a4672a3490f4..4f5ec43f73487297d613c038e86dc9846f25de45 100644 (file)
--- a/test/MC/Disassembler/SystemZ/insns-z13.txt
+++ b/test/MC/Disassembler/SystemZ/insns-z13.txt
@@ -353,6 +353,18 @@
 # CHECK: lzrg %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x2a
 
+# CHECK: ppno %r2, %r10
+0xb9 0x3c 0x00 0x2a
+
+# CHECK: ppno %r2, %r14
+0xb9 0x3c 0x00 0x2e
+
+# CHECK: ppno %r14, %r2
+0xb9 0x3c 0x00 0xe2
+
+# CHECK: ppno %r14, %r10
+0xb9 0x3c 0x00 0xea
+
 # CHECK: stocfh %r0, 0, 0
 0xeb 0x00 0x00 0x00 0x00 0xe1
 

diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt
index 611acec33655f4266a072e772259aee3e27856e0..4d1a2789f091f4d116df4f2bef696e613fd71eb4 100644 (file)
--- a/test/MC/Disassembler/SystemZ/insns.txt
+++ b/test/MC/Disassembler/SystemZ/insns.txt
@@ -4537,6 +4537,102 @@
 # CHECK: ipm %r15
 0xb2 0x22 0x00 0xf0
 
+# CHECK: kimd %r2, %r10
+0xb9 0x3e 0x00 0x2a
+
+# CHECK: kimd %r2, %r14
+0xb9 0x3e 0x00 0x2e
+
+# CHECK: kimd %r14, %r2
+0xb9 0x3e 0x00 0xe2
+
+# CHECK: kimd %r14, %r10
+0xb9 0x3e 0x00 0xea
+
+# CHECK: klmd %r2, %r10
+0xb9 0x3f 0x00 0x2a
+
+# CHECK: klmd %r2, %r14
+0xb9 0x3f 0x00 0x2e
+
+# CHECK: klmd %r14, %r2
+0xb9 0x3f 0x00 0xe2
+
+# CHECK: klmd %r14, %r10
+0xb9 0x3f 0x00 0xea
+
+# CHECK: km %r2, %r10
+0xb9 0x2e 0x00 0x2a
+
+# CHECK: km %r2, %r14
+0xb9 0x2e 0x00 0x2e
+
+# CHECK: km %r14, %r2
+0xb9 0x2e 0x00 0xe2
+
+# CHECK: km %r14, %r10
+0xb9 0x2e 0x00 0xea
+
+# CHECK: kmac %r2, %r10
+0xb9 0x1e 0x00 0x2a
+
+# CHECK: kmac %r2, %r14
+0xb9 0x1e 0x00 0x2e
+
+# CHECK: kmac %r14, %r2
+0xb9 0x1e 0x00 0xe2
+
+# CHECK: kmac %r14, %r10
+0xb9 0x1e 0x00 0xea
+
+# CHECK: kmc %r2, %r10
+0xb9 0x2f 0x00 0x2a
+
+# CHECK: kmc %r2, %r14
+0xb9 0x2f 0x00 0x2e
+
+# CHECK: kmc %r14, %r2
+0xb9 0x2f 0x00 0xe2
+
+# CHECK: kmc %r14, %r10
+0xb9 0x2f 0x00 0xea
+
+# CHECK: kmctr %r2, %r4, %r10
+0xb9 0x2d 0x40 0x2a
+
+# CHECK: kmctr %r2, %r6, %r14
+0xb9 0x2d 0x60 0x2e
+
+# CHECK: kmctr %r14, %r8, %r2
+0xb9 0x2d 0x80 0xe2
+
+# CHECK: kmctr %r14, %r12, %r10
+0xb9 0x2d 0xc0 0xea
+
+# CHECK: kmf %r2, %r10
+0xb9 0x2a 0x00 0x2a
+
+# CHECK: kmf %r2, %r14
+0xb9 0x2a 0x00 0x2e
+
+# CHECK: kmf %r14, %r2
+0xb9 0x2a 0x00 0xe2
+
+# CHECK: kmf %r14, %r10
+0xb9 0x2a 0x00 0xea
+
+# CHECK: kmo %r2, %r10
+0xb9 0x2b 0x00 0x2a
+
+# CHECK: kmo %r2, %r14
+0xb9 0x2b 0x00 0x2e
+
+# CHECK: kmo %r14, %r2
+0xb9 0x2b 0x00 0xe2
+
+# CHECK: kmo %r14, %r10
+0xb9 0x2b 0x00 0xea
+
 # CHECK: l %r0, 0
 0x58 0x00 0x00 0x00
 
@@ -8818,6 +8914,9 @@
 # CHECK: oy %r15, 0
 0xe3 0xf0 0x00 0x00 0x00 0x56
 
+# CHECK: pcc
+0xb9 0x2c 0x00 0x00
+
 # CHECK: pfd 0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x36
 

diff --git a/test/MC/SystemZ/insn-bad-z13.s b/test/MC/SystemZ/insn-bad-z13.s
index 71119784b994d5f2b7897dd4278fbbe6f63affa8..82f47feeb8a92b28ef08bbc09884bc6b00931678 100644 (file)
--- a/test/MC/SystemZ/insn-bad-z13.s
+++ b/test/MC/SystemZ/insn-bad-z13.s
@@ -103,6 +103,14 @@
        lzrg    %r0, -524289
        lzrg    %r0, 524288
 
+#CHECK: error: invalid register pair
+#CHECK: ppno   %r1, %r2
+#CHECK: error: invalid register pair
+#CHECK: ppno   %r2, %r1
+
+       ppno    %r1, %r2
+       ppno    %r2, %r1
+
 #CHECK: error: invalid operand
 #CHECK: stocfh %r0, 0, -1
 #CHECK: error: invalid operand

diff --git a/test/MC/SystemZ/insn-bad-z196.s b/test/MC/SystemZ/insn-bad-z196.s
index 8e57aa6508b2466155e6701efc9521b6f0bb755b..04c19ff6319cd94ff8440c6925c9bd8f080511eb 100644 (file)
--- a/test/MC/SystemZ/insn-bad-z196.s
+++ b/test/MC/SystemZ/insn-bad-z196.s
@@ -503,6 +503,33 @@
        fixbra  %f0, 0, %f2, 0
        fixbra  %f2, 0, %f0, 0
 
+#CHECK: error: invalid register pair
+#CHECK: kmctr  %r1, %r2, %r4
+#CHECK: error: invalid register pair
+#CHECK: kmctr  %r2, %r1, %r4
+#CHECK: error: invalid register pair
+#CHECK: kmctr  %r2, %r4, %r1
+
+       kmctr   %r1, %r2, %r4
+       kmctr   %r2, %r1, %r4
+       kmctr   %r2, %r4, %r1
+
+#CHECK: error: invalid register pair
+#CHECK: kmf    %r1, %r2
+#CHECK: error: invalid register pair
+#CHECK: kmf    %r2, %r1
+
+       kmf     %r1, %r2
+       kmf     %r2, %r1
+
+#CHECK: error: invalid register pair
+#CHECK: kmo    %r1, %r2
+#CHECK: error: invalid register pair
+#CHECK: kmo    %r2, %r1
+
+       kmo     %r1, %r2
+       kmo     %r2, %r1
+
 #CHECK: error: invalid operand
 #CHECK: laa    %r0, %r0, -524289
 #CHECK: error: invalid operand

diff --git a/test/MC/SystemZ/insn-bad-zEC12.s b/test/MC/SystemZ/insn-bad-zEC12.s
index a28b867a6f6cbc3ed45bb3148bdb89a813b569a1..4bc3be3292e4d86c9475403c365dd0bcc8b7dba5 100644 (file)
--- a/test/MC/SystemZ/insn-bad-zEC12.s
+++ b/test/MC/SystemZ/insn-bad-zEC12.s
@@ -197,6 +197,11 @@
        ppa     %r0, %r0, -1
        ppa     %r0, %r0, 16
 
+#CHECK: error: instruction requires: message-security-assist-extension5
+#CHECK: ppno   %r2, %r4
+
+       ppno    %r2, %r4
+
 #CHECK: error: invalid operand
 #CHECK: risbgn %r0,%r0,0,0,-1
 #CHECK: error: invalid operand

diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s
index 96e9ef67cad0538d715b2e1024f992aa93bfb0e5..607246ae25dbcb69cb2f39908e99247790d2e87a 100644 (file)
--- a/test/MC/SystemZ/insn-bad.s
+++ b/test/MC/SystemZ/insn-bad.s
@@ -2009,6 +2009,52 @@
        iill    %r0, -1
        iill    %r0, 0x10000
 
+#CHECK: error: invalid register pair
+#CHECK: kimd   %r0, %r1
+
+       kimd    %r0, %r1
+
+#CHECK: error: invalid register pair
+#CHECK: klmd   %r0, %r1
+
+       klmd    %r0, %r1
+
+#CHECK: error: invalid register pair
+#CHECK: km     %r1, %r2
+#CHECK: error: invalid register pair
+#CHECK: km     %r2, %r1
+
+       km      %r1, %r2
+       km      %r2, %r1
+
+#CHECK: error: invalid register pair
+#CHECK: kmac   %r0, %r1
+
+       kmac    %r0, %r1
+
+#CHECK: error: invalid register pair
+#CHECK: kmc    %r1, %r2
+#CHECK: error: invalid register pair
+#CHECK: kmc    %r2, %r1
+
+       kmc     %r1, %r2
+       kmc     %r2, %r1
+
+#CHECK: error: instruction requires: message-security-assist-extension4
+#CHECK: kmctr  %r2, %r4, %r6
+
+       kmctr   %r2, %r4, %r6
+
+#CHECK: error: instruction requires: message-security-assist-extension4
+#CHECK: kmf    %r2, %r4
+
+       kmf     %r2, %r4
+
+#CHECK: error: instruction requires: message-security-assist-extension4
+#CHECK: kmo    %r2, %r4
+
+       kmo     %r2, %r4
+
 #CHECK: error: invalid operand
 #CHECK: l      %r0, -1
 #CHECK: error: invalid operand
@@ -3427,6 +3473,11 @@
        oy      %r0, -524289
        oy      %r0, 524288
 
+#CHECK: error: instruction requires: message-security-assist-extension4
+#CHECK: pcc
+
+       pcc
+
 #CHECK: error: invalid operand
 #CHECK: pfd    -1, 0
 #CHECK: error: invalid operand

diff --git a/test/MC/SystemZ/insn-good-z13.s b/test/MC/SystemZ/insn-good-z13.s
index fb4a7af372c0367f5b77bfca6a88dd612a4ab2d9..cbfcfa9a89af943fdcdfd22b42269083b20dacdf 100644 (file)
--- a/test/MC/SystemZ/insn-good-z13.s
+++ b/test/MC/SystemZ/insn-good-z13.s
@@ -356,6 +356,16 @@
        stocfhnp  %r1, 2(%r3)
        stocfhno  %r1, 2(%r3)
 
+#CHECK: ppno   %r2, %r2                # encoding: [0xb9,0x3c,0x00,0x22]
+#CHECK: ppno   %r2, %r14               # encoding: [0xb9,0x3c,0x00,0x2e]
+#CHECK: ppno   %r14, %r2               # encoding: [0xb9,0x3c,0x00,0xe2]
+#CHECK: ppno   %r6, %r10               # encoding: [0xb9,0x3c,0x00,0x6a]
+
+       ppno    %r2, %r2
+       ppno    %r2, %r14
+       ppno    %r14, %r2
+       ppno    %r6, %r10
+
 #CHECK: va      %v0, %v0, %v0, 0        # encoding: [0xe7,0x00,0x00,0x00,0x00,0xf3]
 #CHECK: va      %v0, %v0, %v0, 15       # encoding: [0xe7,0x00,0x00,0x00,0xf0,0xf3]
 #CHECK: va      %v0, %v0, %v31, 0       # encoding: [0xe7,0x00,0xf0,0x00,0x02,0xf3]

diff --git a/test/MC/SystemZ/insn-good-z196.s b/test/MC/SystemZ/insn-good-z196.s
index b514b79d09893fc35d4ec6560ebeacc800bea592..02c473c11a4a9a4a6d25c4a890199b3d1bfbc4f7 100644 (file)
--- a/test/MC/SystemZ/insn-good-z196.s
+++ b/test/MC/SystemZ/insn-good-z196.s
@@ -619,6 +619,36 @@
        fixbra  %f4, 5, %f8, 9
        fixbra  %f13, 0, %f0, 0
 
+#CHECK: kmctr  %r2, %r2, %r2           # encoding: [0xb9,0x2d,0x20,0x22]
+#CHECK: kmctr  %r2, %r8, %r14          # encoding: [0xb9,0x2d,0x80,0x2e]
+#CHECK: kmctr  %r14, %r8, %r2          # encoding: [0xb9,0x2d,0x80,0xe2]
+#CHECK: kmctr  %r6, %r8, %r10          # encoding: [0xb9,0x2d,0x80,0x6a]
+
+       kmctr   %r2, %r2, %r2
+       kmctr   %r2, %r8, %r14
+       kmctr   %r14, %r8, %r2
+       kmctr   %r6, %r8, %r10
+
+#CHECK: kmf    %r2, %r2                # encoding: [0xb9,0x2a,0x00,0x22]
+#CHECK: kmf    %r2, %r14               # encoding: [0xb9,0x2a,0x00,0x2e]
+#CHECK: kmf    %r14, %r2               # encoding: [0xb9,0x2a,0x00,0xe2]
+#CHECK: kmf    %r6, %r10               # encoding: [0xb9,0x2a,0x00,0x6a]
+
+       kmf     %r2, %r2
+       kmf     %r2, %r14
+       kmf     %r14, %r2
+       kmf     %r6, %r10
+
+#CHECK: kmo    %r2, %r2                # encoding: [0xb9,0x2b,0x00,0x22]
+#CHECK: kmo    %r2, %r14               # encoding: [0xb9,0x2b,0x00,0x2e]
+#CHECK: kmo    %r14, %r2               # encoding: [0xb9,0x2b,0x00,0xe2]
+#CHECK: kmo    %r6, %r10               # encoding: [0xb9,0x2b,0x00,0x6a]
+
+       kmo     %r2, %r2
+       kmo     %r2, %r14
+       kmo     %r14, %r2
+       kmo     %r6, %r10
+
 #CHECK: laa    %r0, %r0, -524288       # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf8]
 #CHECK: laa    %r0, %r0, -1            # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf8]
 #CHECK: laa    %r0, %r0, 0             # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf8]
@@ -1303,6 +1333,10 @@
        ork     %r15,%r0,%r0
        ork     %r7,%r8,%r9
 
+#CHECK: pcc                             # encoding: [0xb9,0x2c,0x00,0x00]
+
+       pcc
+
 #CHECK: popcnt %r0, %r0                # encoding: [0xb9,0xe1,0x00,0x00]
 #CHECK: popcnt %r0, %r15               # encoding: [0xb9,0xe1,0x00,0x0f]
 #CHECK: popcnt %r15, %r0               # encoding: [0xb9,0xe1,0x00,0xf0]

diff --git a/test/MC/SystemZ/insn-good.s b/test/MC/SystemZ/insn-good.s
index e9301699aa421697066064ddb97a084e96d422fc..df075c7c72f6693e0a993290505817550cf9a35b 100644 (file)
--- a/test/MC/SystemZ/insn-good.s
+++ b/test/MC/SystemZ/insn-good.s
@@ -6364,6 +6364,56 @@
        ipm     %r1
        ipm     %r15
 
+#CHECK: kimd   %r0, %r2                # encoding: [0xb9,0x3e,0x00,0x02]
+#CHECK: kimd   %r0, %r14               # encoding: [0xb9,0x3e,0x00,0x0e]
+#CHECK: kimd   %r15, %r2               # encoding: [0xb9,0x3e,0x00,0xf2]
+#CHECK: kimd   %r7, %r10               # encoding: [0xb9,0x3e,0x00,0x7a]
+
+       kimd    %r0, %r2
+       kimd    %r0, %r14
+       kimd    %r15, %r2
+       kimd    %r7, %r10
+
+#CHECK: klmd   %r0, %r2                # encoding: [0xb9,0x3f,0x00,0x02]
+#CHECK: klmd   %r0, %r14               # encoding: [0xb9,0x3f,0x00,0x0e]
+#CHECK: klmd   %r15, %r2               # encoding: [0xb9,0x3f,0x00,0xf2]
+#CHECK: klmd   %r7, %r10               # encoding: [0xb9,0x3f,0x00,0x7a]
+
+       klmd    %r0, %r2
+       klmd    %r0, %r14
+       klmd    %r15, %r2
+       klmd    %r7, %r10
+
+#CHECK: km     %r2, %r2                # encoding: [0xb9,0x2e,0x00,0x22]
+#CHECK: km     %r2, %r14               # encoding: [0xb9,0x2e,0x00,0x2e]
+#CHECK: km     %r14, %r2               # encoding: [0xb9,0x2e,0x00,0xe2]
+#CHECK: km     %r6, %r10               # encoding: [0xb9,0x2e,0x00,0x6a]
+
+       km      %r2, %r2
+       km      %r2, %r14
+       km      %r14, %r2
+       km      %r6, %r10
+
+#CHECK: kmac   %r0, %r2                # encoding: [0xb9,0x1e,0x00,0x02]
+#CHECK: kmac   %r0, %r14               # encoding: [0xb9,0x1e,0x00,0x0e]
+#CHECK: kmac   %r15, %r2               # encoding: [0xb9,0x1e,0x00,0xf2]
+#CHECK: kmac   %r7, %r10               # encoding: [0xb9,0x1e,0x00,0x7a]
+
+       kmac    %r0, %r2
+       kmac    %r0, %r14
+       kmac    %r15, %r2
+       kmac    %r7, %r10
+
+#CHECK: kmc    %r2, %r2                # encoding: [0xb9,0x2f,0x00,0x22]
+#CHECK: kmc    %r2, %r14               # encoding: [0xb9,0x2f,0x00,0x2e]
+#CHECK: kmc    %r14, %r2               # encoding: [0xb9,0x2f,0x00,0xe2]
+#CHECK: kmc    %r6, %r10               # encoding: [0xb9,0x2f,0x00,0x6a]
+
+       kmc     %r2, %r2
+       kmc     %r2, %r14
+       kmc     %r14, %r2
+       kmc     %r6, %r10
+
 #CHECK: l      %r0, 0                  # encoding: [0x58,0x00,0x00,0x00]
 #CHECK: l      %r0, 4095               # encoding: [0x58,0x00,0x0f,0xff]
 #CHECK: l      %r0, 0(%r1)             # encoding: [0x58,0x00,0x10,0x00]