}
};
-static inline int esp_apptrace_log_lock()
+static inline int esp_apptrace_log_lock(void)
{
#if ESP_APPTRACE_PRINT_LOCK
esp_apptrace_tmo_t tmo;
#endif
}
-static inline void esp_apptrace_log_unlock()
+static inline void esp_apptrace_log_unlock(void)
{
#if ESP_APPTRACE_PRINT_LOCK
esp_apptrace_lock_give(&s_log_lock);
#endif
}
-static inline esp_err_t esp_apptrace_lock_initialize()
+static inline esp_err_t esp_apptrace_lock_initialize(void)
{
#if CONFIG_ESP32_APPTRACE_LOCK_ENABLE
esp_apptrace_lock_init(&s_trace_buf.lock);
return ESP_OK;
}
-static inline esp_err_t esp_apptrace_lock_cleanup()
+static inline esp_err_t esp_apptrace_lock_cleanup(void)
{
return ESP_OK;
}
return ESP_OK;
}
-esp_err_t esp_apptrace_unlock()
+esp_err_t esp_apptrace_unlock(void)
{
esp_err_t ret = ESP_OK;
#if CONFIG_ESP32_APPTRACE_LOCK_ENABLE
}
#if CONFIG_ESP32_APPTRACE_DEST_TRAX
-static void esp_apptrace_trax_init()
+static void esp_apptrace_trax_init(void)
{
// Stop trace, if any (on the current CPU)
eri_write(ERI_TRAX_TRAXCTRL, TRAXCTRL_TRSTP);
}
}
-static uint16_t esp_apptrace_trax_pend_chunk_sz_get()
+static uint16_t esp_apptrace_trax_pend_chunk_sz_get(void)
{
uint16_t ch_sz;
ESP_APPTRACE_LOGD("Get chunk enter %d w-r-s %d-%d-%d", s_trace_buf.trax.cur_pending_chunk_sz,
#endif
// assumed to be protected by caller from multi-core/thread access
-static esp_err_t esp_apptrace_trax_block_switch()
+static esp_err_t esp_apptrace_trax_block_switch(void)
{
int prev_block_num = s_trace_buf.trax.state.in_block % 2;
int new_block_num = prev_block_num ? (0) : (1);
return ESP_OK;
}
-static esp_err_t esp_apptrace_trax_dest_init()
+static esp_err_t esp_apptrace_trax_dest_init(void)
{
for (int i = 0; i < ESP_APPTRACE_TRAX_BLOCKS_NUM; i++) {
s_trace_buf.trax.blocks[i].start = (uint8_t *)s_trax_blocks[i];
}
#endif
-esp_err_t esp_apptrace_init()
+esp_err_t esp_apptrace_init(void)
{
int res;
#endif
}
-void esp_gcov_dump()
+void esp_gcov_dump(void)
{
// disable IRQs on this CPU, other CPU is halted by OpenOCD
unsigned irq_state = portENTER_CRITICAL_NESTED();
static bool s_tracing;
-esp_err_t heap_trace_init_tohost()
+esp_err_t heap_trace_init_tohost(void)
{
if (s_tracing) {
return ESP_ERR_INVALID_STATE;
*
* @return ESP_OK on success, otherwise see esp_err_t
*/
-esp_err_t esp_apptrace_init();
+esp_err_t esp_apptrace_init(void);
/**
* @brief Configures down buffer.
* RTT lock configuration fallback
*/
#ifndef SEGGER_RTT_LOCK
- void SEGGER_SYSVIEW_X_RTT_Lock();
+ void SEGGER_SYSVIEW_X_RTT_Lock(void);
#define SEGGER_RTT_LOCK() SEGGER_SYSVIEW_X_RTT_Lock() // Lock RTT (nestable) (i.e. disable interrupts)
#endif
#ifndef SEGGER_RTT_UNLOCK
- void SEGGER_SYSVIEW_X_RTT_Unlock();
+ void SEGGER_SYSVIEW_X_RTT_Unlock(void);
#define SEGGER_RTT_UNLOCK() SEGGER_SYSVIEW_X_RTT_Unlock() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
#endif
#define SEGGER_SYSVIEW_GET_INTERRUPT_ID() SEGGER_SYSVIEW_X_GetInterruptId() // Get the currently active interrupt Id from the user-provided function.
#endif
-unsigned SEGGER_SYSVIEW_X_SysView_Lock();
+unsigned SEGGER_SYSVIEW_X_SysView_Lock(void);
void SEGGER_SYSVIEW_X_SysView_Unlock(unsigned int_state);
// to be recursive save IRQ status on the stack of the caller
#define SEGGER_SYSVIEW_LOCK() unsigned _SYSVIEW_int_state = SEGGER_SYSVIEW_X_SysView_Lock()
*
**********************************************************************
*/
-static void SEGGER_SYSVIEW_TS_Init()
+static void SEGGER_SYSVIEW_TS_Init(void)
{
/* We only need to initialize something if we use Timer Group.
* esp_timer and ccount can be used as is.
SEGGER_SYSVIEW_DisableEvents(disable_evts);
}
-U32 SEGGER_SYSVIEW_X_GetTimestamp()
+U32 SEGGER_SYSVIEW_X_GetTimestamp(void)
{
#if TS_USE_TIMERGROUP
uint64_t ts = 0;
#endif
}
-void SEGGER_SYSVIEW_X_RTT_Lock()
+void SEGGER_SYSVIEW_X_RTT_Lock(void)
{
}
-void SEGGER_SYSVIEW_X_RTT_Unlock()
+void SEGGER_SYSVIEW_X_RTT_Unlock(void)
{
}
-unsigned SEGGER_SYSVIEW_X_SysView_Lock()
+unsigned SEGGER_SYSVIEW_X_SysView_Lock(void)
{
esp_apptrace_tmo_t tmo;
esp_apptrace_tmo_init(&tmo, SEGGER_LOCK_WAIT_TMO);
static SemaphoreHandle_t s_print_lock;
#endif
-static uint64_t esp_apptrace_test_ts_get();
+static uint64_t esp_apptrace_test_ts_get(void);
static void esp_apptrace_test_timer_isr(void *arg)
{
static int s_ts_timer_group, s_ts_timer_idx;
-static uint64_t esp_apptrace_test_ts_get()
+static uint64_t esp_apptrace_test_ts_get(void)
{
uint64_t ts = 0;
timer_get_counter_value(s_ts_timer_group, s_ts_timer_idx, &ts);
timer_start(timer_group, timer_idx);
}
-static void esp_apptrace_test_ts_cleanup()
+static void esp_apptrace_test_ts_cleanup(void)
{
timer_config_t config;
return ESP_OK;
}
-esp_err_t esp_ota_mark_app_valid_cancel_rollback()
+esp_err_t esp_ota_mark_app_valid_cancel_rollback(void)
{
return esp_ota_current_ota_is_workable(true);
}
-esp_err_t esp_ota_mark_app_invalid_rollback_and_reboot()
+esp_err_t esp_ota_mark_app_invalid_rollback_and_reboot(void)
{
return esp_ota_current_ota_is_workable(false);
}
return num_invalid_otadata;
}
-const esp_partition_t* esp_ota_get_last_invalid_partition()
+const esp_partition_t* esp_ota_get_last_invalid_partition(void)
{
esp_ota_select_entry_t otadata[2];
if (read_otadata(otadata) == NULL) {
* @return
* - ESP_OK: if successful.
*/
-esp_err_t esp_ota_mark_app_valid_cancel_rollback();
+esp_err_t esp_ota_mark_app_valid_cancel_rollback(void);
/**
* @brief This function is called to roll back to the previously workable app with reboot.
* - ESP_FAIL: if not successful.
* - ESP_ERR_OTA_ROLLBACK_FAILED: The rollback is not possible due to flash does not have any apps.
*/
-esp_err_t esp_ota_mark_app_invalid_rollback_and_reboot();
+esp_err_t esp_ota_mark_app_invalid_rollback_and_reboot(void);
/**
* @brief Returns last partition with invalid state (ESP_OTA_IMG_INVALID or ESP_OTA_IMG_ABORTED).
*
* @return partition.
*/
-const esp_partition_t* esp_ota_get_last_invalid_partition();
+const esp_partition_t* esp_ota_get_last_invalid_partition(void);
/**
* @brief Returns state for given partition.
/* @brief Copies a current app to next partition (OTA0-15), after that ESP is rebooting and run this (the next) OTAx.
*/
-static void copy_current_app_to_next_part_and_reboot()
+static void copy_current_app_to_next_part_and_reboot(void)
{
const esp_partition_t *cur_app = esp_ota_get_running_partition();
copy_current_app_to_next_part(cur_app, get_next_update_partition());
* The hardware is mostly uninitialized, flash cache is down and the app CPU is in reset.
* We do have a stack, so we can do the initialization in C.
*/
-void __attribute__((noreturn)) call_start_cpu0()
+void __attribute__((noreturn)) call_start_cpu0(void)
{
// 1. Hardware initialization
if (bootloader_init() != ESP_OK) {
}
// Return global reent struct if any newlib functions are linked to bootloader
-struct _reent* __getreent() {
+struct _reent* __getreent(void) {
return _GLOBAL_REENT;
}
/**
* @brief Configure VDDSDIO, call this API to rise VDDSDIO to 1.9V when VDDSDIO regulator is enabled as 1.8V mode.
*/
-void bootloader_common_vddsdio_configure();
+void bootloader_common_vddsdio_configure(void);
#ifdef __cplusplus
}
*
* @return None
*/
-void bootloader_flash_update_id();
+void bootloader_flash_update_id(void);
/**
* @brief Set the flash CS setup and hold time.
*
* @return None
*/
-void bootloader_flash_cs_timing_config();
+void bootloader_flash_cs_timing_config(void);
/**
* @brief Configure SPI flash clock.
* serial re-flashing of an unauthorised code in absence of secure boot.
*
*/
-void esp_flash_write_protect_crypt_cnt();
+void esp_flash_write_protect_crypt_cnt(void);
/** @brief Return the flash encryption mode
*
*
* @return
*/
-esp_flash_enc_mode_t esp_get_flash_encryption_mode();
+esp_flash_enc_mode_t esp_get_flash_encryption_mode(void);
#ifdef __cplusplus
}
*
* @return Number of free pages
*/
-uint32_t bootloader_mmap_get_free_pages();
+uint32_t bootloader_mmap_get_free_pages(void);
/**
* @brief Map a region of flash to data memory
* @return ESP_OK - If the setting is successful.
* ESP_FAIL - If the setting is not successful.
*/
-esp_err_t bootloader_init();
+esp_err_t bootloader_init(void);
typedef void *bootloader_sha256_handle_t;
-bootloader_sha256_handle_t bootloader_sha256_start();
+bootloader_sha256_handle_t bootloader_sha256_start(void);
void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data, size_t data_len);
* mfg_id = (ID >> 16) & 0xFF;
flash_id = ID & 0xffff;
*/
-uint32_t bootloader_read_flash_id();
+uint32_t bootloader_read_flash_id(void);
#ifdef __cplusplus
}
#include "soc/dport_reg.h"
#include "soc/efuse_periph.h"
-void bootloader_clock_configure()
+void bootloader_clock_configure(void)
{
// ROM bootloader may have put a lot of text into UART0 FIFO.
// Wait for it to be printed.
return ESP_OK;
}
-void bootloader_common_vddsdio_configure()
+void bootloader_common_vddsdio_configure(void)
{
#if CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V
rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config();
static spi_flash_mmap_handle_t map;
-uint32_t bootloader_mmap_get_free_pages()
+uint32_t bootloader_mmap_get_free_pages(void)
{
return spi_flash_mmap_get_free_pages(SPI_FLASH_MMAP_DATA);
}
// Current bootloader mapping (ab)used for bootloader_read()
static uint32_t current_read_mapping = UINT32_MAX;
-uint32_t bootloader_mmap_get_free_pages()
+uint32_t bootloader_mmap_get_free_pages(void)
{
/**
* Allow mapping up to 50 of the 51 available MMU blocks (last one used for reads)
#include "flash_qio_mode.h"
#include "bootloader_flash_config.h"
-void bootloader_flash_update_id()
+void bootloader_flash_update_id(void)
{
g_rom_flashchip.device_id = bootloader_read_flash_id();
}
-void IRAM_ATTR bootloader_flash_cs_timing_config()
+void IRAM_ATTR bootloader_flash_cs_timing_config(void)
{
SET_PERI_REG_MASK(SPI_USER_REG(0), SPI_CS_HOLD_M | SPI_CS_SETUP_M);
SET_PERI_REG_BITS(SPI_CTRL2_REG(0), SPI_HOLD_TIME_V, 1, SPI_HOLD_TIME_S);
static const char* TAG = "boot";
-static esp_err_t bootloader_main();
+static esp_err_t bootloader_main(void);
static void print_flash_info(const esp_image_header_t* pfhdr);
static void update_flash_config(const esp_image_header_t* pfhdr);
static void bootloader_init_flash_configure(const esp_image_header_t* pfhdr);
static void wdt_reset_check(void);
-esp_err_t bootloader_init()
+esp_err_t bootloader_init(void)
{
cpu_configure_region_protection();
cpu_init_memctl();
return ESP_OK;
}
-static esp_err_t bootloader_main()
+static esp_err_t bootloader_main(void)
{
bootloader_common_vddsdio_configure();
/* Read and keep flash ID, for further use. */
while(1) {}
}
-void abort()
+void abort(void)
{
#if !CONFIG_ESP32_PANIC_SILENT_REBOOT
ets_printf("abort() was called at PC 0x%08x\r\n", (intptr_t)__builtin_return_address(0) - 3);
// Words in final SHA256 digest
static const size_t DIGEST_WORDS = (32 / sizeof(uint32_t));
-bootloader_sha256_handle_t bootloader_sha256_start()
+bootloader_sha256_handle_t bootloader_sha256_start(void)
{
// Enable SHA hardware
ets_sha_enable();
/* Static functions for stages of flash encryption */
static esp_err_t initialise_flash_encryption(void);
static esp_err_t encrypt_flash_contents(uint32_t flash_crypt_cnt, bool flash_crypt_wr_dis);
-static esp_err_t encrypt_bootloader();
+static esp_err_t encrypt_bootloader(void);
static esp_err_t encrypt_and_load_partition_table(esp_partition_info_t *partition_table, int *num_partitions);
static esp_err_t encrypt_partition(int index, const esp_partition_info_t *partition);
return ESP_OK;
}
-static esp_err_t encrypt_bootloader()
+static esp_err_t encrypt_bootloader(void)
{
esp_err_t err;
uint32_t image_length;
}
/* Burn values written to the efuse write registers */
-static inline void burn_efuses()
+static inline void burn_efuses(void)
{
esp_efuse_burn_new_values();
}
#include "esp_efuse_table.h"
#include "esp_flash_encrypt.h"
-void esp_flash_write_protect_crypt_cnt()
+void esp_flash_write_protect_crypt_cnt(void)
{
uint8_t flash_crypt_cnt_wr_dis = 0;
esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
}
}
-esp_flash_enc_mode_t esp_get_flash_encryption_mode()
+esp_flash_enc_mode_t esp_get_flash_encryption_mode(void)
{
uint8_t efuse_flash_crypt_cnt_wr_protected = 0;
uint8_t dis_dl_enc = 0, dis_dl_dec = 0, dis_dl_cache = 0;
} qio_info_t;
/* Read 8 bit status using RDSR command */
-static unsigned read_status_8b_rdsr();
+static unsigned read_status_8b_rdsr(void);
/* Read 8 bit status (second byte) using RDSR2 command */
-static unsigned read_status_8b_rdsr2();
+static unsigned read_status_8b_rdsr2(void);
/* read 16 bit status using RDSR & RDSR2 (low and high bytes) */
-static unsigned read_status_16b_rdsr_rdsr2();
+static unsigned read_status_16b_rdsr_rdsr2(void);
/* Write 8 bit status using WRSR */
static void write_status_8b_wrsr(unsigned new_status);
static void write_status_16b_wrsr(unsigned new_status);
/* Read 8 bit status of XM25QU64A */
-static unsigned read_status_8b_xmc25qu64a();
+static unsigned read_status_8b_xmc25qu64a(void);
/* Write 8 bit status of XM25QU64A */
static void write_status_8b_xmc25qu64a(unsigned new_status);
/* dummy_len_plus values defined in ROM for SPI flash configuration */
extern uint8_t g_rom_spiflash_dummy_len_plus[];
-uint32_t bootloader_read_flash_id()
+uint32_t bootloader_read_flash_id(void)
{
uint32_t id = execute_flash_command(CMD_RDID, 0, 0, 24);
id = ((id & 0xff) << 16) | ((id >> 16) & 0xff) | (id & 0xff00);
return ESP_OK;
}
-static unsigned read_status_8b_rdsr()
+static unsigned read_status_8b_rdsr(void)
{
return execute_flash_command(CMD_RDSR, 0, 0, 8);
}
-static unsigned read_status_8b_rdsr2()
+static unsigned read_status_8b_rdsr2(void)
{
return execute_flash_command(CMD_RDSR2, 0, 0, 8);
}
-static unsigned read_status_16b_rdsr_rdsr2()
+static unsigned read_status_16b_rdsr_rdsr2(void)
{
return execute_flash_command(CMD_RDSR, 0, 0, 8) | (execute_flash_command(CMD_RDSR2, 0, 0, 8) << 8);
}
execute_flash_command(CMD_WRSR, new_status, 16, 0);
}
-static unsigned read_status_8b_xmc25qu64a()
+static unsigned read_status_8b_xmc25qu64a(void)
{
execute_flash_command(CMD_OTPEN, 0, 0, 0); /* Enter OTP mode */
esp_rom_spiflash_wait_idle(&g_rom_flashchip);
#include <sys/param.h>
#include <mbedtls/sha256.h>
-bootloader_sha256_handle_t bootloader_sha256_start()
+bootloader_sha256_handle_t bootloader_sha256_start(void)
{
mbedtls_sha256_context *ctx = (mbedtls_sha256_context *)malloc(sizeof(mbedtls_sha256_context));
if (!ctx) {
return (btc_transfer_context(&msg, &arg, sizeof(btc_spp_args_t), NULL) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
-esp_err_t esp_spp_deinit()
+esp_err_t esp_spp_deinit(void)
{
btc_msg_t msg;
btc_spp_args_t arg;
return (btc_transfer_context(&msg, &arg, sizeof(btc_spp_args_t), btc_spp_arg_deep_copy) == BT_STATUS_SUCCESS ? ESP_OK : ESP_FAIL);
}
-esp_err_t esp_spp_vfs_register()
+esp_err_t esp_spp_vfs_register(void)
{
ESP_BLUEDROID_STATUS_CHECK(ESP_BLUEDROID_STATUS_ENABLED);
* - ESP_OK: success
* - other: failed
*/
-esp_err_t esp_spp_deinit();
+esp_err_t esp_spp_deinit(void);
/**
** Returns void
**
*******************************************************************************/
-void bta_dm_sm_disable( )
+void bta_dm_sm_disable(void)
{
bta_sys_deregister( BTA_ID_DM );
}
** Returns void
**
*******************************************************************************/
-void bta_dm_search_sm_disable( )
+void bta_dm_search_sm_disable(void)
{
bta_sys_deregister( BTA_ID_DM_SEARCH );
static void bta_dm_pm_btm_cback(BD_ADDR bd_addr, tBTM_PM_STATUS status, UINT16 value, UINT8 hci_status);
static BOOLEAN bta_dm_pm_park(BD_ADDR peer_addr);
static BOOLEAN bta_dm_pm_sniff(tBTA_DM_PEER_DEVICE *p_peer_dev, UINT8 index);
-static BOOLEAN bta_dm_pm_is_sco_active ();
+static BOOLEAN bta_dm_pm_is_sco_active (void);
static void bta_dm_pm_hid_check(BOOLEAN bScoActive);
static void bta_dm_pm_set_sniff_policy(tBTA_DM_PEER_DEVICE *p_dev, BOOLEAN bDisable);
static void bta_dm_pm_stop_timer_by_index(tBTA_PM_TIMER *p_timer,
** Returns BOOLEAN. TRUE if SCO active, else FALSE
**
*******************************************************************************/
-static BOOLEAN bta_dm_pm_is_sco_active ()
+static BOOLEAN bta_dm_pm_is_sco_active (void)
{
int j;
BOOLEAN bScoActive = FALSE;
, bda[0], bda[1], bda[2], bda[3], bda[4], bda[5]);
}
-static void cacheClose()
+static void cacheClose(void)
{
if (sCacheFD != 0) {
fclose(sCacheFD);
BOOLEAN service_availability = TRUE;
/* helper functions for handling AT commands queueing */
-static void bta_hf_client_handle_ok();
+static void bta_hf_client_handle_ok(void);
static void bta_hf_client_clear_queued_at(void)
{
** No buffer parsing is being done here.
*******************************************************************************/
-static void bta_hf_client_handle_ok()
+static void bta_hf_client_handle_ok(void)
{
APPL_TRACE_DEBUG("%s", __FUNCTION__);
bta_hf_client_send_queued_at();
}
-static void bta_hf_client_handle_ring()
+static void bta_hf_client_handle_ring(void)
{
APPL_TRACE_DEBUG("%s", __FUNCTION__);
bta_hf_client_evt_val(BTA_HF_CLIENT_RING_INDICATION, 0);
extern void bta_hf_client_slc_seq(BOOLEAN error);
extern void bta_hf_client_collision_cback (tBTA_SYS_CONN_STATUS status, UINT8 id,
UINT8 app_id, BD_ADDR peer_addr);
-extern void bta_hf_client_resume_open ();
+extern void bta_hf_client_resume_open (void);
/* SDP functions */
extern BOOLEAN bta_hf_client_add_record(char *p_service_name,
** Returns None
**
*******************************************************************************/
-extern void BTA_GATTS_Init();
+extern void BTA_GATTS_Init(void);
/*******************************************************************************
**
* list.
* If no free PSMs exist, 0 will be returned.
*/
-static UINT16 bta_jv_get_free_psm()
+static UINT16 bta_jv_get_free_psm(void)
{
const int cnt = sizeof(bta_jv_cb.free_psm_list) / sizeof(bta_jv_cb.free_psm_list[0]);
for (int i = 0; i < cnt; i++) {
list_append(connect_queue, p_node);
}
-static void queue_int_advance()
+static void queue_int_advance(void)
{
if (connect_queue && !list_is_empty(connect_queue)) {
list_remove(connect_queue, list_front(connect_queue));
osi_thread_post(a2dp_source_local_param.btc_aa_src_task_hdl, btc_a2dp_source_handle_timer, NULL, 2, OSI_THREAD_MAX_TIMEOUT);
}
-static UINT64 time_now_us()
+static UINT64 time_now_us(void)
{
#if _POSIX_TIMERS
struct timespec ts_now;
** Returns NULL
**
*******************************************************************************/
-void app_ble_sec_init()
+void app_ble_sec_init(void)
{
// Reset Security Environment
memset(&app_sec_env, 0, sizeof(app_sec_env));
return item_size;
}
-esp_err_t btc_spp_vfs_register()
+esp_err_t btc_spp_vfs_register(void)
{
esp_vfs_t vfs = {
.flags = ESP_VFS_FLAG_DEFAULT,
#endif /* (BTM_SCO_HCI_INCLUDED == TRUE) */
};
-const controller_t *controller_get_interface()
+const controller_t *controller_get_interface(void)
{
static bool loaded = false;
if (!loaded) {
#endif /* #if (BTM_SCO_HCI_INCLUDED == TRUE) */
} controller_t;
-const controller_t *controller_get_interface();
+const controller_t *controller_get_interface(void);
#endif /*_CONTROLLER_H_*/
return true;
}
-static void hal_close()
+static void hal_close(void)
{
hci_hal_env_deinit();
transmit_data,
};
-const hci_hal_t *hci_hal_h4_get_interface()
+const hci_hal_t *hci_hal_h4_get_interface(void)
{
return &interface;
}
return NULL;
}
-static void init_layer_interface()
+static void init_layer_interface(void)
{
if (!interface_created) {
interface.transmit_command = transmit_command;
fragmenter_transmit_finished
};
-const hci_t *hci_layer_get_interface()
+const hci_t *hci_layer_get_interface(void)
{
hal = hci_hal_h4_get_interface();
packet_fragmenter = packet_fragmenter_get_interface();
make_write_default_erroneous_data_report,
};
-const hci_packet_factory_t *hci_packet_factory_get_interface()
+const hci_packet_factory_t *hci_packet_factory_get_interface(void)
{
return &interface;
}
parse_ble_read_suggested_default_data_length_response
};
-const hci_packet_parser_t *hci_packet_parser_get_interface()
+const hci_packet_parser_t *hci_packet_parser_get_interface(void)
{
return &interface;
}
void (*transmit_downward)(uint16_t type, void *data);
} hci_t;
-const hci_t *hci_layer_get_interface();
+const hci_t *hci_layer_get_interface(void);
int hci_start_up(void);
void hci_shut_down(void);
BT_HDR *(*make_write_default_erroneous_data_report)(uint8_t enable);
} hci_packet_factory_t;
-const hci_packet_factory_t *hci_packet_factory_get_interface();
+const hci_packet_factory_t *hci_packet_factory_get_interface(void);
#endif /*_HCI_PACKET_FACTORY_H_*/
);
} hci_packet_parser_t;
-const hci_packet_parser_t *hci_packet_parser_get_interface();
+const hci_packet_parser_t *hci_packet_parser_get_interface(void);
#endif /*_HCI_PACKET_PARSER_H_*/
void (*reassemble_and_dispatch)(BT_HDR *packet);
} packet_fragmenter_t;
-const packet_fragmenter_t *packet_fragmenter_get_interface();
+const packet_fragmenter_t *packet_fragmenter_get_interface(void);
#endif /* _PACKET_FRAGMENTER_H_ */
partial_packets = hash_map_new(NUMBER_OF_BUCKETS, hash_function_naive, NULL, NULL, NULL);
}
-static void cleanup()
+static void cleanup(void)
{
if (partial_packets) {
hash_map_free(partial_packets);
}
}
-static BT_HDR *fragment_get_current_packet()
+static BT_HDR *fragment_get_current_packet(void)
{
return current_fragment_packet;
}
reassemble_and_dispatch
};
-const packet_fragmenter_t *packet_fragmenter_get_interface()
+const packet_fragmenter_t *packet_fragmenter_get_interface(void)
{
controller = controller_get_interface();
return &interface;
** Returns None
**
******************************************************************************/
-void bte_main_lpm_allow_bt_device_sleep()
+void bte_main_lpm_allow_bt_device_sleep(void)
{
/**/
//hci->send_low_power_command(LPM_WAKE_DEASSERT);
** Returns None
**
******************************************************************************/
-void bte_main_lpm_wake_bt_device()
+void bte_main_lpm_wake_bt_device(void)
{
//hci->send_low_power_command(LPM_WAKE_ASSERT);
}
** Returns void.
**
*******************************************************************************/
-void AVDT_SINK_Activate()
+void AVDT_SINK_Activate(void)
{
tAVDT_SCB *p_scb = &avdt_cb.scb[0];
int i;
** Returns void.
**
*******************************************************************************/
-void AVDT_SINK_Deactivate()
+void AVDT_SINK_Deactivate(void)
{
tAVDT_SCB *p_scb = &avdt_cb.scb[0];
int i;
** Returns status
**
*******************************************************************************/
-tBTM_STATUS btm_ble_obtain_vsc_details()
+tBTM_STATUS btm_ble_obtain_vsc_details(void)
{
tBTM_STATUS st = BTM_SUCCESS;
return bdaddr_equals((bt_bdaddr_t *)x, (bt_bdaddr_t *)y);
}
-static void background_connections_lazy_init()
+static void background_connections_lazy_init(void)
{
if (!background_connections) {
background_connections = hash_map_new(background_connection_buckets,
return FALSE;
}
-static void background_connections_clear()
+static void background_connections_clear(void)
{
if (background_connections) {
hash_map_clear(background_connections);
return true;
}
-static bool background_connections_pending()
+static bool background_connections_pending(void)
{
bool pending_connections = false;
if (background_connections) {
** BTM_BLE_GENRAL_DISCOVERABLE
**
*******************************************************************************/
-UINT16 BTM_BleReadDiscoverability()
+UINT16 BTM_BleReadDiscoverability(void)
{
BTM_TRACE_API("%s\n", __FUNCTION__);
** Returns BTM_BLE_NON_CONNECTABLE or BTM_BLE_CONNECTABLE
**
*******************************************************************************/
-UINT16 BTM_BleReadConnectability()
+UINT16 BTM_BleReadConnectability(void)
{
BTM_TRACE_API ("%s\n", __FUNCTION__);
** Returns void
**
*******************************************************************************/
-void btm_ble_multi_adv_init()
+void btm_ble_multi_adv_init(void)
{
#if BTM_DYNAMIC_MEMORY == TRUE
btm_multi_adv_cb_ptr = (tBTM_BLE_MULTI_ADV_CB *)osi_malloc(sizeof(tBTM_BLE_MULTI_ADV_CB));
** BTM_BLE_GENRAL_DISCOVERABLE
**
*******************************************************************************/
-UINT16 BTM_BleReadDiscoverability();
+UINT16 BTM_BleReadDiscoverability(void);
/*******************************************************************************
**
**
*******************************************************************************/
//extern
-UINT16 BTM_BleReadConnectability ();
+UINT16 BTM_BleReadConnectability (void);
void BTM_Recovery_Pre_State(void);
**
*******************************************************************************/
//extern
-UINT8 BTM_BleMaxMultiAdvInstanceCount();
+UINT8 BTM_BleMaxMultiAdvInstanceCount(void);
/*******************************************************************************
**
static int ep_initialized = 0;
struct coap_endpoint_t *
- coap_malloc_endpoint() {
+ coap_malloc_endpoint(void) {
static struct coap_endpoint_t ep;
if (ep_initialized) {
return ESP_OK;
}
-esp_err_t esp_console_deinit()
+esp_err_t esp_console_deinit(void)
{
if (!s_tmp_line_buf) {
return ESP_ERR_INVALID_STATE;
}
-esp_err_t esp_console_register_help_command()
+esp_err_t esp_console_register_help_command(void)
{
esp_console_cmd_t command = {
.command = "help",
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if not initialized yet
*/
-esp_err_t esp_console_deinit();
+esp_err_t esp_console_deinit(void);
/**
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE, if esp_console_init wasn't called
*/
-esp_err_t esp_console_register_help_command();
+esp_err_t esp_console_register_help_command(void);
#ifdef __cplusplus
}
/* Use the ESC [6n escape sequence to query the horizontal cursor position
* and return it. On error -1 is returned, on success the position of the
* cursor. */
-static int getCursorPosition() {
+static int getCursorPosition(void) {
char buf[32];
int cols, rows;
unsigned int i = 0;
/* Try to get the number of columns in the current terminal, or assume 80
* if it fails. */
-static int getColumns() {
+static int getColumns(void) {
int start, cols;
/* Get the initial position so we can restore it later. */
return l.len;
}
-int linenoiseProbe() {
+int linenoiseProbe(void) {
/* Switch to non-blocking mode */
int flags = fcntl(STDIN_FILENO, F_GETFL);
flags |= O_NONBLOCK;
/* ================================ History ================================= */
-void linenoiseHistoryFree() {
+void linenoiseHistoryFree(void) {
if (history) {
for (int j = 0; j < history_len; j++) {
free(history[j]);
int linenoiseHistorySetMaxLen(int len);
int linenoiseHistorySave(const char *filename);
int linenoiseHistoryLoad(const char *filename);
-void linenoiseHistoryFree();
+void linenoiseHistoryFree(void);
void linenoiseClearScreen(void);
void linenoiseSetMultiLine(int ml);
void linenoiseSetDumbMode(int set);
extern "C" int __cxa_guard_acquire(__guard* pg);
extern "C" void __cxa_guard_release(__guard* pg);
extern "C" void __cxa_guard_abort(__guard* pg);
-extern "C" void __cxa_guard_dummy();
+extern "C" void __cxa_guard_dummy(void);
/**
* Layout of the guard object (defined by the ABI).
* Dummy function used to force linking this file instead of the same one in libstdc++.
* This works via -u __cxa_guard_dummy flag in component.mk
*/
-extern "C" void __cxa_guard_dummy()
+extern "C" void __cxa_guard_dummy(void)
{
}
* This is an internal API for I2S module to call to enable I2S-ADC function.
* Note that adc_power_off() can still power down ADC.
*/
-void adc_power_always_on();
+void adc_power_always_on(void);
/**
* @brief For I2S dma to claim the usage of ADC1.
* - ESP_OK success
* - ESP_ERR_TIMEOUT reserved for future use. Currently the function will wait until success.
*/
-esp_err_t adc1_i2s_mode_acquire();
+esp_err_t adc1_i2s_mode_acquire(void);
/**
* @brief For ADC1 to claim the usage of ADC1.
* - ESP_OK success
* - ESP_ERR_TIMEOUT reserved for future use. Currently the function will wait until success.
*/
-esp_err_t adc1_adc_mode_acquire();
+esp_err_t adc1_adc_mode_acquire(void);
/**
* @brief to let other tasks use the ADC1 when I2S is not work.
*
* @return always return ESP_OK.
*/
-esp_err_t adc1_lock_release();
+esp_err_t adc1_lock_release(void);
#ifdef __cplusplus
}
/* ------------------- Configuration Register Functions---------------------- */
-static inline esp_err_t can_enter_reset_mode()
+static inline esp_err_t can_enter_reset_mode(void)
{
/* Enter reset mode (required to write to configuration registers). Reset mode
also prevents all CAN activity on the current module and is automatically
return ESP_OK;
}
-static inline esp_err_t can_exit_reset_mode()
+static inline esp_err_t can_exit_reset_mode(void)
{
/* Exiting reset mode will return the CAN module to operating mode. Reset mode
must also be exited in order to trigger BUS-OFF recovery sequence. */
return ESP_OK;
}
-static inline void can_config_pelican()
+static inline void can_config_pelican(void)
{
//Use PeliCAN address layout. Exposes extra registers
CAN.clock_divider_reg.can_mode = 1;
can_set_command(command);
}
-static inline uint32_t can_get_status()
+static inline uint32_t can_get_status(void)
{
return CAN.status_reg.val;
}
-static inline uint32_t can_get_interrupt_reason()
+static inline uint32_t can_get_interrupt_reason(void)
{
return CAN.interrupt_reg.val;
}
-static inline uint32_t can_get_arbitration_lost_capture()
+static inline uint32_t can_get_arbitration_lost_capture(void)
{
return CAN.arbitration_lost_captue_reg.val;
//Todo: ALC read only to re-arm arb lost interrupt. Add function to decode ALC
}
-static inline uint32_t can_get_error_code_capture()
+static inline uint32_t can_get_error_code_capture(void)
{
return CAN.error_code_capture_reg.val;
//Todo: ECC read only to re-arm bus error interrupt. Add function to decode ECC
can_set_command(CMD_RELEASE_RX_BUFF);
}
-static inline uint32_t can_get_rx_message_counter()
+static inline uint32_t can_get_rx_message_counter(void)
{
return CAN.rx_message_counter_reg.val;
}
return ret;
}
-esp_err_t can_driver_uninstall()
+esp_err_t can_driver_uninstall(void)
{
can_obj_t *p_can_obj_dummy;
return ESP_OK;
}
-esp_err_t can_start()
+esp_err_t can_start(void)
{
//Check state
CAN_ENTER_CRITICAL();
return ESP_OK;
}
-esp_err_t can_stop()
+esp_err_t can_stop(void)
{
//Check state
CAN_ENTER_CRITICAL();
return ESP_OK;
}
-esp_err_t can_initiate_recovery()
+esp_err_t can_initiate_recovery(void)
{
CAN_ENTER_CRITICAL();
//Check state
return ESP_OK;
}
-esp_err_t can_clear_transmit_queue()
+esp_err_t can_clear_transmit_queue(void)
{
//Check State
CAN_CHECK(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
return ESP_OK;
}
-esp_err_t can_clear_receive_queue()
+esp_err_t can_clear_receive_queue(void)
{
//Check State
CAN_CHECK(p_can_obj != NULL, ESP_ERR_INVALID_STATE);
return ret;
}
-void gpio_uninstall_isr_service()
+void gpio_uninstall_isr_service(void)
{
if (gpio_isr_func == NULL) {
return;
return ESP_OK;
}
-i2c_cmd_handle_t i2c_cmd_link_create()
+i2c_cmd_handle_t i2c_cmd_link_create(void)
{
#if !CONFIG_SPIRAM_USE_MALLOC
i2c_cmd_desc_t* cmd_desc = (i2c_cmd_desc_t*) calloc(1, sizeof(i2c_cmd_desc_t));
return ESP_OK;
}
-static esp_err_t _i2s_adc_mode_recover()
+static esp_err_t _i2s_adc_mode_recover(void)
{
I2S_CHECK(((_i2s_adc_unit != -1) && (_i2s_adc_channel != -1)), "i2s ADC recover error, not initialized...", ESP_ERR_INVALID_ARG);
return adc_i2s_mode_init(_i2s_adc_unit, _i2s_adc_channel);
/**
* @brief Enable ADC power
*/
-void adc_power_on();
+void adc_power_on(void);
/**
* @brief Power off SAR ADC
* This function will force power down for ADC
*/
-void adc_power_off();
+void adc_power_off(void);
/**
* @brief Initialize ADC pad
* Note that adc1_config_channel_atten, adc1_config_width functions need
* to be called to configure ADC1 channels, before ADC1 is used by the ULP.
*/
-void adc1_ulp_enable();
+void adc1_ulp_enable(void);
/**
* @brief Read Hall Sensor
*
* @return The hall sensor reading.
*/
-int hall_sensor_read();
+int hall_sensor_read(void);
/**
* @brief Get the gpio number of a specific ADC2 channel.
* - ESP_OK success
* - ESP_ERR_TIMEOUT reserved for future use. Currently the function will wait until success.
*/
-esp_err_t adc2_wifi_acquire();
+esp_err_t adc2_wifi_acquire(void);
/**
*
* @return always return ESP_OK.
*/
-esp_err_t adc2_wifi_release();
+esp_err_t adc2_wifi_release(void);
#ifdef __cplusplus
}
* - ESP_OK: Successfully uninstalled CAN driver
* - ESP_ERR_INVALID_STATE: Driver is not in stopped/bus-off state, or is not installed
*/
-esp_err_t can_driver_uninstall();
+esp_err_t can_driver_uninstall(void);
/**
* @brief Start the CAN driver
* - ESP_OK: CAN driver is now running
* - ESP_ERR_INVALID_STATE: Driver is not in stopped state, or is not installed
*/
-esp_err_t can_start();
+esp_err_t can_start(void);
/**
* @brief Stop the CAN driver
* - ESP_OK: CAN driver is now Stopped
* - ESP_ERR_INVALID_STATE: Driver is not in running state, or is not installed
*/
-esp_err_t can_stop();
+esp_err_t can_stop(void);
/**
* @brief Transmit a CAN message
* - ESP_OK: Bus recovery started
* - ESP_ERR_INVALID_STATE: CAN driver is not in the bus-off state, or is not installed
*/
-esp_err_t can_initiate_recovery();
+esp_err_t can_initiate_recovery(void);
/**
* @brief Get current status information of the CAN driver
* - ESP_OK: Transmit queue cleared
* - ESP_ERR_INVALID_STATE: CAN driver is not installed or TX queue is disabled
*/
-esp_err_t can_clear_transmit_queue();
+esp_err_t can_clear_transmit_queue(void);
/**
* @brief Clear the receive queue
* - ESP_OK: Transmit queue cleared
* - ESP_ERR_INVALID_STATE: CAN driver is not installed
*/
-esp_err_t can_clear_receive_queue();
+esp_err_t can_clear_receive_queue(void);
#ifdef __cplusplus
}
/**
* @brief Enable DAC output data from I2S
*/
-esp_err_t dac_i2s_enable();
+esp_err_t dac_i2s_enable(void);
/**
* @brief Disable DAC output data from I2S
*/
-esp_err_t dac_i2s_disable();
+esp_err_t dac_i2s_disable(void);
#ifdef __cplusplus
}
#endif
/**
* @brief Uninstall the driver's GPIO ISR service, freeing related resources.
*/
-void gpio_uninstall_isr_service();
+void gpio_uninstall_isr_service(void);
/**
* @brief Add ISR handler for the corresponding GPIO pin.
*
* @return i2c command link handler
*/
-i2c_cmd_handle_t i2c_cmd_link_create();
+i2c_cmd_handle_t i2c_cmd_link_create(void);
/**
* @brief Free I2C command link
* @brief Uninstall LEDC fade function.
*
*/
-void ledc_fade_func_uninstall();
+void ledc_fade_func_uninstall(void);
/**
* @brief Start LEDC fading.
* Force hold signal is enabled before going into deep sleep for pins which
* are used for EXT1 wakeup.
*/
-void rtc_gpio_force_hold_dis_all();
+void rtc_gpio_force_hold_dis_all(void);
/**
* @brief Set RTC GPIO pad drive capability
/** De-initialize the sdio slave driver to release the resources.
*/
-void sdio_slave_deinit();
+void sdio_slave_deinit(void);
/** Start hardware for sending and receiving, as well as set the IOREADY1 to 1.
*
* - ESP_ERR_INVALID_STATE if already started.
* - ESP_OK otherwise.
*/
-esp_err_t sdio_slave_start();
+esp_err_t sdio_slave_start(void);
/** Stop hardware from sending and receiving, also set IOREADY1 to 0.
*
* @note this will not clear the data already in the driver, and also not reset the PKT_LEN and TOKEN1 counting. Call ``sdio_slave_reset`` to do that.
*/
-void sdio_slave_stop();
+void sdio_slave_stop(void);
/** Clear the data still in the driver, as well as reset the PKT_LEN and TOKEN1 counting.
*
* @return always return ESP_OK.
*/
-esp_err_t sdio_slave_reset();
+esp_err_t sdio_slave_reset(void);
/*---------------------------------------------------------------------------
* Receive
*
* @return the interrupt mask.
*/
-sdio_slave_hostint_t sdio_slave_get_host_intena();
+sdio_slave_hostint_t sdio_slave_get_host_intena(void);
/** Set the interrupt enable for host.
*
* - ESP_ERR_INVALID_STATE if sdmmc_host_init was already called
* - ESP_ERR_NO_MEM if memory can not be allocated
*/
-esp_err_t sdmmc_host_init();
+esp_err_t sdmmc_host_init(void);
/**
* @brief Initialize given slot of SDMMC peripheral
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if sdmmc_host_init function has not been called
*/
-esp_err_t sdmmc_host_deinit();
+esp_err_t sdmmc_host_deinit(void);
/**
* @brief Enable the pull-ups of sd pins.
* - ESP_OK on success
* - other error codes may be returned in future versions
*/
-esp_err_t sdspi_host_init();
+esp_err_t sdspi_host_init(void);
/**
* @brief Initialize SD SPI driver for the specific SPI controller
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if sdspi_host_init function has not been called
*/
-esp_err_t sdspi_host_deinit();
+esp_err_t sdspi_host_deinit(void);
/**
* @brief Enable SDIO interrupt.
*
* @return True when a DMA reset is requested but hasn't completed yet. False otherwise.
*/
-bool spicommon_dmaworkaround_reset_in_progress();
+bool spicommon_dmaworkaround_reset_in_progress(void);
/**
* - ESP_OK Success
* - ESP_FAIL Touch pad init error
*/
-esp_err_t touch_pad_init();
+esp_err_t touch_pad_init(void);
/**
* @brief Un-install touch pad driver.
* - ESP_OK Success
* - ESP_FAIL Touch pad driver not initialized
*/
-esp_err_t touch_pad_deinit();
+esp_err_t touch_pad_deinit(void);
/**
* @brief Configure touch pad interrupt threshold.
* @return
* - ESP_OK on success
*/
-esp_err_t touch_pad_sw_start();
+esp_err_t touch_pad_sw_start(void);
/**
* @brief Set touch sensor interrupt threshold
* @return
* - ESP_OK on success
*/
-esp_err_t touch_pad_clear_status();
+esp_err_t touch_pad_clear_status(void);
/**
* @brief Get the touch sensor status, usually used in ISR to decide which pads are 'touched'.
* @return
* - touch status
*/
-uint32_t touch_pad_get_status();
+uint32_t touch_pad_get_status(void);
/**
* @brief To enable touch pad interrupt
* @return
* - ESP_OK on success
*/
-esp_err_t touch_pad_intr_enable();
+esp_err_t touch_pad_intr_enable(void);
/**
* @brief To disable touch pad interrupt
* @return
* - ESP_OK on success
*/
-esp_err_t touch_pad_intr_disable();
+esp_err_t touch_pad_intr_disable(void);
/**
* @brief set touch pad filter calibration period, in ms.
* - ESP_OK Success
* - ESP_ERR_INVALID_STATE driver state error
*/
-esp_err_t touch_pad_filter_stop();
+esp_err_t touch_pad_filter_stop(void);
/**
* @brief delete touch pad filter driver and release the memory
* - ESP_OK Success
* - ESP_ERR_INVALID_STATE driver state error
*/
-esp_err_t touch_pad_filter_delete();
+esp_err_t touch_pad_filter_delete(void);
/**
* @brief Get the touch pad which caused wakeup from sleep
/**
* @brief Get mutex guarding select() notifications
*/
-portMUX_TYPE *uart_get_selectlock();
+portMUX_TYPE *uart_get_selectlock(void);
#ifdef __cplusplus
}
return ledc_isr_register(ledc_fade_isr, NULL, intr_alloc_flags | ESP_INTR_FLAG_IRAM, &s_ledc_fade_isr_handle);
}
-void ledc_fade_func_uninstall()
+void ledc_fade_func_uninstall(void)
{
if (s_ledc_fade_rec == NULL) {
return;
return ESP_OK;
}
-rmt_data_mode_t rmt_get_data_mode()
+rmt_data_mode_t rmt_get_data_mode(void)
{
return (rmt_data_mode_t) (RMT.apb_conf.fifo_mask);
}
return ESP_OK;
}
-void rtc_gpio_force_hold_dis_all()
+void rtc_gpio_force_hold_dis_all(void)
{
for (int gpio = 0; gpio < GPIO_PIN_COUNT; ++gpio) {
const rtc_gpio_desc_t* desc = &rtc_gpio_desc[gpio];
return ESP_OK;
}
-esp_err_t touch_pad_sw_start()
+esp_err_t touch_pad_sw_start(void)
{
portENTER_CRITICAL(&rtc_spinlock);
SENS.sar_touch_ctrl2.touch_start_en = 0;
return ESP_OK;
}
-uint32_t IRAM_ATTR touch_pad_get_status()
+uint32_t IRAM_ATTR touch_pad_get_status(void)
{
uint32_t status = SENS.sar_touch_ctrl2.touch_meas_en;
return TOUCH_BITS_SWAP(status);
}
-esp_err_t IRAM_ATTR touch_pad_clear_status()
+esp_err_t IRAM_ATTR touch_pad_clear_status(void)
{
portENTER_CRITICAL(&rtc_spinlock);
SENS.sar_touch_ctrl2.touch_meas_en_clr = 1;
return ESP_OK;
}
-esp_err_t touch_pad_intr_enable()
+esp_err_t touch_pad_intr_enable(void)
{
portENTER_CRITICAL(&rtc_spinlock);
RTCCNTL.int_ena.rtc_touch = 1;
return ESP_OK;
}
-esp_err_t touch_pad_intr_disable()
+esp_err_t touch_pad_intr_disable(void)
{
portENTER_CRITICAL(&rtc_spinlock);
RTCCNTL.int_ena.rtc_touch = 0;
return ESP_OK;
}
-esp_err_t touch_pad_init()
+esp_err_t touch_pad_init(void)
{
if (rtc_touch_mux == NULL) {
rtc_touch_mux = xSemaphoreCreateMutex();
return ESP_OK;
}
-esp_err_t touch_pad_deinit()
+esp_err_t touch_pad_deinit(void)
{
RTC_MODULE_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_FAIL);
if (s_touch_pad_filter != NULL) {
return ESP_ERR_NO_MEM;
}
-esp_err_t touch_pad_filter_stop()
+esp_err_t touch_pad_filter_stop(void)
{
RTC_MODULE_CHECK(s_touch_pad_filter != NULL, "Touch pad filter not initialized", ESP_ERR_INVALID_STATE);
RTC_MODULE_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_ERR_INVALID_STATE);
return ret;
}
-esp_err_t touch_pad_filter_delete()
+esp_err_t touch_pad_filter_delete(void)
{
RTC_MODULE_CHECK(s_touch_pad_filter != NULL, "Touch pad filter not initialized", ESP_ERR_INVALID_STATE);
RTC_MODULE_CHECK(rtc_touch_mux != NULL, "Touch pad not initialized", ESP_ERR_INVALID_STATE);
return ESP_OK;
}
-void adc_power_always_on()
+void adc_power_always_on(void)
{
portENTER_CRITICAL(&rtc_spinlock);
SENS.sar_meas_wait2.force_xpd_sar = SENS_FORCE_XPD_SAR_PU;
portEXIT_CRITICAL(&rtc_spinlock);
}
-void adc_power_on()
+void adc_power_on(void)
{
portENTER_CRITICAL(&rtc_spinlock);
//The power FSM controlled mode saves more power, while the ADC noise may get increased.
portEXIT_CRITICAL(&rtc_spinlock);
}
-void adc_power_off()
+void adc_power_off(void)
{
portENTER_CRITICAL(&rtc_spinlock);
//Bit1 0:Fsm 1: SW mode
return ESP_OK;
}
-static inline void adc1_fsm_disable()
+static inline void adc1_fsm_disable(void)
{
//channel is set in the convert function
SENS.sar_meas_wait2.force_xpd_amp = SENS_FORCE_XPD_AMP_PD;
SENS.sar_meas_wait2.sar_amp_wait3 = 1;
}
-esp_err_t adc1_i2s_mode_acquire()
+esp_err_t adc1_i2s_mode_acquire(void)
{
//lazy initialization
//for i2s, block until acquire the lock
return ESP_OK;
}
-esp_err_t adc1_adc_mode_acquire()
+esp_err_t adc1_adc_mode_acquire(void)
{
//lazy initialization
//for adc1, block until acquire the lock
return ESP_OK;
}
-esp_err_t adc1_lock_release()
+esp_err_t adc1_lock_release(void)
{
RTC_MODULE_CHECK((uint32_t*)adc1_i2s_lock != NULL, "adc1 lock release called before acquire", ESP_ERR_INVALID_STATE );
// for now the WiFi would use ADC2 and set xpd_sar force on.
return adc_value;
}
-int adc1_get_voltage(adc1_channel_t channel) //Deprecated. Use adc1_get_raw() instead
+int adc1_get_voltage(adc1_channel_t channel) //Deprecated. Use adc1_get_raw(void) instead
{
return adc1_get_raw(channel);
}
return ESP_OK;
}
-esp_err_t adc2_wifi_acquire()
+esp_err_t adc2_wifi_acquire(void)
{
//lazy initialization
//for wifi, block until acquire the lock
return ESP_OK;
}
-esp_err_t adc2_wifi_release()
+esp_err_t adc2_wifi_release(void)
{
RTC_MODULE_CHECK((uint32_t*)adc2_wifi_lock != NULL, "wifi release called before acquire", ESP_ERR_INVALID_STATE );
return ESP_OK;
}
-esp_err_t dac_i2s_enable()
+esp_err_t dac_i2s_enable(void)
{
portENTER_CRITICAL(&rtc_spinlock);
SET_PERI_REG_MASK(SENS_SAR_DAC_CTRL1_REG, SENS_DAC_DIG_FORCE_M | SENS_DAC_CLK_INV_M);
return ESP_OK;
}
-esp_err_t dac_i2s_disable()
+esp_err_t dac_i2s_disable(void)
{
portENTER_CRITICAL(&rtc_spinlock);
CLEAR_PERI_REG_MASK(SENS_SAR_DAC_CTRL1_REG, SENS_DAC_DIG_FORCE_M | SENS_DAC_CLK_INV_M);
RTCIO.hall_sens.xpd_hall = enable;
}
-static int hall_sensor_get_value() //hall sensor without LNA
+static int hall_sensor_get_value(void) //hall sensor without LNA
{
int Sens_Vp0;
int Sens_Vn0;
return hall_value;
}
-int hall_sensor_read()
+int hall_sensor_read(void)
{
adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_0);
adc_gpio_init(ADC_UNIT_1, ADC1_CHANNEL_3);
REG_WRITE(RTC_CNTL_INT_CLR_REG, status);
}
-static esp_err_t rtc_isr_ensure_installed()
+static esp_err_t rtc_isr_ensure_installed(void)
{
esp_err_t err = ESP_OK;
portENTER_CRITICAL(&s_rtc_isr_handler_list_lock);
static void sdio_intr_send(void*);
static void sdio_intr_recv(void*);
-static esp_err_t send_flush_data();
-static esp_err_t send_reset_counter();
-static void recv_flush_data();
-static void recv_reset_counter();
+static esp_err_t send_flush_data(void);
+static esp_err_t send_reset_counter(void);
+static void recv_flush_data(void);
+static void recv_reset_counter(void);
-static esp_err_t send_start();
-static void send_stop();
-static esp_err_t recv_start();
-static void recv_stop();
+static esp_err_t send_start(void);
+static void send_stop(void);
+static esp_err_t recv_start(void);
+static void recv_stop(void);
-static void deinit_context();
+static void deinit_context(void);
/**************** Ring buffer for SDIO use *****************/
ESP_EARLY_LOGI(TAG, "total: %d", cnt);
}
-static inline void deinit_context()
+static inline void deinit_context(void)
{
context.config = (sdio_slave_config_t){};
for(int i = 0; i < 9; i++) {
return ESP_OK;
}
-static esp_err_t init_ringbuf()
+static esp_err_t init_ringbuf(void)
{
esp_err_t ret = sdio_ringbuf_init(&context.sendbuf, sizeof(buf_desc_t), context.config.send_queue_size);
if (ret != ESP_OK) return ret;
return ESP_OK;
}
-void sdio_slave_deinit()
+void sdio_slave_deinit(void)
{
esp_err_t ret = esp_intr_free(context.intr_handle);
assert(ret==ESP_OK);
deinit_context();
}
-esp_err_t sdio_slave_start()
+esp_err_t sdio_slave_start(void)
{
esp_err_t ret;
HOST.slc0_int_clr.val = UINT32_MAX;//clear all interrupts
return ESP_OK;
}
-esp_err_t sdio_slave_reset()
+esp_err_t sdio_slave_reset(void)
{
send_flush_data();
send_reset_counter();
return ESP_OK;
}
-void sdio_slave_stop()
+void sdio_slave_stop(void)
{
HINF.cfg_data1.sdio_ioready1 = 0; //set IO ready to 1 to stop host from using
send_stop();
return ESP_OK;
}
-sdio_slave_hostint_t sdio_slave_get_host_intena()
+sdio_slave_hostint_t sdio_slave_get_host_intena(void)
{
return HOST.slc0_func1_int_ena.val;
}
SLC.slc0_rx_link.start = 1;
}
-static inline void send_stop_ll_operation()
+static inline void send_stop_ll_operation(void)
{
SLC.slc0_rx_link.stop = 1;
}
-static inline uint32_t send_length_read()
+static inline uint32_t send_length_read(void)
{
return HOST.pkt_len.reg_slc0_len;
}
.eof = 1,
};
-static inline void send_isr_invoker_enable()
+static inline void send_isr_invoker_enable(void)
{
//force trigger rx_done interrupt. the interrupt is abused to invoke ISR from the app by the enable bit and never cleared.
send_start_transmission(&start_desc);
send_stop_ll_operation();
}
-static inline void send_isr_invoker_disable()
+static inline void send_isr_invoker_disable(void)
{
SLC.slc0_int_clr.rx_done = 1;
}
-static inline void send_intr_enable()
+static inline void send_intr_enable(void)
{
SLC.slc0_int_ena.rx_eof = 1;
send_isr_invoker_enable();
}
-static inline void send_intr_disable()
+static inline void send_intr_disable(void)
{
send_isr_invoker_disable();
SLC.slc0_int_ena.rx_eof = 0;
}
-static inline void send_isr_invoke()
+static inline void send_isr_invoke(void)
{
SLC.slc0_int_ena.rx_done = 1;
}
-static inline send_state_t send_get_state()
+static inline send_state_t send_get_state(void)
{
return context.send_state;
}
}
//start hw operation with existing data (if exist)
-static esp_err_t send_start()
+static esp_err_t send_start(void)
{
SDIO_SLAVE_CHECK(send_get_state() == STATE_IDLE,
"already started", ESP_ERR_INVALID_STATE);
}
//only stop hw operations, no touch to data as well as counter
-static void send_stop()
+static void send_stop(void)
{
SLC.slc0_rx_link.stop = 1;
send_intr_disable();
return ESP_OK;
}
-static inline esp_err_t send_isr_new_packet()
+static inline esp_err_t send_isr_new_packet(void)
{
// since eof is changed, we have to stop and reset the link list,
// and restart new link list operation
}
//clear data but keep counter
-static esp_err_t send_flush_data()
+static esp_err_t send_flush_data(void)
{
//only works in idle state / wait to send state
SDIO_SLAVE_CHECK(send_get_state() == STATE_IDLE,
}
//clear counter but keep data
-static esp_err_t send_reset_counter()
+static esp_err_t send_reset_counter(void)
{
SDIO_SLAVE_CHECK(send_get_state() == STATE_IDLE,
"reset counter when transmission started", ESP_ERR_INVALID_STATE);
#define CHECK_HANDLE_IDLE(desc) do { if (desc == NULL || !desc->not_receiving) {\
return ESP_ERR_INVALID_ARG; } } while(0)
-static inline void critical_enter_recv()
+static inline void critical_enter_recv(void)
{
portENTER_CRITICAL(&context.recv_spinlock);
}
-static inline void critical_exit_recv()
+static inline void critical_exit_recv(void)
{
portEXIT_CRITICAL(&context.recv_spinlock);
}
-static inline void recv_size_inc()
+static inline void recv_size_inc(void)
{
// fields wdata and inc_more should be written by the same instruction.
SLC.slc0_token1.val = FIELD_TO_VALUE2(SLC_SLC0_TOKEN1_WDATA, 1) | FIELD_TO_VALUE2(SLC_SLC0_TOKEN1_INC_MORE, 1);
}
-static inline void recv_size_reset()
+static inline void recv_size_reset(void)
{
SLC.slc0_token1.val = FIELD_TO_VALUE2(SLC_SLC0_TOKEN1_WDATA, 0) | FIELD_TO_VALUE2(SLC_SLC0_TOKEN1_WR, 1);
}
-static inline buf_desc_t* recv_get_first_empty_buf()
+static inline buf_desc_t* recv_get_first_empty_buf(void)
{
buf_stailq_t *const queue = &context.recv_link_list;
buf_desc_t *desc = STAILQ_FIRST(queue);
return desc;
}
-static esp_err_t recv_start()
+static esp_err_t recv_start(void)
{
SLC.conf0.slc0_tx_rst = 1;
SLC.conf0.slc0_tx_rst = 0;
return ESP_OK;
}
-static void recv_stop()
+static void recv_stop(void)
{
SLC.slc0_tx_link.stop = 1;
SLC.slc0_int_ena.tx_done = 0;
}
// reset the counter, but keep the data
-static void recv_reset_counter()
+static void recv_reset_counter(void)
{
recv_size_reset();
}
// remove data, still increase the counter
-static void recv_flush_data()
+static void recv_flush_data(void)
{
buf_stailq_t *const queue = &context.recv_link_list;
return desc->buf;
}
-static void __attribute((unused)) sdio_slave_recv_get_loaded_buffer_num()
+static void __attribute((unused)) sdio_slave_recv_get_loaded_buffer_num(void)
{
buf_stailq_t *const queue = &context.recv_link_list;
dump_queue(queue);
static void sdmmc_isr(void* arg);
-static void sdmmc_host_dma_init();
+static void sdmmc_host_dma_init(void);
static const char* TAG = "sdmmc_periph";
size_t s_slot_width[2] = {1,1};
-void sdmmc_host_reset()
+void sdmmc_host_reset(void)
{
// Set reset bits
SDMMC.ctrl.controller_reset = 1;
ets_delay_us(10);
}
-static void sdmmc_host_input_clk_disable()
+static void sdmmc_host_input_clk_disable(void)
{
SDMMC.clock.val = 0;
}
return ESP_OK;
}
-esp_err_t sdmmc_host_init()
+esp_err_t sdmmc_host_init(void)
{
if (s_intr_handle) {
return ESP_ERR_INVALID_STATE;
return ESP_OK;
}
-esp_err_t sdmmc_host_deinit()
+esp_err_t sdmmc_host_deinit(void)
{
if (!s_intr_handle) {
return ESP_ERR_INVALID_STATE;
return ESP_OK;
}
-static void sdmmc_host_dma_init()
+static void sdmmc_host_dma_init(void)
{
SDMMC.ctrl.dma_enable = 1;
SDMMC.bmod.val = 0;
}
-void sdmmc_host_dma_stop()
+void sdmmc_host_dma_stop(void)
{
SDMMC.ctrl.use_internal_dma = 0;
SDMMC.ctrl.dma_reset = 1;
sdmmc_host_dma_resume();
}
-void sdmmc_host_dma_resume()
+void sdmmc_host_dma_resume(void)
{
SDMMC.pldmnd = 1;
}
-bool sdmmc_host_card_busy()
+bool sdmmc_host_card_busy(void)
{
return SDMMC.status.data_busy == 1;
}
uint32_t dma_status; ///< masked DMA interrupt status
} sdmmc_event_t;
-void sdmmc_host_reset();
+void sdmmc_host_reset(void);
esp_err_t sdmmc_host_start_command(int slot, sdmmc_hw_cmd_t cmd, uint32_t arg);
void sdmmc_host_dma_prepare(sdmmc_desc_t* desc, size_t block_size, size_t data_size);
-void sdmmc_host_dma_stop();
+void sdmmc_host_dma_stop(void);
-void sdmmc_host_dma_resume();
+void sdmmc_host_dma_resume(void);
-bool sdmmc_host_card_busy();
+bool sdmmc_host_card_busy(void);
-esp_err_t sdmmc_host_transaction_handler_init();
+esp_err_t sdmmc_host_transaction_handler_init(void);
-void sdmmc_host_transaction_handler_deinit();
+void sdmmc_host_transaction_handler_deinit(void);
static esp_pm_lock_handle_t s_pm_lock;
#endif
-static esp_err_t handle_idle_state_events();
+static esp_err_t handle_idle_state_events(void);
static sdmmc_hw_cmd_t make_hw_cmd(sdmmc_command_t* cmd);
static esp_err_t handle_event(sdmmc_command_t* cmd, sdmmc_req_state_t* state,
sdmmc_event_t* unhandled_events);
sdmmc_req_state_t* pstate, sdmmc_event_t* unhandled_events);
static void process_command_response(uint32_t status, sdmmc_command_t* cmd);
static void fill_dma_descriptors(size_t num_desc);
-static size_t get_free_descriptors_count();
+static size_t get_free_descriptors_count(void);
static bool wait_for_busy_cleared(int timeout_ms);
-esp_err_t sdmmc_host_transaction_handler_init()
+esp_err_t sdmmc_host_transaction_handler_init(void)
{
assert(s_request_mutex == NULL);
s_request_mutex = xSemaphoreCreateMutex();
return ESP_OK;
}
-void sdmmc_host_transaction_handler_deinit()
+void sdmmc_host_transaction_handler_deinit(void)
{
assert(s_request_mutex);
#ifdef CONFIG_PM_ENABLE
return ret;
}
-static size_t get_free_descriptors_count()
+static size_t get_free_descriptors_count(void)
{
const size_t next = s_cur_transfer.next_desc;
size_t count = 0;
}
}
-static esp_err_t handle_idle_state_events()
+static esp_err_t handle_idle_state_events(void)
{
/* Handle any events which have happened in between transfers.
* Under current assumptions (no SDIO support) only card detect events
return spi_bus_add_device((spi_host_device_t) slot, &devcfg, &s_slots[slot].handle);
}
-esp_err_t sdspi_host_init()
+esp_err_t sdspi_host_init(void)
{
return ESP_OK;
}
-esp_err_t sdspi_host_deinit()
+esp_err_t sdspi_host_deinit(void)
{
for (size_t i = 0; i < sizeof(s_slots)/sizeof(s_slots[0]); ++i) {
if (s_slots[i].handle) {
return ret;
}
-bool IRAM_ATTR spicommon_dmaworkaround_reset_in_progress()
+bool IRAM_ATTR spicommon_dmaworkaround_reset_in_progress(void)
{
return (dmaworkaround_waiting_for_chan != 0);
}
printf("\n");
}
-static i2c_config_t i2c_master_init()
+static i2c_config_t i2c_master_init(void)
{
i2c_config_t conf_master = {
.mode = I2C_MODE_MASTER,
return conf_master;
}
-static i2c_config_t i2c_slave_init()
+static i2c_config_t i2c_slave_init(void)
{
i2c_config_t conf_slave = {
.mode = I2C_MODE_SLAVE,
TEST_ASSERT_INT_WITHIN(100, size, esp_get_free_heap_size());
}
-static void i2c_master_write_test()
+static void i2c_master_write_test(void)
{
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
int i;
TEST_ESP_OK(i2c_driver_delete(I2C_MASTER_NUM));
}
-static void i2c_slave_read_test()
+static void i2c_slave_read_test(void)
{
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
int size_rd = 0;
TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
-static void master_read_slave_test()
+static void master_read_slave_test(void)
{
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
memset(data_rd, 0, DATA_LENGTH);
i2c_driver_delete(I2C_MASTER_NUM);
}
-static void slave_write_buffer_test()
+static void slave_write_buffer_test(void)
{
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
int size_rd;
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=UT_T2_I2C][timeout=150]", master_read_slave_test, slave_write_buffer_test);
-static void i2c_master_write_read_test()
+static void i2c_master_write_read_test(void)
{
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
memset(data_rd, 0, DATA_LENGTH);
i2c_driver_delete(I2C_MASTER_NUM);
}
-static void i2c_slave_read_write_test()
+static void i2c_slave_read_write_test(void)
{
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
memset(data_rd, 0, DATA_LENGTH);
TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=UT_T2_I2C][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
-static void i2c_master_repeat_write()
+static void i2c_master_repeat_write(void)
{
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
int times = 3;
i2c_driver_delete(I2C_MASTER_NUM);
}
-static void i2c_slave_repeat_read()
+static void i2c_slave_repeat_read(void)
{
int size_rd = 0;
int times = 3;
/**
* @brief RMT transmitter initialization
*/
-static void tx_init()
+static void tx_init(void)
{
// the sender once it send something, its frq is 38kHz, and the duty cycle is 50%
rmt_tx_config_t tx_cfg = {
/**
* @brief RMT receiver initialization
*/
-static void rx_init()
+static void rx_init(void)
{
rmt_rx_config_t rx_cfg = {
.filter_en = true,
master_free_device_bus(spi);
}
-void test_sio_master()
+void test_sio_master(void)
{
test_sio_master_round(true);
unity_send_signal("master ready");
spi_slave_free(TEST_SLAVE_HOST);
}
-void test_sio_slave()
+void test_sio_slave(void)
{
test_sio_slave_round(true);
unity_wait_for_signal("master ready");
TEST_ASSERT(ret==ESP_OK);
}
-static void slave_init()
+static void slave_init(void)
{
//Configuration for the SPI bus
spi_bus_config_t buscfg={
}
// start all of timer
-static void all_timer_start()
+static void all_timer_start(void)
{
esp_err_t ret;
ret = timer_start(TIMER_GROUP_0, TIMER_0);
TEST_ASSERT(ret == ESP_OK);
}
-static void all_timer_pause()
+static void all_timer_pause(void)
{
esp_err_t ret;
ret = timer_pause(TIMER_GROUP_0, TIMER_0);
return crc;
}
-static void rs485_init()
+static void rs485_init(void)
{
uart_config_t uart_config = {
.baud_rate = UART_BAUD_115200,
}
// Slave test case for multi device
-static void rs485_slave()
+static void rs485_slave(void)
{
rs485_init();
uint8_t* slave_data = (uint8_t*) malloc(BUF_SIZE);
// Master test of multi device test case.
// It forms packet with random data, apply generated CRC16 and sends to slave.
// If response recieved correctly from slave means RS485 channel works.
-static void rs485_master()
+static void rs485_master(void)
{
uint16_t err_count = 0, good_count = 0;
rs485_init();
}
}
-portMUX_TYPE *uart_get_selectlock()
+portMUX_TYPE *uart_get_selectlock(void)
{
return &uart_selectlock;
}
/* @brief Return secure_version from efuse field.
* @return Secure version from efuse field
*/
-uint32_t esp_efuse_read_secure_version();
+uint32_t esp_efuse_read_secure_version(void);
/* @brief Check secure_version from app and secure_version and from efuse field.
*
esp_efuse_flash_size = size;
}
-static uint32_t emulate_secure_version_read()
+static uint32_t emulate_secure_version_read(void)
{
uint32_t secure_version;
uint32_t offset = esp_efuse_flash_offset;
#define EFUSE_BLK_RD_ANTI_ROLLBACK EFUSE_BLK3_RDATA4_REG
#define EFUSE_BLK_WR_ANTI_ROLLBACK EFUSE_BLK3_WDATA4_REG
-uint32_t esp_efuse_read_secure_version()
+uint32_t esp_efuse_read_secure_version(void)
{
#ifdef CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK
uint32_t secure_version;
static uint32_t virt_blocks[COUNT_EFUSE_BLOCKS][COUNT_EFUSE_REG_PER_BLOCK];
/* Call the update function to seed virtual efuses during initialization */
-__attribute__((constructor)) void esp_efuse_utility_update_virt_blocks();
+__attribute__((constructor)) void esp_efuse_utility_update_virt_blocks(void);
#endif
// Erase the virt_blocks array.
-void esp_efuse_utility_erase_virt_blocks()
+void esp_efuse_utility_erase_virt_blocks(void)
{
#ifdef CONFIG_EFUSE_VIRTUAL
memset(virt_blocks, 0, sizeof(virt_blocks));
}
// Fills the virt_blocks array by values from efuse_Rdata.
-void esp_efuse_utility_update_virt_blocks()
+void esp_efuse_utility_update_virt_blocks(void)
{
#ifdef CONFIG_EFUSE_VIRTUAL
ESP_LOGI(TAG, "Loading virtual efuse blocks from real efuses");
}
// Prints efuse values for all registers.
-void esp_efuse_utility_debug_dump_blocks()
+void esp_efuse_utility_debug_dump_blocks(void)
{
printf("EFUSE_BLKx:\n");
#ifdef CONFIG_EFUSE_VIRTUAL
// After esp_efuse_write.. functions EFUSE_BLKx_WDATAx_REG were filled is not coded values.
// This function reads EFUSE_BLKx_WDATAx_REG registers, applies coding scheme and writes encoded values back to EFUSE_BLKx_WDATAx_REG.
-esp_err_t esp_efuse_utility_apply_new_coding_scheme()
+esp_err_t esp_efuse_utility_apply_new_coding_scheme(void)
{
uint8_t buf_w_data[COUNT_EFUSE_REG_PER_BLOCK * 4];
uint8_t buf_r_data[COUNT_EFUSE_REG_PER_BLOCK * 4];
/**
* @brief Fills the virt_blocks array by values from efuse_Rdata.
*/
-void esp_efuse_utility_update_virt_blocks();
+void esp_efuse_utility_update_virt_blocks(void);
/**
* @brief Prints efuse values for all registers.
*/
-void esp_efuse_utility_debug_dump_blocks();
+void esp_efuse_utility_debug_dump_blocks(void);
/**
* @brief Erase the virt_blocks array.
*/
-void esp_efuse_utility_erase_virt_blocks();
+void esp_efuse_utility_erase_virt_blocks(void);
/**
* @brief Apply coding_scheme to write registers.
* - ESP_OK: The operation was successfully completed.
* - ESP_ERR_CODING: Error range of data does not match the coding scheme.
*/
-esp_err_t esp_efuse_utility_apply_new_coding_scheme();
+esp_err_t esp_efuse_utility_apply_new_coding_scheme(void);
#ifdef __cplusplus
}
return ret;
}
-esp_err_t esp_tls_init_global_ca_store()
+esp_err_t esp_tls_init_global_ca_store(void)
{
if (global_cacert == NULL) {
global_cacert = (mbedtls_x509_crt *)calloc(1, sizeof(mbedtls_x509_crt));
return ESP_OK;
}
-mbedtls_x509_crt *esp_tls_get_global_ca_store()
+mbedtls_x509_crt *esp_tls_get_global_ca_store(void)
{
return global_cacert;
}
-void esp_tls_free_global_ca_store()
+void esp_tls_free_global_ca_store(void)
{
if (global_cacert) {
mbedtls_x509_crt_free(global_cacert);
};
#endif /* ! CONFIG_ESP_TLS_SERVER */
-esp_tls_t *esp_tls_init()
+esp_tls_t *esp_tls_init(void)
{
esp_tls_t *tls = (esp_tls_t *)calloc(1, sizeof(esp_tls_t));
if (!tls) {
* @return tls Pointer to esp-tls as esp-tls handle if successfully initialized,
* NULL if allocation error
*/
-esp_tls_t *esp_tls_init();
+esp_tls_t *esp_tls_init(void);
* - ESP_OK if creating global CA store was successful.
* - ESP_ERR_NO_MEM if an error occured when allocating the mbedTLS resources.
*/
-esp_err_t esp_tls_init_global_ca_store();
+esp_err_t esp_tls_init_global_ca_store(void);
/**
* @brief Set the global CA store with the buffer provided in pem format.
* - Pointer to the global CA store currently being used if successful.
* - NULL if there is no global CA store set.
*/
-mbedtls_x509_crt *esp_tls_get_global_ca_store();
+mbedtls_x509_crt *esp_tls_get_global_ca_store(void);
/**
* @brief Free the global CA store currently being used.
* The memory being used by the global CA store to store all the parsed certificates is
* freed up. The application can call this API if it no longer needs the global CA store.
*/
-void esp_tls_free_global_ca_store();
+void esp_tls_free_global_ca_store(void);
/**
* @brief Returns last error in esp_tls with detailed mbedtls related error codes.
#define BROWNOUT_DET_LVL 0
#endif //CONFIG_ESP32_BROWNOUT_DET_LVL
-static void rtc_brownout_isr_handler()
+static void rtc_brownout_isr_handler(void)
{
/* Normally RTC ISR clears the interrupt flag after the application-supplied
* handler returns. Since restart is called here, the flag needs to be
esp_restart_noos();
}
-void esp_brownout_init()
+void esp_brownout_init(void)
{
REG_WRITE(RTC_CNTL_BROWN_OUT_REG,
RTC_CNTL_BROWN_OUT_ENA /* Enable BOD */
#include "soc/dport_reg.h"
#include "sdkconfig.h"
-void esp_cache_err_int_init()
+void esp_cache_err_int_init(void)
{
uint32_t core_id = xPortGetCoreID();
ESP_INTR_DISABLE(ETS_CACHEERR_INUM);
ESP_INTR_ENABLE(ETS_CACHEERR_INUM);
}
-int IRAM_ATTR esp_cache_err_get_cpuid()
+int IRAM_ATTR esp_cache_err_get_cpuid(void)
{
esp_dport_access_int_pause();
const uint32_t pro_mask =
esp_clk_slowclk_cal_set(cal_val);
}
-void rtc_clk_select_rtc_slow_clk()
+void rtc_clk_select_rtc_slow_clk(void)
{
select_rtc_slow_clk(RTC_SLOW_FREQ_32K_XTAL);
}
void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default"))) __attribute__((noreturn));
void start_cpu0_default(void) IRAM_ATTR __attribute__((noreturn));
#if !CONFIG_FREERTOS_UNICORE
-static void IRAM_ATTR call_start_cpu1() __attribute__((noreturn));
+static void IRAM_ATTR call_start_cpu1(void) __attribute__((noreturn));
void start_cpu1(void) __attribute__((weak, alias("start_cpu1_default"))) __attribute__((noreturn));
void start_cpu1_default(void) IRAM_ATTR __attribute__((noreturn));
static bool app_cpu_started = false;
* and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
*/
-void IRAM_ATTR call_start_cpu0()
+void IRAM_ATTR call_start_cpu0(void)
{
#if CONFIG_FREERTOS_UNICORE
RESET_REASON rst_reas[1];
DPORT_REG_CLR_BIT(DPORT_APP_CPU_RECORD_CTRL_REG, DPORT_APP_CPU_RECORD_ENABLE);
}
-void IRAM_ATTR call_start_cpu1()
+void IRAM_ATTR call_start_cpu1(void)
{
asm volatile (\
"wsr %0, vecbase\n" \
#endif //!CONFIG_FREERTOS_UNICORE
#ifdef CONFIG_COMPILER_CXX_EXCEPTIONS
-size_t __cxx_eh_arena_size_get()
+size_t __cxx_eh_arena_size_get(void)
{
return CONFIG_COMPILER_CXX_EXCEPTIONS_EMG_POOL_SIZE;
}
ToDo: There is a small chance the CPU already has yielded when this ISR is serviced. In that case, it's running the intended task but
the ISR will cause it to switch _away_ from it. portYIELD_FROM_ISR will probably just schedule the task again, but have to check that.
*/
-static inline void IRAM_ATTR esp_crosscore_isr_handle_yield()
+static inline void IRAM_ATTR esp_crosscore_isr_handle_yield(void)
{
portYIELD_FROM_ISR();
}
//Initialize the crosscore interrupt on this core. Call this once
//on each active core.
-void esp_crosscore_int_init() {
+void esp_crosscore_int_init(void) {
portENTER_CRITICAL(&reason_spinlock);
reason[xPortGetCoreID()]=0;
portEXIT_CRITICAL(&reason_spinlock);
/* Selects an external clock source (32 kHz) for RTC.
* Only internal use in unit test.
*/
-void rtc_clk_select_rtc_slow_clk();
+void rtc_clk_select_rtc_slow_clk(void);
assert(r == 0);
}
-size_t esp_himem_get_phys_size()
+size_t esp_himem_get_phys_size(void)
{
int paddr_start = (4096 * 1024) - (CACHE_BLOCKSIZE * SPIRAM_BANKSWITCH_RESERVE);
return esp_spiram_get_size()-paddr_start;
}
-size_t esp_himem_get_free_size()
+size_t esp_himem_get_free_size(void)
{
size_t ret=0;
for (int i = 0; i < s_ramblockcnt; i++) {
return ret;
}
-size_t esp_himem_reserved_area_size() {
+size_t esp_himem_reserved_area_size(void) {
return CACHE_BLOCKSIZE * SPIRAM_BANKSWITCH_RESERVE;
}
-void __attribute__((constructor)) esp_himem_init()
+void __attribute__((constructor)) esp_himem_init(void)
{
if (SPIRAM_BANKSWITCH_RESERVE == 0) return;
int maxram=esp_spiram_get_size();
#define TIMER_IS_AFTER_OVERFLOW(a) (ALARM_OVERFLOW_VAL < (a) && (a) <= FRC_TIMER_LOAD_VALUE(1))
// Check if timer overflow has happened (but was not handled by ISR yet)
-static inline bool IRAM_ATTR timer_overflow_happened()
+static inline bool IRAM_ATTR timer_overflow_happened(void)
{
if (s_overflow_happened) {
return true;
REG_WRITE(FRC_TIMER_LOAD_REG(1), REG_READ(FRC_TIMER_COUNT_REG(1)) - ALARM_OVERFLOW_VAL);
}
-void esp_timer_impl_lock()
+void esp_timer_impl_lock(void)
{
portENTER_CRITICAL(&s_time_update_lock);
}
-void esp_timer_impl_unlock()
+void esp_timer_impl_unlock(void)
{
portEXIT_CRITICAL(&s_time_update_lock);
}
-uint64_t IRAM_ATTR esp_timer_impl_get_time()
+uint64_t IRAM_ATTR esp_timer_impl_get_time(void)
{
uint32_t timer_val;
uint64_t time_base;
return ESP_OK;
}
-void esp_timer_impl_deinit()
+void esp_timer_impl_deinit(void)
{
esp_intr_disable(s_timer_interrupt_handle);
// FIXME: This value is safe for 80MHz APB frequency.
// Should be modified to depend on clock frequency.
-uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us()
+uint64_t IRAM_ATTR esp_timer_impl_get_min_period_us(void)
{
return 50;
}
#ifdef ESP_TIMER_DYNAMIC_OVERFLOW_VAL
-uint32_t esp_timer_impl_get_overflow_val()
+uint32_t esp_timer_impl_get_overflow_val(void)
{
return s_alarm_overflow_val;
}
#ifndef __ESP_BROWNOUT_H
#define __ESP_BROWNOUT_H
-void esp_brownout_init();
+void esp_brownout_init(void);
#endif
\ No newline at end of file
* to interrupt input number ETS_CACHEERR_INUM (see soc/soc.h). It is called
* from the startup code.
*/
-void esp_cache_err_int_init();
+void esp_cache_err_int_init(void);
/**
* - APP_CPU_NUM, if APP_CPU has caused cache IA interrupt
* - (-1) otherwise
*/
-int esp_cache_err_get_cpuid();
+int esp_cache_err_get_cpuid(void);
*
* @return the calibration value obtained using rtc_clk_cal, at startup time
*/
-uint32_t esp_clk_slowclk_cal_get();
+uint32_t esp_clk_slowclk_cal_get(void);
/**
* @brief Update the calibration value of RTC slow clock
*
* @return Value or RTC counter, expressed in microseconds
*/
-uint64_t esp_clk_rtc_time();
+uint64_t esp_clk_rtc_time(void);
*
* @returns Amount of memory, in bytes
*/
-size_t esp_himem_get_phys_size();
+size_t esp_himem_get_phys_size(void);
/**
* @brief Get free amount of memory under control of himem API
*
* @returns Amount of free memory, in bytes
*/
-size_t esp_himem_get_free_size();
+size_t esp_himem_get_free_size(void);
/**
*
* @returns Amount of reserved area, in bytes
*/
-size_t esp_himem_reserved_area_size();
+size_t esp_himem_reserved_area_size(void);
#ifdef __cplusplus
* - ESP_SPIRAM_SIZE_INVALID if SPI RAM not enabled or not valid
* - SPI RAM size
*/
-esp_spiram_size_t esp_spiram_get_chip_size();
+esp_spiram_size_t esp_spiram_get_chip_size(void);
/**
* @brief Initialize spiram interface/hardware. Normally called from cpu_start.c.
*
* @return ESP_OK on success
*/
-esp_err_t esp_spiram_init();
+esp_err_t esp_spiram_init(void);
/**
* @brief Configure Cache/MMU for access to external SPI RAM.
*
* @attention this function must be called with flash cache disabled.
*/
-void esp_spiram_init_cache();
+void esp_spiram_init_cache(void);
/**
*
* @return true on success, false on failed memory test
*/
-bool esp_spiram_test();
+bool esp_spiram_test(void);
/**
* @brief Add the initialized SPI RAM to the heap allocator.
*/
-esp_err_t esp_spiram_add_to_heapalloc();
+esp_err_t esp_spiram_add_to_heapalloc(void);
/**
*
* @return Size in bytes, or 0 if no external RAM chip support compiled in.
*/
-size_t esp_spiram_get_size();
+size_t esp_spiram_get_size(void);
/**
*
* This is meant for use from within the SPI flash code.
*/
-void esp_spiram_writeback_cache();
+void esp_spiram_writeback_cache(void);
/**
* @brief Disable interrupts that aren't specifically marked as running from IRAM
*/
-void esp_intr_noniram_disable();
+void esp_intr_noniram_disable(void);
/**
* @brief Re-enable interrupts disabled by esp_intr_noniram_disable
*/
-void esp_intr_noniram_enable();
+void esp_intr_noniram_enable(void);
/**@}*/
* - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
* - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled or if wakeup triggers conflict
*/
-esp_err_t esp_sleep_enable_ulp_wakeup();
+esp_err_t esp_sleep_enable_ulp_wakeup(void);
/**
* @brief Enable wakeup by timer
* - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled.
* - ESP_ERR_INVALID_STATE if wakeup triggers conflict
*/
-esp_err_t esp_sleep_enable_touchpad_wakeup();
+esp_err_t esp_sleep_enable_touchpad_wakeup(void);
/**
* @brief Get the touch pad which caused wakeup
*
* @return touch pad which caused wakeup
*/
-touch_pad_t esp_sleep_get_touchpad_wakeup_status();
+touch_pad_t esp_sleep_get_touchpad_wakeup_status(void);
/**
* @brief Enable wakeup using a pin
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if wakeup triggers conflict
*/
-esp_err_t esp_sleep_enable_gpio_wakeup();
+esp_err_t esp_sleep_enable_gpio_wakeup(void);
/**
* @brief Enable wakeup from light sleep using UART
*
* @return bit mask, if GPIOn caused wakeup, BIT(n) will be set
*/
-uint64_t esp_sleep_get_ext1_wakeup_status();
+uint64_t esp_sleep_get_ext1_wakeup_status(void);
/**
* @brief Set power down mode for an RTC power domain in sleep mode
*
* This function does not return.
*/
-void esp_deep_sleep_start() __attribute__((noreturn));
+void esp_deep_sleep_start(void) __attribute__((noreturn));
/**
* @brief Enter light sleep with the configured wakeup options
* - ESP_OK on success (returned after wakeup)
* - ESP_ERR_INVALID_STATE if WiFi or BT is not stopped
*/
-esp_err_t esp_light_sleep_start();
+esp_err_t esp_light_sleep_start(void);
/**
* @brief Enter deep-sleep mode
*
* @return cause of wake up from last sleep (deep sleep or light sleep)
*/
-esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause();
+esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause(void);
/**
#endif
-void esp_int_wdt_init() {
+void esp_int_wdt_init(void) {
periph_module_enable(PERIPH_TIMG1_MODULE);
TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
TIMERG1.wdt_config0.sys_reset_length=7; //3.2uS
timer_group_intr_enable(TIMER_GROUP_1, TIMG_WDT_INT_ENA_M);
}
-void esp_int_wdt_cpu_init()
+void esp_int_wdt_cpu_init(void)
{
esp_register_freertos_tick_hook_for_cpu(tick_hook, xPortGetCoreID());
ESP_INTR_DISABLE(WDT_INT_NUM);
}
-void IRAM_ATTR esp_intr_noniram_disable()
+void IRAM_ATTR esp_intr_noniram_disable(void)
{
int oldint;
int cpu=xPortGetCoreID();
non_iram_int_disabled[cpu]=oldint&non_iram_int_mask[cpu];
}
-void IRAM_ATTR esp_intr_noniram_enable()
+void IRAM_ATTR esp_intr_noniram_enable(void)
{
int cpu=xPortGetCoreID();
int intmask=non_iram_int_disabled[cpu];
static bool abort_called;
-static __attribute__((noreturn)) inline void invoke_abort()
+static __attribute__((noreturn)) inline void invoke_abort(void)
{
abort_called = true;
#if CONFIG_ESP32_APPTRACE_ENABLE
}
}
-void abort()
+void abort(void)
{
#if !CONFIG_ESP32_PANIC_SILENT_REBOOT
ets_printf("abort() was called at PC 0x%08x on core %d\r\n", (intptr_t)__builtin_return_address(0) - 3, xPortGetCoreID());
#define NUM_EDESCS (sizeof(edesc) / sizeof(char *))
static void commonErrorHandler(XtExcFrame *frame);
-static inline void disableAllWdts();
+static inline void disableAllWdts(void);
static void illegal_instruction_helper(XtExcFrame *frame);
//The fact that we've panic'ed probably means the other CPU is now running wild, possibly
//messing up the serial output, so we stall it here.
-static void haltOtherCore()
+static void haltOtherCore(void)
{
esp_cpu_stall( xPortGetCoreID() == 0 ? 1 : 0 );
}
all watchdogs except the timer group 0 watchdog, and it reconfigures that to reset the chip after
one second.
*/
-static void reconfigureAllWdts()
+static void reconfigureAllWdts(void)
{
TIMERG0.wdt_wprotect = TIMG_WDT_WKEY_VALUE;
TIMERG0.wdt_feed = 1;
/*
This disables all the watchdogs for when we call the gdbstub.
*/
-static inline void disableAllWdts()
+static inline void disableAllWdts(void)
{
TIMERG0.wdt_wprotect = TIMG_WDT_WKEY_VALUE;
TIMERG0.wdt_config0.en = 0;
TIMERG1.wdt_wprotect = 0;
}
-static void esp_panic_dig_reset() __attribute__((noreturn));
+static void esp_panic_dig_reset(void) __attribute__((noreturn));
-static void esp_panic_dig_reset()
+static void esp_panic_dig_reset(void)
{
// make sure all the panic handler output is sent from UART FIFO
uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
static const char* TAG = "pm_esp32";
-static void update_ccompare();
+static void update_ccompare(void);
static void do_switch(pm_mode_t new_mode);
-static void leave_idle();
+static void leave_idle(void);
static void on_freq_update(uint32_t old_ticks_per_us, uint32_t ticks_per_us);
return ESP_OK;
}
-static pm_mode_t IRAM_ATTR get_lowest_allowed_mode()
+static pm_mode_t IRAM_ATTR get_lowest_allowed_mode(void)
{
/* TODO: optimize using ffs/clz */
if (s_mode_mask >= BIT(PM_MODE_CPU_MAX)) {
* would happen without the frequency change.
* Assumes that the new_frequency = old_frequency * s_ccount_mul / s_ccount_div.
*/
-static void IRAM_ATTR update_ccompare()
+static void IRAM_ATTR update_ccompare(void)
{
uint32_t ccount = XTHAL_GET_CCOUNT();
uint32_t ccompare = XTHAL_GET_CCOMPARE(XT_TIMER_INDEX);
}
}
-static void IRAM_ATTR leave_idle()
+static void IRAM_ATTR leave_idle(void)
{
int core_id = xPortGetCoreID();
if (s_core_idle[core_id]) {
}
}
-void esp_pm_impl_idle_hook()
+void esp_pm_impl_idle_hook(void)
{
int core_id = xPortGetCoreID();
uint32_t state = portENTER_CRITICAL_NESTED();
ESP_PM_TRACE_ENTER(IDLE, core_id);
}
-void IRAM_ATTR esp_pm_impl_isr_hook()
+void IRAM_ATTR esp_pm_impl_isr_hook(void)
{
int core_id = xPortGetCoreID();
ESP_PM_TRACE_ENTER(ISR_HOOK, core_id);
ESP_PM_TRACE_EXIT(ISR_HOOK, core_id);
}
-void esp_pm_impl_waiti()
+void esp_pm_impl_waiti(void)
{
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
int core_id = xPortGetCoreID();
}
#endif // WITH_PROFILING
-void esp_pm_impl_init()
+void esp_pm_impl_init(void)
{
#ifdef CONFIG_PM_TRACE
esp_pm_trace_init();
BIT(27), BIT(27), // ESP_PM_TRACE_SLEEP
};
-void esp_pm_trace_init()
+void esp_pm_trace_init(void)
{
for (size_t i = 0; i < sizeof(s_trace_io)/sizeof(s_trace_io[0]); ++i) {
int io = __builtin_ffs(s_trace_io[i]);
#include "esp_private/system_internal.h"
#include "soc/rtc_periph.h"
-static void esp_reset_reason_clear_hint();
+static void esp_reset_reason_clear_hint(void);
static esp_reset_reason_t s_reset_reason;
}
return (esp_reset_reason_t) low;
}
-static void esp_reset_reason_clear_hint()
+static void esp_reset_reason_clear_hint(void)
{
REG_WRITE(RTC_RESET_CAUSE_REG, 0);
}
static const char* TAG = "sleep";
-static uint32_t get_power_down_flags();
-static void ext0_wakeup_prepare();
-static void ext1_wakeup_prepare();
-static void timer_wakeup_prepare();
+static uint32_t get_power_down_flags(void);
+static void ext0_wakeup_prepare(void);
+static void ext1_wakeup_prepare(void);
+static void timer_wakeup_prepare(void);
/* Wake from deep sleep stub
See esp_deepsleep.h esp_wake_deep_sleep() comments for details.
esp_deep_sleep_start();
}
-static void IRAM_ATTR flush_uarts()
+static void IRAM_ATTR flush_uarts(void)
{
for (int i = 0; i < 3; ++i) {
uart_tx_wait_idle(i);
}
}
-static void IRAM_ATTR suspend_uarts()
+static void IRAM_ATTR suspend_uarts(void)
{
for (int i = 0; i < 3; ++i) {
REG_SET_BIT(UART_FLOW_CONF_REG(i), UART_FORCE_XOFF);
}
}
-static void IRAM_ATTR resume_uarts()
+static void IRAM_ATTR resume_uarts(void)
{
for (int i = 0; i < 3; ++i) {
REG_CLR_BIT(UART_FLOW_CONF_REG(i), UART_FORCE_XOFF);
return result;
}
-void IRAM_ATTR esp_deep_sleep_start()
+void IRAM_ATTR esp_deep_sleep_start(void)
{
// record current RTC time
s_config.rtc_ticks_at_sleep_start = rtc_time_get();
return err;
}
-esp_err_t esp_light_sleep_start()
+esp_err_t esp_light_sleep_start(void)
{
static portMUX_TYPE light_sleep_lock = portMUX_INITIALIZER_UNLOCKED;
portENTER_CRITICAL(&light_sleep_lock);
return ESP_OK;
}
-esp_err_t esp_sleep_enable_ulp_wakeup()
+esp_err_t esp_sleep_enable_ulp_wakeup(void)
{
#ifdef CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT
return ESP_ERR_NOT_SUPPORTED;
return ESP_OK;
}
-static void timer_wakeup_prepare()
+static void timer_wakeup_prepare(void)
{
uint32_t period = esp_clk_slowclk_cal_get();
int64_t sleep_duration = (int64_t) s_config.sleep_duration - (int64_t) s_config.sleep_time_adjustment;
rtc_sleep_set_wakeup_time(s_config.rtc_ticks_at_sleep_start + rtc_count_delta);
}
-esp_err_t esp_sleep_enable_touchpad_wakeup()
+esp_err_t esp_sleep_enable_touchpad_wakeup(void)
{
#ifdef CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT
return ESP_ERR_NOT_SUPPORTED;
return ESP_OK;
}
-touch_pad_t esp_sleep_get_touchpad_wakeup_status()
+touch_pad_t esp_sleep_get_touchpad_wakeup_status(void)
{
if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_TOUCHPAD) {
return TOUCH_PAD_MAX;
return ESP_OK;
}
-static void ext0_wakeup_prepare()
+static void ext0_wakeup_prepare(void)
{
int rtc_gpio_num = s_config.ext0_rtc_gpio_num;
// Set GPIO to be used for wakeup
return ESP_OK;
}
-static void ext1_wakeup_prepare()
+static void ext1_wakeup_prepare(void)
{
// Configure all RTC IOs selected as ext1 wakeup inputs
uint32_t rtc_gpio_mask = s_config.ext1_rtc_gpio_mask;
s_config.ext1_trigger_mode, RTC_CNTL_EXT_WAKEUP1_LV_S);
}
-uint64_t esp_sleep_get_ext1_wakeup_status()
+uint64_t esp_sleep_get_ext1_wakeup_status(void)
{
if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_EXT1) {
return 0;
return gpio_mask;
}
-esp_err_t esp_sleep_enable_gpio_wakeup()
+esp_err_t esp_sleep_enable_gpio_wakeup(void)
{
if (s_config.wakeup_triggers & (RTC_TOUCH_TRIG_EN | RTC_ULP_TRIG_EN)) {
ESP_LOGE(TAG, "Conflicting wake-up triggers: touch / ULP");
return ESP_OK;
}
-esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause()
+esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause(void)
{
if (rtc_get_reset_reason(0) != DEEPSLEEP_RESET && !s_light_sleep_wakeup) {
return ESP_SLEEP_WAKEUP_UNDEFINED;
return ESP_OK;
}
-static uint32_t get_power_down_flags()
+static uint32_t get_power_down_flags(void)
{
// Where needed, convert AUTO options to ON. Later interpret AUTO as OFF.
//If no function in esp_himem.c is used, this function will be linked into the
//binary instead of the one in esp_himem.c, automatically making sure no memory
//is reserved if no himem function is used.
-size_t __attribute__((weak)) esp_himem_reserved_area_size() {
+size_t __attribute__((weak)) esp_himem_reserved_area_size(void) {
return 0;
}
-static int spiram_size_usable_for_malloc()
+static int spiram_size_usable_for_malloc(void)
{
int s=esp_spiram_get_size();
if (s>4*1024*1024) s=4*1024*1024; //we can map at most 4MiB
true when RAM seems OK, false when test fails. WARNING: Do not run this before the 2nd cpu has been
initialized (in a two-core system) or after the heap allocator has taken ownership of the memory.
*/
-bool esp_spiram_test()
+bool esp_spiram_test(void)
{
volatile int *spiram=(volatile int*)SOC_EXTRAM_DATA_LOW;
size_t p;
}
}
-void IRAM_ATTR esp_spiram_init_cache()
+void IRAM_ATTR esp_spiram_init_cache(void)
{
//Enable external RAM in MMU
cache_sram_mmu_set( 0, 0, SOC_EXTRAM_DATA_LOW, 0, 32, 128 );
#endif
}
-esp_spiram_size_t esp_spiram_get_chip_size()
+esp_spiram_size_t esp_spiram_get_chip_size(void)
{
if (!spiram_inited) {
ESP_EARLY_LOGE(TAG, "SPI RAM not initialized");
}
}
-esp_err_t esp_spiram_init()
+esp_err_t esp_spiram_init(void)
{
esp_err_t r;
r = psram_enable(PSRAM_SPEED, PSRAM_MODE);
}
-esp_err_t esp_spiram_add_to_heapalloc()
+esp_err_t esp_spiram_add_to_heapalloc(void)
{
//Add entire external RAM region to heap allocator. Heap allocator knows the capabilities of this type of memory, so there's
//no need to explicitly specify them.
return ESP_OK;
}
-size_t esp_spiram_get_size()
+size_t esp_spiram_get_size(void)
{
psram_size_t size=esp_spiram_get_chip_size();
if (size==PSRAM_SIZE_16MBITS) return 2*1024*1024;
Note that this routine assumes some unique mapping for the first 2 banks of the PSRAM memory range, as well as the
2 banks after the 2 MiB mark.
*/
-void IRAM_ATTR esp_spiram_writeback_cache()
+void IRAM_ATTR esp_spiram_writeback_cache(void)
{
int x;
volatile int i=0;
* @return true SPI RAM has been initialized successfully
* @return false SPI RAM hasn't been initialized or initialized failed
*/
-bool esp_spiram_is_initialized()
+bool esp_spiram_is_initialized(void)
{
return spiram_inited;
}
}
}
-psram_size_t psram_get_size()
+psram_size_t psram_get_size(void)
{
if ((PSRAM_SIZE_ID(s_psram_id) == PSRAM_EID_SIZE_64MBITS) || PSRAM_IS_64MBIT_TRIAL(s_psram_id)) {
return PSRAM_SIZE_64MBITS;
* - PSRAM_SIZE_MAX if psram not enabled or not valid
* - PSRAM size
*/
-psram_size_t psram_get_size();
+psram_size_t psram_get_size(void);
/**
* @brief psram cache enable function
#define SHUTDOWN_HANDLERS_NO 2
static shutdown_handler_t shutdown_handlers[SHUTDOWN_HANDLERS_NO];
-void system_init()
+void system_init(void)
{
}
return ESP_ERR_INVALID_STATE;
}
-void esp_restart_noos() __attribute__ ((noreturn));
+void esp_restart_noos(void) __attribute__ ((noreturn));
void IRAM_ATTR esp_restart(void)
{
* core are already stopped. Stalls other core, resets hardware,
* triggers restart.
*/
-void IRAM_ATTR esp_restart_noos()
+void IRAM_ATTR esp_restart_noos(void)
{
// Disable interrupts
xt_ints_off(0xFFFFFFFF);
* Resets the hardware timer and has_reset flags of each task on the list.
* Called within critical
*/
-static void reset_hw_timer()
+static void reset_hw_timer(void)
{
//All tasks have reset; time to reset the hardware timer.
TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
return ESP_OK;
}
-esp_err_t esp_task_wdt_deinit()
+esp_err_t esp_task_wdt_deinit(void)
{
portENTER_CRITICAL(&twdt_spinlock);
//TWDT must already be initialized
return ESP_OK;
}
-esp_err_t esp_task_wdt_reset()
+esp_err_t esp_task_wdt_reset(void)
{
portENTER_CRITICAL(&twdt_spinlock);
//TWDT must already be initialized
return ESP_ERR_NOT_FOUND;
}
-void esp_task_wdt_feed()
+void esp_task_wdt_feed(void)
{
portENTER_CRITICAL(&twdt_spinlock);
//Return immediately if TWDT has not been initialized
static const char TAG[] = "test_psram";
#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
-static void test_psram_content()
+static void test_psram_content(void)
{
const int test_size = 2048;
uint32_t *test_area = heap_caps_malloc(test_size, MALLOC_CAP_SPIRAM);
the point where they happened to do what I want.
*/
-static void lcdIfaceInit()
+static void lcdIfaceInit(void)
{
DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_I2S0_CLK_EN);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_I2S0_RST);
static volatile lldesc_t dmaDesc[2];
-static void finishDma()
+static void finishDma(void)
{
//No need to finish if no DMA transfer going on
if (!(READ_PERI_REG(I2S_FIFO_CONF_REG(0))&I2S_DSCR_EN)) {
#define WITH_PROFILING 1
#endif
-extern uint32_t esp_timer_impl_get_overflow_val();
+extern uint32_t esp_timer_impl_get_overflow_val(void);
extern void esp_timer_impl_set_overflow_val(uint32_t overflow_val);
static uint32_t s_old_overflow_val;
-static void setup_overflow()
+static void setup_overflow(void)
{
s_old_overflow_val = esp_timer_impl_get_overflow_val();
/* Overflow every 0.1 sec.
esp_timer_impl_set_overflow_val(8000000);
}
-static void teardown_overflow()
+static void teardown_overflow(void)
{
esp_timer_impl_set_overflow_val(s_old_overflow_val);
}
TEST_PERFORMANCE_LESS_THAN(ESP_TIMER_GET_TIME_PER_CALL, "%dns", ns_per_call);
}
-static int64_t IRAM_ATTR __attribute__((noinline)) get_clock_diff()
+static int64_t IRAM_ATTR __attribute__((noinline)) get_clock_diff(void)
{
uint64_t hs_time = esp_timer_get_time();
uint64_t ref_time = ref_clock_get();
int_timer_ctr++;
}
-void local_timer_test()
+void local_timer_test(void)
{
intr_handle_t ih;
esp_err_t r;
#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
-static void light_sleep_enable()
+static void light_sleep_enable(void)
{
const esp_pm_config_esp32_t pm_config = {
.max_cpu_freq = rtc_clk_cpu_freq_get(),
ESP_ERROR_CHECK( esp_pm_configure(&pm_config) );
}
-static void light_sleep_disable()
+static void light_sleep_disable(void)
{
const esp_pm_config_esp32_t pm_config = {
.max_cpu_freq = rtc_clk_cpu_freq_get(),
static RTC_SLOW_ATTR uint32_t s_rtc_force_slow_val;
-static void setup_values()
+static void setup_values(void)
{
s_noinit_val = CHECK_VALUE;
s_rtc_noinit_val = CHECK_VALUE;
TEST_ASSERT_EQUAL(ESP_RST_POWERON, esp_reset_reason());
}
-static void do_deep_sleep()
+static void do_deep_sleep(void)
{
setup_values();
esp_sleep_enable_timer_wakeup(10000);
esp_deep_sleep_start();
}
-static void check_reset_reason_deep_sleep()
+static void check_reset_reason_deep_sleep(void)
{
TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
do_deep_sleep,
check_reset_reason_deep_sleep);
-static void do_exception()
+static void do_exception(void)
{
setup_values();
*(int*) (0x40000001) = 0;
}
-static void do_abort()
+static void do_abort(void)
{
setup_values();
abort();
}
-static void check_reset_reason_panic()
+static void check_reset_reason_panic(void)
{
TEST_ASSERT_EQUAL(ESP_RST_PANIC, esp_reset_reason());
do_abort,
check_reset_reason_panic);
-static void do_restart()
+static void do_restart(void)
{
setup_values();
esp_restart();
}
#if portNUM_PROCESSORS > 1
-static void do_restart_from_app_cpu()
+static void do_restart_from_app_cpu(void)
{
setup_values();
xTaskCreatePinnedToCore((TaskFunction_t) &do_restart, "restart", 2048, NULL, 5, NULL, 1);
}
#endif
-static void check_reset_reason_sw()
+static void check_reset_reason_sw(void)
{
TEST_ASSERT_EQUAL(ESP_RST_SW, esp_reset_reason());
#endif
-static void do_int_wdt()
+static void do_int_wdt(void)
{
setup_values();
portENTER_CRITICAL_NESTED();
while(1);
}
-static void do_int_wdt_hw()
+static void do_int_wdt_hw(void)
{
setup_values();
XTOS_SET_INTLEVEL(XCHAL_NMILEVEL);
while(1);
}
-static void check_reset_reason_int_wdt()
+static void check_reset_reason_int_wdt(void)
{
TEST_ASSERT_EQUAL(ESP_RST_INT_WDT, esp_reset_reason());
TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
do_int_wdt_hw,
check_reset_reason_int_wdt);
-static void do_task_wdt()
+static void do_task_wdt(void)
{
setup_values();
esp_task_wdt_init(1, true);
while(1);
}
-static void check_reset_reason_task_wdt()
+static void check_reset_reason_task_wdt(void)
{
TEST_ASSERT_EQUAL(ESP_RST_TASK_WDT, esp_reset_reason());
do_task_wdt,
check_reset_reason_task_wdt);
-static void do_rtc_wdt()
+static void do_rtc_wdt(void)
{
setup_values();
WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
while(1);
}
-static void check_reset_reason_any_wdt()
+static void check_reset_reason_any_wdt(void)
{
TEST_ASSERT_EQUAL(ESP_RST_WDT, esp_reset_reason());
TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
check_reset_reason_any_wdt);
-static void do_brownout()
+static void do_brownout(void)
{
setup_values();
printf("Manual test: lower the supply voltage to cause brownout\n");
vTaskSuspend(NULL);
}
-static void check_reset_reason_brownout()
+static void check_reset_reason_brownout(void)
{
TEST_ASSERT_EQUAL(ESP_RST_BROWNOUT, esp_reset_reason());
esp_deep_sleep_start();
}
-static void do_deep_sleep_from_app_cpu()
+static void do_deep_sleep_from_app_cpu(void)
{
xTaskCreatePinnedToCore(&deep_sleep_task, "ds", 2048, NULL, 5, NULL, 1);
}
#endif
-static void do_deep_sleep()
+static void do_deep_sleep(void)
{
esp_sleep_enable_timer_wakeup(100000);
esp_deep_sleep_start();
}
-static void check_sleep_reset_and_sleep()
+static void check_sleep_reset_and_sleep(void)
{
TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
esp_sleep_enable_timer_wakeup(100000);
esp_deep_sleep_start();
}
-static void check_sleep_reset()
+static void check_sleep_reset(void)
{
TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
}
check_sleep_reset_and_sleep,
check_sleep_reset);
-static void do_abort()
+static void do_abort(void)
{
abort();
}
-static void check_abort_reset_and_sleep()
+static void check_abort_reset_and_sleep(void)
{
TEST_ASSERT_EQUAL(ESP_RST_PANIC, esp_reset_reason());
esp_sleep_enable_timer_wakeup(100000);
static RTC_DATA_ATTR uint32_t s_wake_stub_var;
-static RTC_IRAM_ATTR void wake_stub()
+static RTC_IRAM_ATTR void wake_stub(void)
{
esp_default_wake_deep_sleep();
s_wake_stub_var = (uint32_t) &wake_stub;
}
-static void prepare_wake_stub()
+static void prepare_wake_stub(void)
{
esp_set_deep_sleep_wake_stub(&wake_stub);
esp_sleep_enable_timer_wakeup(100000);
esp_deep_sleep_start();
}
-static void check_wake_stub()
+static void check_wake_stub(void)
{
TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
TEST_ASSERT_EQUAL_HEX32((uint32_t) &wake_stub, s_wake_stub_var);
return fabs(dt);
}
-static uint32_t get_cause()
+static uint32_t get_cause(void)
{
uint32_t wakeup_cause = REG_GET_FIELD(RTC_CNTL_WAKEUP_STATE_REG, \
RTC_CNTL_WAKEUP_CAUSE);
#if CONFIG_COMPILER_STACK_CHECK
-static void recur_and_smash()
+static void recur_and_smash(void)
{
static int cnt;
volatile uint8_t buf[50];
2971, 2996, 3020, 3043, 3067, 3092, 3116, 3139, 3162, 3185};
/* ----------------------- EFuse Access Functions --------------------------- */
-static bool check_efuse_vref()
+static bool check_efuse_vref(void)
{
//Check if Vref is burned in eFuse
return (REG_GET_FIELD(VREF_REG, EFUSE_RD_ADC_VREF) != 0) ? true : false;
}
-static bool check_efuse_tp()
+static bool check_efuse_tp(void)
{
//Check if Two Point values are burned in eFuse
if (CHECK_BLK3_FLAG && (REG_GET_FIELD(BLK3_RESERVED_REG, EFUSE_RD_BLK3_PART_RESERVE) == 0)) {
return ret;
}
-static uint32_t read_efuse_vref()
+static uint32_t read_efuse_vref(void)
{
//eFuse stores deviation from ideal reference voltage
uint32_t ret = VREF_OFFSET; //Ideal vref
* is enabled in menuconfig.
*
*/
-void esp_int_wdt_init();
+void esp_int_wdt_init(void);
/**
* @brief Enable the interrupt watchdog on the current CPU. This is called
* in menuconfig.
*
*/
-void esp_int_wdt_cpu_init();
+void esp_int_wdt_cpu_init(void);
* called automatically by the startup code and should not
* be called manually.
*/
-void esp_crosscore_int_init();
+void esp_crosscore_int_init(void);
/**
/**
* @brief Deinitialize platform specific layer of esp_timer
*/
-void esp_timer_impl_deinit();
+void esp_timer_impl_deinit(void);
/**
* @brief Set up the timer interrupt to fire at a particular time
* @brief Get time, in microseconds, since esp_timer_impl_init was called
* @return timestamp in microseconds
*/
-uint64_t esp_timer_impl_get_time();
+uint64_t esp_timer_impl_get_time(void);
/**
* @brief Get minimal timer period, in microseconds
* callback, preventing other tasks from running.
* @return minimal period of periodic timer, in microseconds
*/
-uint64_t esp_timer_impl_get_min_period_us();
+uint64_t esp_timer_impl_get_min_period_us(void);
/**
* @brief obtain internal critical section used esp_timer implementation
* the calls. Should be treated in the same way as a spinlock.
* Call esp_timer_impl_unlock to release the lock
*/
-void esp_timer_impl_lock();
+void esp_timer_impl_lock(void);
/**
* @brief counterpart of esp_timer_impl_lock
*/
-void esp_timer_impl_unlock();
+void esp_timer_impl_unlock(void);
/**
* @brief Call once at startup to initialize pm implementation
*/
-void esp_pm_impl_init();
+void esp_pm_impl_init(void);
/**
* @brief Hook function for the idle task
* Must be called from the IDLE task on each CPU before entering waiti state.
*/
-void esp_pm_impl_idle_hook();
+void esp_pm_impl_idle_hook(void);
/**
* @brief Hook function for the interrupt dispatcher
* Must be called soon after entering the ISR
*/
-void esp_pm_impl_isr_hook();
+void esp_pm_impl_isr_hook(void);
/**
* @brief Dump the information about time spent in each of the pm modes.
/**
* @brief Hook function implementing `waiti` instruction, should be invoked from idle task context
*/
-void esp_pm_impl_waiti();
+void esp_pm_impl_waiti(void);
#ifdef CONFIG_PM_PROFILING
#define WITH_PROFILING
#endif
#ifdef WITH_PROFILING
-static inline pm_time_t IRAM_ATTR pm_get_time()
+static inline pm_time_t IRAM_ATTR pm_get_time(void)
{
return esp_timer_get_time();
}
ESP_PM_TRACE_TYPE_MAX
} esp_pm_trace_event_t;
-void esp_pm_trace_init();
+void esp_pm_trace_init(void);
void esp_pm_trace_enter(esp_pm_trace_event_t event, int core_id);
void esp_pm_trace_exit(esp_pm_trace_event_t event, int core_id);
* This is an internal function called by esp_restart. It is called directly
* by the panic handler and brownout detector interrupt.
*/
-void esp_restart_noos() __attribute__ ((noreturn));
+void esp_restart_noos(void) __attribute__ ((noreturn));
/**
* @brief Internal function to set reset reason hint
* - ESP_ERR_INVALID_STATE: Error, tasks are still subscribed to the TWDT
* - ESP_ERR_NOT_FOUND: Error, TWDT has already been deinitialized
*/
-esp_err_t esp_task_wdt_deinit();
+esp_err_t esp_task_wdt_deinit(void);
/**
* @brief Subscribe a task to the Task Watchdog Timer (TWDT)
* to the TWDT
* - ESP_ERR_INVALID_STATE: Error, the TWDT has not been initialized yet
*/
-esp_err_t esp_task_wdt_reset();
+esp_err_t esp_task_wdt_reset(void);
/**
* @brief Unsubscribes a task from the Task Watchdog Timer (TWDT)
* function, then proceed to reset the TWDT on subsequent calls of this
* function.
*/
-void esp_task_wdt_feed() __attribute__ ((deprecated));
+void esp_task_wdt_feed(void) __attribute__ ((deprecated));
#ifdef __cplusplus
* - ESP_ERR_INVALID_STATE if already initialized
* - other errors from interrupt allocator
*/
-esp_err_t esp_timer_init();
+esp_err_t esp_timer_init(void);
/**
* @brief De-initialize esp_timer library
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if not yet initialized
*/
-esp_err_t esp_timer_deinit();
+esp_err_t esp_timer_deinit(void);
/**
* @brief Create an esp_timer instance
* @return number of microseconds since esp_timer_init was called (this normally
* happens early during application startup).
*/
-int64_t esp_timer_get_time();
+int64_t esp_timer_get_time(void);
/**
* @brief Get the timestamp when the next timeout is expected to occur
* @return Timestamp of the nearest timer event, in microseconds.
* The timebase is the same as for the values returned by esp_timer_get_time.
*/
-int64_t esp_timer_get_next_alarm();
+int64_t esp_timer_get_next_alarm(void);
/**
* @brief Dump the list of timers to a stream
ESP_LOGV(TAG, "%s EXIT %p", __func__, addr);
}
-void esp_dbg_stubs_init()
+void esp_dbg_stubs_init(void)
{
s_dbg_stubs_ctl_data.tramp_addr = (uint32_t)s_stub_code_buf;
s_dbg_stubs_ctl_data.min_stack_addr = (uint32_t)s_stub_min_stack;
LIST_ENTRY(esp_timer) list_entry;
};
-static bool is_initialized();
+static bool is_initialized(void);
static esp_err_t timer_insert(esp_timer_handle_t timer);
static esp_err_t timer_remove(esp_timer_handle_t timer);
static bool timer_armed(esp_timer_handle_t timer);
-static void timer_list_lock();
-static void timer_list_unlock();
+static void timer_list_lock(void);
+static void timer_list_unlock(void);
#if WITH_PROFILING
static void timer_insert_inactive(esp_timer_handle_t timer);
return timer->alarm > 0;
}
-static IRAM_ATTR void timer_list_lock()
+static IRAM_ATTR void timer_list_lock(void)
{
portENTER_CRITICAL(&s_timer_lock);
}
-static IRAM_ATTR void timer_list_unlock()
+static IRAM_ATTR void timer_list_unlock(void)
{
portEXIT_CRITICAL(&s_timer_lock);
}
}
}
-static IRAM_ATTR bool is_initialized()
+static IRAM_ATTR bool is_initialized(void)
{
return s_timer_task != NULL;
}
return ESP_OK;
}
-int64_t IRAM_ATTR esp_timer_get_next_alarm()
+int64_t IRAM_ATTR esp_timer_get_next_alarm(void)
{
int64_t next_alarm = INT64_MAX;
timer_list_lock();
return next_alarm;
}
-int64_t IRAM_ATTR esp_timer_get_time()
+int64_t IRAM_ATTR esp_timer_get_time(void)
{
return (int64_t) esp_timer_impl_get_time();
}
static esp_freertos_idle_cb_t idle_cb[portNUM_PROCESSORS][MAX_HOOKS]={0};
static esp_freertos_tick_cb_t tick_cb[portNUM_PROCESSORS][MAX_HOOKS]={0};
-void IRAM_ATTR esp_vApplicationTickHook()
+void IRAM_ATTR esp_vApplicationTickHook(void)
{
int n;
int core = xPortGetCoreID();
}
}
-void esp_vApplicationIdleHook()
+void esp_vApplicationIdleHook(void)
{
bool can_go_idle=true;
int core = xPortGetCoreID();
* woken up to execute the callback provided to esp_ipc_call_nonblocking or
* esp_ipc_call_blocking.
*/
-static void esp_ipc_init() __attribute__((constructor));
+static void esp_ipc_init(void) __attribute__((constructor));
-static void esp_ipc_init()
+static void esp_ipc_init(void)
{
s_ipc_mutex = xSemaphoreCreateMutex();
s_ipc_ack = xSemaphoreCreateBinary();
#endif
-esp_err_t esp_event_loop_create_default()
+esp_err_t esp_event_loop_create_default(void)
{
if (s_default_loop) {
return ESP_ERR_INVALID_STATE;
return ESP_OK;
}
-esp_err_t esp_event_loop_delete_default()
+esp_err_t esp_event_loop_delete_default(void)
{
if (!s_default_loop) {
return ESP_ERR_INVALID_STATE;
#ifdef CONFIG_ESP_EVENT_LOOP_PROFILING
-static int esp_event_dump_prepare()
+static int esp_event_dump_prepare(void)
{
esp_event_loop_instance_t* loop_it;
esp_event_loop_node_t *loop_node_it;
return ESP_OK;
}
-esp_err_t esp_event_loop_deinit()
+esp_err_t esp_event_loop_deinit(void)
{
if (!s_initialized) {
ESP_LOGE(TAG, "system event loop not initialized");
* - ESP_FAIL: Failed to create task loop
* - Others: Fail
*/
-esp_err_t esp_event_loop_create_default();
+esp_err_t esp_event_loop_create_default(void);
/**
* @brief Delete the default event loop
* - ESP_OK: Success
* - Others: Fail
*/
-esp_err_t esp_event_loop_delete_default();
+esp_err_t esp_event_loop_delete_default(void);
/**
* @brief Dispatch events posted to an event loop.
* @note This API is part of the legacy event system. New code should use event library API in esp_event.h
*
*/
-void esp_event_set_default_eth_handlers();
+void esp_event_set_default_eth_handlers(void);
/**
* @brief Install default event handlers for Wi-Fi interfaces (station and AP)
*
* @note This API is part of the legacy event system. New code should use event library API in esp_event.h
*/
-void esp_event_set_default_wifi_handlers();
+void esp_event_set_default_wifi_handlers(void);
/**
* @brief Application specified event callback function
* - ESP_OK: Success
* - Others: Fail
*/
-esp_err_t esp_event_loop_deinit();
+esp_err_t esp_event_loop_deinit(void);
#ifdef __cplusplus
} // extern "C"
TEST_EVENT_BASE2_MAX
};
-static BaseType_t test_event_get_core()
+static BaseType_t test_event_get_core(void)
{
static int calls = 0;
}
}
-static esp_event_loop_args_t test_event_get_default_loop_args()
+static esp_event_loop_args_t test_event_get_default_loop_args(void)
{
esp_event_loop_args_t loop_config = {
.queue_size = CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE,
}
}
-static void test_setup()
+static void test_setup(void)
{
TEST_ASSERT_TRUE(TEST_CONFIG_TASKS_TO_SPAWN >= 2);
TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_create_default());
}
-static void test_teardown()
+static void test_teardown(void)
{
TEST_ASSERT_EQUAL(ESP_OK, esp_event_loop_delete_default());
}
#define UART_NUM CONFIG_CONSOLE_UART_NUM
-void esp_gdbstub_target_init()
+void esp_gdbstub_target_init(void)
{
}
-int esp_gdbstub_getchar()
+int esp_gdbstub_getchar(void)
{
while (REG_GET_FIELD(UART_STATUS_REG(UART_NUM), UART_RXFIFO_CNT) == 0) {
;
* Do target-specific initialization before gdbstub can start communicating.
* This may involve, for example, configuring the UART.
*/
-void esp_gdbstub_target_init();
+void esp_gdbstub_target_init(void);
/**
* Receive a byte from the GDB client. Blocks until a byte is available.
* @return received byte
*/
-int esp_gdbstub_getchar();
+int esp_gdbstub_getchar(void);
/**
* Send a byte to the GDB client
/**** GDB packet related functions ****/
/** Begin a packet */
-void esp_gdbstub_send_start();
+void esp_gdbstub_send_start(void);
/** Send a character as part of the packet */
void esp_gdbstub_send_char(char c);
void esp_gdbstub_send_hex(int val, int bits);
/** Finish sending the packet */
-void esp_gdbstub_send_end();
+void esp_gdbstub_send_end(void);
/** Send a packet with a string as content */
void esp_gdbstub_send_str_packet(const char* str);
#ifdef CONFIG_ESP_GDBSTUB_SUPPORT_TASKS
-static void init_task_info();
-static void find_paniced_task_index();
+static void init_task_info(void);
+static void find_paniced_task_index(void);
static int handle_task_commands(unsigned char *cmd, int len);
#endif
-static void send_reason();
+static void send_reason(void);
static esp_gdbstub_scratch_t s_scratch;
}
-static void send_reason()
+static void send_reason(void)
{
esp_gdbstub_send_start();
esp_gdbstub_send_char('T');
#ifdef CONFIG_ESP_GDBSTUB_SUPPORT_TASKS
-static void init_task_info()
+static void init_task_info(void)
{
unsigned tcb_size;
s_scratch.task_count = uxTaskGetSnapshotAll(s_scratch.tasks, GDBSTUB_TASKS_NUM, &tcb_size);
}
/** Get the index of the task running on the current CPU, and save the result */
-static void find_paniced_task_index()
+static void find_paniced_task_index(void)
{
TaskHandle_t cur_handle = xTaskGetCurrentTaskHandleForCPU(xPortGetCoreID());
TaskHandle_t handle;
static char s_chsum;
// Send the start of a packet; reset checksum calculation.
-void esp_gdbstub_send_start()
+void esp_gdbstub_send_start(void)
{
s_chsum = 0;
esp_gdbstub_putchar('$');
}
// Finish sending a packet.
-void esp_gdbstub_send_end()
+void esp_gdbstub_send_end(void)
{
esp_gdbstub_putchar('#');
esp_gdbstub_send_hex(s_chsum, 8);
STAILQ_HEAD(http_header, http_header_item);
-http_header_handle_t http_header_init()
+http_header_handle_t http_header_init(void)
{
http_header_handle_t header = calloc(1, sizeof(struct http_header));
HTTP_MEM_CHECK(TAG, header, return NULL);
* - http_header_handle_t
* - NULL if any errors
*/
-http_header_handle_t http_header_init();
+http_header_handle_t http_header_init(void);
/**
* @brief Cleanup and free all http header pairs
return fcntl(fd, F_GETFD) != -1 || errno != EBADF;
}
-static inline uint64_t httpd_sess_get_lru_counter()
+static inline uint64_t httpd_sess_get_lru_counter(void)
{
static uint64_t lru_counter = 0;
return lru_counter++;
}
/* Only self delete is supported */
-static inline void httpd_os_thread_delete()
+static inline void httpd_os_thread_delete(void)
{
vTaskDelete(xTaskGetCurrentTaskHandle());
}
vTaskDelay(msecs / portTICK_RATE_MS);
}
-static inline othread_t httpd_os_thread_handle()
+static inline othread_t httpd_os_thread_handle(void)
{
return xTaskGetCurrentTaskHandle();
}
/**
* @brief Function for obtaining BLE transport mode
*/
-const esp_local_ctrl_transport_t *esp_local_ctrl_get_transport_ble();
+const esp_local_ctrl_transport_t *esp_local_ctrl_get_transport_ble(void);
/**
* @brief Function for obtaining HTTPD transport mode
*/
-const esp_local_ctrl_transport_t *esp_local_ctrl_get_transport_httpd();
+const esp_local_ctrl_transport_t *esp_local_ctrl_get_transport_httpd(void);
#define ESP_LOCAL_CTRL_TRANSPORT_BLE esp_local_ctrl_get_transport_ble()
#define ESP_LOCAL_CTRL_TRANSPORT_HTTPD esp_local_ctrl_get_transport_httpd()
}
}
-static void setup_timer()
+static void setup_timer(void)
{
//Setup timer for ISR
int timer_group = TIMER_GROUP;
timer_isr_register(timer_group, timer_idx, ringbuffer_isr, NULL, 0, &ringbuffer_isr_handle); //Set ISR handler
}
-static void cleanup_timer()
+static void cleanup_timer(void)
{
timer_disable_intr(TIMER_GROUP, TIMER_NUMBER);
esp_intr_free(ringbuffer_isr_handle);
vTaskDelete(NULL);
}
-static void setup()
+static void setup(void)
{
ets_printf("Size of test data: %d\n", CONT_DATA_LEN);
tx_done = xSemaphoreCreateBinary(); //Semaphore to indicate send is done for a particular iteration
srand(SRAND_SEED); //Seed RNG
}
-static void cleanup()
+static void cleanup(void)
{
//Cleanup
vSemaphoreDelete(tx_done);
/* -------------------------- Test ring buffer IRAM ------------------------- */
-static IRAM_ATTR __attribute__((noinline)) bool iram_ringbuf_test()
+static IRAM_ATTR __attribute__((noinline)) bool iram_ringbuf_test(void)
{
bool result = true;
extern "C" {
#endif
-void start_tb_console();
+void start_tb_console(void);
#ifdef __cplusplus
}
int buffer_size;
};
-static uint64_t _tick_get_ms()
+static uint64_t _tick_get_ms(void)
{
return esp_timer_get_time()/1000;
}
*
* @return pointer to PHY init data structure
*/
-const esp_phy_init_data_t* esp_phy_get_init_data();
+const esp_phy_init_data_t* esp_phy_get_init_data(void);
/**
* @brief Release PHY init data
* @brief Get the format version of calibration data used by PHY library.
* @return Format version number, OR'ed with BIT(16) if PHY is in WIFI only mode.
*/
-uint32_t phy_get_rf_cal_version();
+uint32_t phy_get_rf_cal_version(void);
/**
* @brief Set RF/BB for only WIFI mode or coexist(WIFI & BT) mode
#if CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION
#include "esp_partition.h"
-const esp_phy_init_data_t* esp_phy_get_init_data()
+const esp_phy_init_data_t* esp_phy_get_init_data(void)
{
const esp_partition_t* partition = esp_partition_find_first(
ESP_PARTITION_TYPE_DATA, ESP_PARTITION_SUBTYPE_DATA_PHY, NULL);
// phy_init_data.h will declare static 'phy_init_data' variable initialized with default init data
-const esp_phy_init_data_t* esp_phy_get_init_data()
+const esp_phy_init_data_t* esp_phy_get_init_data(void)
{
ESP_LOGD(TAG, "loading PHY init data from application binary");
return &phy_init_data;
static const char* TAG = "wifi_init";
-static void __attribute__((constructor)) s_set_default_wifi_log_level()
+static void __attribute__((constructor)) s_set_default_wifi_log_level(void)
{
/* WiFi libraries aren't compiled to know CONFIG_LOG_DEFAULT_LEVEL,
so set it at runtime startup. Done here not in esp_wifi_init() to allow
esp_log_level_set("mesh", CONFIG_LOG_DEFAULT_LEVEL);
}
-static void esp_wifi_set_debug_log()
+static void esp_wifi_set_debug_log(void)
{
/* set WiFi log level and module */
#if CONFIG_ESP32_WIFI_DEBUG_LOG_ENABLE
//Function just extern, need not test
extern void bt_bb_init_cmplx(void);
-extern void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu();
-extern void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu();
+extern void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu(void);
+extern void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu(void);
//Functions in librtc.a called by WIFI or Blutooth directly in ISR
extern void bt_bb_init_cmplx_reg(void);
*
* @note Should be called at system startup.
*/
-void esp_core_dump_init();
+void esp_core_dump_init(void);
/**
* @brief Saves core dump to flash.
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
// Core dump flash init function
-void esp_core_dump_flash_init();
+void esp_core_dump_flash_init(void);
#endif
#endif
-void esp_core_dump_init()
+void esp_core_dump_init(void)
{
#if CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH
esp_core_dump_flash_init();
return crc32_le(0, (uint8_t const *)&s_core_flash_config.partition, sizeof(s_core_flash_config.partition));
}
-void esp_core_dump_flash_init()
+void esp_core_dump_flash_init(void)
{
const esp_partition_t *core_part;
return err;
}
-static int esp_core_dump_uart_get_char() {
+static int esp_core_dump_uart_get_char(void) {
int i;
uint32_t reg = (READ_PERI_REG(UART_STATUS_REG(0)) >> UART_RXFIFO_CNT_S) & UART_RXFIFO_CNT;
if (reg) {
volatile unsigned long crash_flags = TCI_UNALIGN_PTR;
-void bad_ptr_func()
+void bad_ptr_func(void)
{
unsigned long *ptr = (unsigned long *)0;
volatile int cnt = 0;
fflush(stdout);
}
-void recur_func()
+void recur_func(void)
{
static int rec_cnt;
unsigned short *ptr = (unsigned short *)0x5;
TEST_ESP_OK(esp_vfs_fat_rawflash_mount("/spiflash", "flash_test", &mount_config));
}
-static void test_teardown()
+static void test_teardown(void)
{
TEST_ESP_OK(esp_vfs_fat_rawflash_unmount("/spiflash","flash_test"));
}
static wl_handle_t s_test_wl_handle;
-static void test_setup()
+static void test_setup(void)
{
esp_vfs_fat_sdmmc_mount_config_t mount_config = {
.format_if_mount_failed = true,
TEST_ESP_OK(esp_vfs_fat_spiflash_mount("/spiflash", NULL, &mount_config, &s_test_wl_handle));
}
-static void test_teardown()
+static void test_teardown(void)
{
TEST_ESP_OK(esp_vfs_fat_spiflash_unmount("/spiflash", s_test_wl_handle));
}
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if FATFS is not registered in VFS
*/
-esp_err_t esp_vfs_fat_unregister() __attribute__((deprecated));
+esp_err_t esp_vfs_fat_unregister(void) __attribute__((deprecated));
/**
* @brief Un-register FATFS from VFS
* - ESP_OK on success
* - ESP_ERR_INVALID_STATE if esp_vfs_fat_sdmmc_mount hasn't been called
*/
-esp_err_t esp_vfs_fat_sdmmc_unmount();
+esp_err_t esp_vfs_fat_sdmmc_unmount(void);
/**
* @brief Convenience function to initialize FAT filesystem in SPI flash and register it in VFS
return FF_VOLUMES;
}
-static size_t find_unused_context_index()
+static size_t find_unused_context_index(void)
{
for(size_t i=0; i<FF_VOLUMES; i++) {
if (!s_fat_ctxs[i]) {
return ESP_OK;
}
-esp_err_t esp_vfs_fat_unregister()
+esp_err_t esp_vfs_fat_unregister(void)
{
if (s_fat_ctx == NULL) {
return ESP_ERR_INVALID_STATE;
return err;
}
-esp_err_t esp_vfs_fat_sdmmc_unmount()
+esp_err_t esp_vfs_fat_sdmmc_unmount(void)
{
if (s_card == NULL) {
return ESP_ERR_INVALID_STATE;
/**
* Modbus controller destroy function
*/
-esp_err_t mbc_master_destroy()
+esp_err_t mbc_master_destroy(void)
{
esp_err_t error = ESP_OK;
MB_MASTER_CHECK((master_interface_ptr != NULL),
/**
* Modbus controller stack start function
*/
-esp_err_t mbc_master_start()
+esp_err_t mbc_master_start(void)
{
esp_err_t error = ESP_OK;
MB_MASTER_CHECK((master_interface_ptr != NULL),
/**
* Modbus controller destroy function
*/
-esp_err_t mbc_slave_destroy()
+esp_err_t mbc_slave_destroy(void)
{
esp_err_t error = ESP_OK;
// Is initialization done?
/**
* Start Modbus controller start function
*/
-esp_err_t mbc_slave_start()
+esp_err_t mbc_slave_start(void)
{
esp_err_t error = ESP_OK;
MB_SLAVE_CHECK((slave_interface_ptr != NULL),
/* ----------------------- Start implementation -----------------------------*/
inline void
-vMBPortEnterCritical( )
+vMBPortEnterCritical(void)
{
_lock_acquire(&s_port_lock);
}
inline void
-vMBPortExitCritical( )
+vMBPortExitCritical(void)
{
_lock_release(&s_port_lock);
}
typedef unsigned long ULONG;
typedef long LONG;
-void vMBPortEnterCritical( );
-void vMBPortExitCritical( );
+void vMBPortEnterCritical(void);
+void vMBPortExitCritical(void);
#define ENTER_CRITICAL_SECTION( ) { ESP_LOGD(MB_PORT_TAG,"%s: Port enter critical.", __func__); \
vMBPortEnterCritical(); }
}
}
-BOOL xMBPortSerialTxPoll()
+BOOL xMBPortSerialTxPoll(void)
{
BOOL bStatus = FALSE;
USHORT usCount = 0;
return TRUE;
}
-void vMBPortSerialClose()
+void vMBPortSerialClose(void)
{
(void)vTaskSuspend(xMbTaskHandle);
(void)vTaskDelete(xMbTaskHandle);
}
}
-BOOL xMBMasterPortSerialTxPoll()
+BOOL xMBMasterPortSerialTxPoll(void)
{
BOOL bStatus = FALSE;
USHORT usCount = 0;
return TRUE;
}
-void vMBMasterPortSerialClose()
+void vMBMasterPortSerialClose(void)
{
(void)vTaskDelete(xMbTaskHandle);
ESP_ERROR_CHECK(uart_driver_delete(ucUartNumber));
return TRUE;
}
-void vMBPortTimersEnable()
+void vMBPortTimersEnable(void)
{
#ifdef CONFIG_FMB_TIMER_PORT_ENABLED
ESP_ERROR_CHECK(timer_pause(usTimerGroupIndex, usTimerIndex));
#endif
}
-void vMBPortTimersDisable()
+void vMBPortTimersDisable(void)
{
#ifdef CONFIG_FMB_TIMER_PORT_ENABLED
ESP_ERROR_CHECK(timer_pause(usTimerGroupIndex, usTimerIndex));
#endif
}
-void vMBPortTimerClose()
+void vMBPortTimerClose(void)
{
#ifdef CONFIG_FMB_TIMER_PORT_ENABLED
ESP_ERROR_CHECK(timer_pause(usTimerGroupIndex, usTimerIndex));
return TRUE;
}
-void vMBMasterPortTimersT35Enable()
+void vMBMasterPortTimersT35Enable(void)
{
USHORT usTimerTicks = usT35TimeOut50us;
(void)xMBMasterPortTimersEnable(usTimerTicks);
}
-void vMBMasterPortTimersConvertDelayEnable()
+void vMBMasterPortTimersConvertDelayEnable(void)
{
// Covert time in milliseconds into ticks
USHORT usTimerTicks = ((MB_MASTER_DELAY_MS_CONVERT * 1000) / MB_TICK_TIME_US);
(void)xMBMasterPortTimersEnable(usTimerTicks);
}
-void vMBMasterPortTimersRespondTimeoutEnable()
+void vMBMasterPortTimersRespondTimeoutEnable(void)
{
USHORT usTimerTicks = (MB_MASTER_TIMEOUT_MS_RESPOND * 1000 / MB_TICK_TIME_US);
(void)xMBMasterPortTimersEnable(usTimerTicks);
}
-void vMBMasterPortTimersDisable()
+void vMBMasterPortTimersDisable(void)
{
// Stop timer and then reload timer counter value
ESP_ERROR_CHECK(timer_pause(usTimerGroupIndex, usTimerIndex));
ESP_ERROR_CHECK(timer_disable_intr(usTimerGroupIndex, usTimerIndex));
}
-void vMBMasterPortTimerClose()
+void vMBMasterPortTimerClose(void)
{
ESP_ERROR_CHECK(timer_pause(usTimerGroupIndex, usTimerIndex));
ESP_ERROR_CHECK(timer_disable_intr(usTimerGroupIndex, usTimerIndex));
}
// The helper function to get time stamp in microseconds
-static uint64_t get_time_stamp()
+static uint64_t get_time_stamp(void)
{
uint64_t time_stamp = esp_timer_get_time();
return time_stamp;
* Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
* aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
*/
-BaseType_t xPortInIsrContext();
+BaseType_t xPortInIsrContext(void);
/*
* This function will be called in High prio ISRs. Returns true if the current core was in ISR context
* before calling into high prio ISR context.
*/
-BaseType_t xPortInterruptedFromISRContext();
+BaseType_t xPortInterruptedFromISRContext(void);
/*
* The structures and methods of manipulating the MPU are contained within the
#endif
/* Multi-core: get current core ID */
-static inline uint32_t IRAM_ATTR xPortGetCoreID() {
+static inline uint32_t IRAM_ATTR xPortGetCoreID(void) {
uint32_t id;
__asm__ __volatile__ (
"rsr.prid %0\n"
#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
-void vPortAssertIfInISR();
+void vPortAssertIfInISR(void);
#define portCRITICAL_NESTING_IN_TCB 1
// Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
// They can be called from interrupts too.
// WARNING: Only applies to current CPU. See notes above.
-static inline unsigned portENTER_CRITICAL_NESTED() {
+static inline unsigned portENTER_CRITICAL_NESTED(void) {
unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
portbenchmarkINTERRUPT_DISABLE();
return state;
#define portYIELD() vPortYield()
#define portYIELD_FROM_ISR() {traceISR_EXIT_TO_SCHEDULER(); _frxt_setup_switch();}
-static inline uint32_t xPortGetCoreID();
+static inline uint32_t xPortGetCoreID(void);
/* Yielding within an API call (when interrupts are off), means the yield should be delayed
until interrupts are re-enabled.
* Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
* aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
*/
-BaseType_t xPortInIsrContext()
+BaseType_t xPortInIsrContext(void)
{
unsigned int irqStatus;
BaseType_t ret;
* This function will be called in High prio ISRs. Returns true if the current core was in ISR context
* before calling into high prio ISR context.
*/
-BaseType_t IRAM_ATTR xPortInterruptedFromISRContext()
+BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
{
return (port_interruptNesting[xPortGetCoreID()] != 0);
}
-void vPortAssertIfInISR()
+void vPortAssertIfInISR(void)
{
configASSERT(xPortInIsrContext());
}
#if ( configUSE_NEWLIB_REENTRANT == 1 )
//Return global reent struct if FreeRTOS isn't running,
-struct _reent* __getreent() {
+struct _reent* __getreent(void) {
//No lock needed because if this changes, we won't be running anymore.
TCB_t *currTask=xTaskGetCurrentTaskHandle();
if (currTask==NULL) {
*((uint32_t *)ptr) = (TLSP_DEL_BASE << index); //Indicate deletion by setting task storage element to a unique value
}
-static void task_cb()
+static void task_cb(void)
{
int core = xPortGetCoreID();
for(int i = 0; i < NO_OF_TLSP; i++){
static bool test_set_bits;
static bool test_clear_bits;
-static void IRAM_ATTR event_group_isr()
+static void IRAM_ATTR event_group_isr(void)
{
portBASE_TYPE task_woken = pdFALSE;
TIMERG0.int_clr_timers.t0 = 1;
}
}
-static void setup_timer()
+static void setup_timer(void)
{
//Setup timer for ISR
int timer_group = TIMER_GROUP_0;
timer_isr_register(timer_group, timer_idx, event_group_isr, NULL, ESP_INTR_FLAG_IRAM, &isr_handle); //Set ISR handler
}
-static void cleanup_timer()
+static void cleanup_timer(void)
{
timer_disable_intr(TIMER_GROUP_0, TIMER_NUMBER);
esp_intr_free(isr_handle);
vTaskDelete(NULL);
}
-static void IRAM_ATTR sender_ISR ()
+static void IRAM_ATTR sender_ISR (void)
{
int curcore = xPortGetCoreID();
if(curcore == 0){ //Clear timer interrupt
xTaskResumeAll();
}
-static void IRAM_ATTR suspend_scheduler_on_both_cpus()
+static void IRAM_ATTR suspend_scheduler_on_both_cpus(void)
{
block = true;
if (suspend_both_cpus) {
vTaskSuspendAll();
}
-static void IRAM_ATTR resume_scheduler_on_both_cpus()
+static void IRAM_ATTR resume_scheduler_on_both_cpus(void)
{
block = false;
xTaskResumeAll();
static uint32_t count_tick[2];
-static void IRAM_ATTR tick_hook()
+static void IRAM_ATTR tick_hook(void)
{
++count_tick[xPortGetCoreID()];
}
}
}
-void heap_caps_dump_all()
+void heap_caps_dump_all(void)
{
heap_caps_dump(MALLOC_CAP_INVALID);
}
}
}
-void heap_caps_enable_nonos_stack_heaps()
+void heap_caps_enable_nonos_stack_heaps(void)
{
heap_t *heap;
SLIST_FOREACH(heap, ®istered_heaps, next) {
/* Initialize the heap allocator to use all of the memory not
used by static data or reserved for other purposes
*/
-void heap_caps_init()
+void heap_caps_init(void)
{
/* Get the array of regions that we can use for heaps
(with reserved memory removed already.)
* Output is the same as for heap_caps_dump.
*
*/
-void heap_caps_dump_all();
+void heap_caps_dump_all(void);
#ifdef __cplusplus
}
* This is called once in the IDF startup code. Do not call it
* at other times.
*/
-void heap_caps_init();
+void heap_caps_init(void);
/**
* @brief Enable heap(s) in memory regions where the startup stacks are located.
* completely started, they do not use that memory anymore and heap(s) there can
* be enabled.
*/
-void heap_caps_enable_nonos_stack_heaps();
+void heap_caps_enable_nonos_stack_heaps(void);
/**
* @brief Add a region of memory to the collection of heaps at runtime.
static int noAllocated;
-static int tryAllocMem() {
+static int tryAllocMem(void) {
int i, j;
const int allocateMaxK=1024*5; //try to allocate a max of 5MiB
}
-static void tryAllocMemFree() {
+static void tryAllocMemFree(void) {
int i, j;
for (i=0; i<noAllocated; i++) {
for (j=0; j<1024/4; j++) {
/* Small function runs from IRAM to check that malloc/free/realloc
all work OK when cache is disabled...
*/
-static IRAM_ATTR __attribute__((noinline)) bool iram_malloc_test()
+static IRAM_ATTR __attribute__((noinline)) bool iram_malloc_test(void)
{
spi_flash_guard_get()->start(); // Disables flash cache
internal filesystem storage.
*/
-extern int aead_chacha20poly1305_xmain();
+extern int aead_chacha20poly1305_xmain(void);
TEST_CASE("aead_chacha20poly1305 test vectors", "[libsodium]")
{
TEST_ASSERT_EQUAL(0, aead_chacha20poly1305_xmain());
}
-extern int chacha20_xmain();
+extern int chacha20_xmain(void);
TEST_CASE("chacha20 test vectors", "[libsodium]")
{
TEST_ASSERT_EQUAL(0, chacha20_xmain());
}
-extern int box_xmain();
-extern int box2_xmain();
+extern int box_xmain(void);
+extern int box2_xmain(void);
TEST_CASE("box tests", "[libsodium]")
{
TEST_ASSERT_EQUAL(0, box2_xmain());
}
-extern int ed25519_convert_xmain();
+extern int ed25519_convert_xmain(void);
TEST_CASE("ed25519_convert tests", "[libsodium]")
{
TEST_ASSERT_EQUAL(0, ed25519_convert_xmain() );
}
-extern int sign_xmain();
+extern int sign_xmain(void);
TEST_CASE("sign tests", "[libsodium]")
{
TEST_ASSERT_EQUAL(0, sign_xmain() );
}
-extern int hash_xmain();
+extern int hash_xmain(void);
TEST_CASE("hash tests", "[libsodium]")
{
static void heap_bubble_down(int index);
static inline void heap_swap(int i, int j);
static inline bool should_output(esp_log_level_t level_for_message, esp_log_level_t level_for_tag);
-static inline void clear_log_level_list();
+static inline void clear_log_level_list(void);
vprintf_like_t esp_log_set_vprintf(vprintf_like_t func)
{
xSemaphoreGive(s_log_mutex);
}
-void clear_log_level_list()
+void clear_log_level_list(void)
{
uncached_tag_entry_t *it;
while((it = SLIST_FIRST(&s_log_tags)) != NULL) {
//as a workaround before the interface for this variable
extern uint32_t g_ticks_per_us_pro;
-uint32_t ATTR esp_log_early_timestamp()
+uint32_t ATTR esp_log_early_timestamp(void)
{
return xthal_get_ccount() / (g_ticks_per_us_pro * 1000);
}
#ifndef BOOTLOADER_BUILD
-uint32_t IRAM_ATTR esp_log_timestamp()
+uint32_t IRAM_ATTR esp_log_timestamp(void)
{
if (xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED) {
return esp_log_early_timestamp();
#else
-uint32_t esp_log_timestamp() __attribute__((alias("esp_log_early_timestamp")));
+uint32_t esp_log_timestamp(void) __attribute__((alias("esp_log_early_timestamp")));
#endif //BOOTLOADER_BUILD
* Returns : ip4_addr_t
*******************************************************************************/
ip4_addr_t
-dhcps_dns_getserver()
+dhcps_dns_getserver(void)
{
return dns_server;
}
void dhcps_set_option_info(u8_t op_id, void *opt_info, u32_t opt_len);
bool dhcp_search_ip_on_mac(u8_t *mac, ip4_addr_t *ip);
void dhcps_dns_setserver(const ip_addr_t *dnsserver);
-ip4_addr_t dhcps_dns_getserver();
+ip4_addr_t dhcps_dns_getserver(void);
void dhcps_set_new_lease_cb(dhcps_cb_t cb);
#endif
extern "C" {
#endif
-void esp_vfs_lwip_sockets_register();
+void esp_vfs_lwip_sockets_register(void);
#ifdef __cplusplus
}
}
}
-static void *lwip_get_socket_select_semaphore()
+static void *lwip_get_socket_select_semaphore(void)
{
/* Calling this from the same process as select() will ensure that the semaphore won't be allocated from
* ISR (lwip_stop_socket_select_isr).
return lwip_ioctl(fd, cmd, va_arg(args, void *));
}
-void esp_vfs_lwip_sockets_register()
+void esp_vfs_lwip_sockets_register(void)
{
esp_vfs_t vfs = {
.flags = ESP_VFS_FLAG_DEFAULT,
void (*dhcp_test_static_dhcp_recv)(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port) = NULL;
-void dhcp_test_init_di()
+void dhcp_test_init_di(void)
{
dhcp_test_static_dhcp_recv = dhcp_recv;
}
void (*dhcp_test_static_handle_hdcp)(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port) = NULL;
-void dhcp_test_init_di()
+void dhcp_test_init_di(void)
{
dhcp_test_static_handle_hdcp = handle_dhcp;
}
void (*dns_test_static_dns_recv)(void *s, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port) = NULL;
err_t (*dns_test_static_dns_enqueue)(const char *name, size_t hostnamelen, dns_found_callback found, void *callback_arg, u8_t dns_addrtype) = NULL;
-void dns_test_init_di()
+void dns_test_init_di(void)
{
dns_test_static_dns_recv = dns_recv;
dns_test_static_dns_enqueue = dns_enqueue;
//
// Dependency injected test functions
void dhcp_test_dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port);
-void dhcp_test_init_di();
+void dhcp_test_init_di(void);
//
// Test starts here
// Dependency injected static function to pass the packet into parser
void dhcp_test_handle_dhcp(void *arg, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port);
-void dhcp_test_init_di();
+void dhcp_test_init_di(void);
//
// Test starts here
void dns_test_dns_recv(void *s, struct udp_pcb *pcb, struct pbuf *p, const ip_addr_t *addr, u16_t port);
void dns_test_inject_port_and_txid(int port, int txid);
-void dns_test_init_di();
+void dns_test_init_di(void);
err_t dns_test_dns_enqueue(const char *name, size_t hostnamelen, dns_found_callback found, void *callback_arg, u8_t dns_addrtype);
//
}
}
-static void rsa_isr_initialise()
+static void rsa_isr_initialise(void)
{
if (op_complete_sem == NULL) {
op_complete_sem = xSemaphoreCreateBinary();
static volatile bool apb_access_corrupt;
static TaskHandle_t apb_task_handle;
-void start_apb_access_loop()
+void start_apb_access_loop(void)
{
apb_access_corrupt = false;
xTaskCreatePinnedToCore(apb_access_loop_task, "accessAPB", 2048, NULL,
&apb_task_handle, !UNITY_FREERTOS_CPU);
}
-void verify_apb_access_loop()
+void verify_apb_access_loop(void)
{
vTaskDelete(apb_task_handle);
apb_task_handle = NULL;
#else /*CONFIG_FREERTOS_UNICORE */
-void start_apb_access_loop()
+void start_apb_access_loop(void)
{
}
-void verify_apb_access_loop()
+void verify_apb_access_loop(void)
{
}
Does nothing in unicore mode.
*/
-void start_apb_access_loop();
+void start_apb_access_loop(void);
/* verify_apb_access_loop() kills the task started by start_apb_access_loop()
and verifies that none of the APB reads were corrupted by unsafe DPORT reads.
*/
-void verify_apb_access_loop();
+void verify_apb_access_loop(void);
* - ESP_ERR_NO_MEM on memory error
* - ESP_FAIL when failed to start mdns task
*/
-esp_err_t mdns_init();
+esp_err_t mdns_init(void);
/**
* @brief Stop and free mDNS server
*
*/
-void mdns_free();
+void mdns_free(void);
/**
* @brief Set the hostname for mDNS server
* - ESP_OK success
* - ESP_ERR_INVALID_ARG Parameter error
*/
-esp_err_t mdns_service_remove_all();
+esp_err_t mdns_service_remove_all(void);
/**
* @brief Query mDNS for host or service
/**
* @brief Register MDNS functions with the console component
*/
-void mdns_console_register();
+void mdns_console_register(void);
#endif /* _MDNS_CONSOLE_H_ */
static volatile TaskHandle_t _mdns_service_task_handle = NULL;
static SemaphoreHandle_t _mdns_service_semaphore = NULL;
-static void _mdns_search_finish_done();
+static void _mdns_search_finish_done(void);
static mdns_search_once_t * _mdns_search_find_from(mdns_search_once_t * search, mdns_name_t * name, uint16_t type, tcpip_adapter_if_t tcpip_if, mdns_ip_protocol_t ip_protocol);
static void _mdns_search_result_add_ip(mdns_search_once_t * search, const char * hostname, ip_addr_t * ip, tcpip_adapter_if_t tcpip_if, mdns_ip_protocol_t ip_protocol);
static void _mdns_search_result_add_srv(mdns_search_once_t * search, const char * hostname, uint16_t port, tcpip_adapter_if_t tcpip_if, mdns_ip_protocol_t ip_protocol);
/**
* @brief free all packets scheduled for sending
*/
-static void _mdns_clear_tx_queue_head()
+static void _mdns_clear_tx_queue_head(void)
{
mdns_tx_packet_t * q;
while (_mdns_server->tx_queue_head) {
/**
* @brief Stop the responder on all services without instance
*/
-static void _mdns_send_bye_all_pcbs_no_instance()
+static void _mdns_send_bye_all_pcbs_no_instance(void)
{
size_t srv_count = 0;
mdns_srv_item_t * a = _mdns_server->services;
/**
* @brief Restart the responder on all services without instance
*/
-static void _mdns_restart_all_pcbs_no_instance()
+static void _mdns_restart_all_pcbs_no_instance(void)
{
size_t srv_count = 0;
mdns_srv_item_t * a = _mdns_server->services;
/**
* @brief Restart the responder on all active PCBs
*/
-static void _mdns_restart_all_pcbs()
+static void _mdns_restart_all_pcbs(void)
{
_mdns_clear_tx_queue_head();
size_t srv_count = 0;
/**
* @brief Called from parser to finish any searches that have reached maximum results
*/
-static void _mdns_search_finish_done()
+static void _mdns_search_finish_done(void)
{
mdns_search_once_t * search = _mdns_server->search_once;
mdns_search_once_t * s = NULL;
* if it is scheduled to be transmitted, then pushes the packet to action queue to be handled.
*
*/
-static void _mdns_scheduler_run()
+static void _mdns_scheduler_run(void)
{
MDNS_SERVICE_LOCK();
mdns_tx_packet_t * p = _mdns_server->tx_queue_head;
/**
* @brief Called from timer task to run active searches
*/
-static void _mdns_search_run()
+static void _mdns_search_run(void)
{
MDNS_SERVICE_LOCK();
mdns_search_once_t * s = _mdns_server->search_once;
_mdns_search_run();
}
-static esp_err_t _mdns_start_timer(){
+static esp_err_t _mdns_start_timer(void){
esp_timer_create_args_t timer_conf = {
.callback = _mdns_timer_cb,
.arg = NULL,
return esp_timer_start_periodic(_mdns_server->timer_handle, MDNS_TIMER_PERIOD_US);
}
-static esp_err_t _mdns_stop_timer(){
+static esp_err_t _mdns_stop_timer(void){
esp_err_t err = ESP_OK;
if (_mdns_server->timer_handle) {
err = esp_timer_stop(_mdns_server->timer_handle);
* - ESP_OK on success
* - ESP_FAIL on error
*/
-static esp_err_t _mdns_service_task_start()
+static esp_err_t _mdns_service_task_start(void)
{
if (!_mdns_service_semaphore) {
_mdns_service_semaphore = xSemaphoreCreateMutex();
* @return
* - ESP_OK
*/
-static esp_err_t _mdns_service_task_stop()
+static esp_err_t _mdns_service_task_stop(void)
{
_mdns_stop_timer();
if (_mdns_service_task_handle) {
}
}
-esp_err_t mdns_init()
+esp_err_t mdns_init(void)
{
esp_err_t err = ESP_OK;
return err;
}
-void mdns_free()
+void mdns_free(void)
{
uint8_t i, j;
if (!_mdns_server) {
return ESP_OK;
}
-esp_err_t mdns_service_remove_all()
+esp_err_t mdns_service_remove_all(void)
{
if (!_mdns_server) {
return ESP_ERR_INVALID_ARG;
return 0;
}
-static void register_mdns_query_a()
+static void register_mdns_query_a(void)
{
mdns_query_a_args.hostname = arg_str1(NULL, NULL, "<hostname>", "Hostname that is searched for");
mdns_query_a_args.timeout = arg_int0("t", "timeout", "<timeout>", "Timeout for this query");
return 0;
}
-static void register_mdns_query_aaaa()
+static void register_mdns_query_aaaa(void)
{
mdns_query_a_args.hostname = arg_str1(NULL, NULL, "<hostname>", "Hostname that is searched for");
mdns_query_a_args.timeout = arg_int0("t", "timeout", "<timeout>", "Timeout for this query");
return 0;
}
-static void register_mdns_query_srv()
+static void register_mdns_query_srv(void)
{
mdns_query_srv_args.instance = arg_str1(NULL, NULL, "<instance>", "Instance to search for");
mdns_query_srv_args.service = arg_str1(NULL, NULL, "<service>", "Service to search for (ex. _http, _smb, etc.)");
return 0;
}
-static void register_mdns_query_txt()
+static void register_mdns_query_txt(void)
{
mdns_query_txt_args.instance = arg_str1(NULL, NULL, "<instance>", "Instance to search for");
mdns_query_txt_args.service = arg_str1(NULL, NULL, "<service>", "Service to search for (ex. _http, _smb, etc.)");
return 0;
}
-static void register_mdns_query_ptr()
+static void register_mdns_query_ptr(void)
{
mdns_query_ptr_args.service = arg_str1(NULL, NULL, "<service>", "Service to search for (ex. _http, _smb, etc.)");
mdns_query_ptr_args.proto = arg_str1(NULL, NULL, "<proto>", "Protocol to search for (_tcp, _udp, etc.)");
return 0;
}
-static void register_mdns_query_ip()
+static void register_mdns_query_ip(void)
{
mdns_query_ip_args.hostname = arg_str1(NULL, NULL, "<hostname>", "Hostname that is searched for");
mdns_query_ip_args.timeout = arg_int0("t", "timeout", "<timeout>", "Timeout for this query");
return 0;
}
-static void register_mdns_query_svc()
+static void register_mdns_query_svc(void)
{
mdns_query_svc_args.instance = arg_str1(NULL, NULL, "<instance>", "Instance to search for");
mdns_query_svc_args.service = arg_str1(NULL, NULL, "<service>", "Service to search for (ex. _http, _smb, etc.)");
return 0;
}
-static void register_mdns_init()
+static void register_mdns_init(void)
{
mdns_init_args.hostname = arg_str0("h", "hostname", "<hostname>", "Hostname that the server will advertise");
mdns_init_args.instance = arg_str0("i", "instance", "<instance>", "Default instance name for services");
return 0;
}
-static void register_mdns_free()
+static void register_mdns_free(void)
{
const esp_console_cmd_t cmd_free = {
.command = "mdns_free",
return 0;
}
-static void register_mdns_set_hostname()
+static void register_mdns_set_hostname(void)
{
mdns_set_hostname_args.hostname = arg_str1(NULL, NULL, "<hostname>", "Hostname that the server will advertise");
mdns_set_hostname_args.end = arg_end(2);
return 0;
}
-static void register_mdns_set_instance()
+static void register_mdns_set_instance(void)
{
mdns_set_instance_args.instance = arg_str1(NULL, NULL, "<instance>", "Default instance name for services");
mdns_set_instance_args.end = arg_end(2);
return 0;
}
-static void register_mdns_service_add()
+static void register_mdns_service_add(void)
{
mdns_add_args.service = arg_str1(NULL, NULL, "<service>", "MDNS Service");
mdns_add_args.proto = arg_str1(NULL, NULL, "<proto>", "IP Protocol");
return 0;
}
-static void register_mdns_service_remove()
+static void register_mdns_service_remove(void)
{
mdns_remove_args.service = arg_str1(NULL, NULL, "<service>", "MDNS Service");
mdns_remove_args.proto = arg_str1(NULL, NULL, "<proto>", "IP Protocol");
return 0;
}
-static void register_mdns_service_instance_set()
+static void register_mdns_service_instance_set(void)
{
mdns_service_instance_set_args.service = arg_str1(NULL, NULL, "<service>", "MDNS Service");
mdns_service_instance_set_args.proto = arg_str1(NULL, NULL, "<proto>", "IP Protocol");
return 0;
}
-static void register_mdns_service_port_set()
+static void register_mdns_service_port_set(void)
{
mdns_service_port_set_args.service = arg_str1(NULL, NULL, "<service>", "MDNS Service");
mdns_service_port_set_args.proto = arg_str1(NULL, NULL, "<proto>", "IP Protocol");
return 0;
}
-static void register_mdns_service_txt_replace()
+static void register_mdns_service_txt_replace(void)
{
mdns_txt_replace_args.service = arg_str1(NULL, NULL, "<service>", "MDNS Service");
mdns_txt_replace_args.proto = arg_str1(NULL, NULL, "<proto>", "IP Protocol");
return 0;
}
-static void register_mdns_service_txt_set()
+static void register_mdns_service_txt_set(void)
{
mdns_txt_set_args.service = arg_str1(NULL, NULL, "<service>", "MDNS Service");
mdns_txt_set_args.proto = arg_str1(NULL, NULL, "<proto>", "IP Protocol");
return 0;
}
-static void register_mdns_service_txt_remove()
+static void register_mdns_service_txt_remove(void)
{
mdns_txt_remove_args.service = arg_str1(NULL, NULL, "<service>", "MDNS Service");
mdns_txt_remove_args.proto = arg_str1(NULL, NULL, "<proto>", "IP Protocol");
return 0;
}
-static void register_mdns_service_remove_all()
+static void register_mdns_service_remove_all(void)
{
const esp_console_cmd_t cmd_free = {
.command = "mdns_service_remove_all",
ESP_ERROR_CHECK( esp_console_cmd_register(&cmd_free) );
}
-void mdns_console_register()
+void mdns_console_register(void)
{
register_mdns_init();
register_mdns_free();
/**
* @brief Low level UDP PCB Initialize
*/
-static esp_err_t _udp_pcb_main_init()
+static esp_err_t _udp_pcb_main_init(void)
{
if(_pcb_main) {
return ESP_OK;
/**
* @brief Low level UDP PCB Free
*/
-static void _udp_pcb_main_deinit()
+static void _udp_pcb_main_deinit(void)
{
if(_pcb_main){
udp_recv(_pcb_main, NULL, NULL);
/**
* @brief Check if any of the interfaces is up
*/
-static bool _udp_pcb_is_in_use(){
+static bool _udp_pcb_is_in_use(void){
int i, p;
for (i=0; i<TCPIP_ADAPTER_IF_MAX; i++) {
for (p=0; p<MDNS_IP_PROTOCOL_MAX; p++) {
#include "esp32_mock.h"
-uint32_t xTaskGetTickCount();
+uint32_t xTaskGetTickCount(void);
#endif //MDNS_TEST_MODE
return ESP_OK;
}
-uint32_t xTaskGetTickCount()
+uint32_t xTaskGetTickCount(void)
{
struct timeval tv;
struct timezone tz;
memcpy(pvBuffer, g_queue, g_size);
}
-void ForceTaskDelete()
+void ForceTaskDelete(void)
{
g_queue_send_shall_fail = 1;
}
void GetLastItem(void *pvBuffer);
-void ForceTaskDelete();
+void ForceTaskDelete(void);
esp_err_t esp_event_handler_register(const char * event_base, int32_t event_id, void* event_handler, void* event_handler_arg);
static esp_err_t _mdns_send_search_action(mdns_action_type_t type, mdns_search_once_t * search);
static void _mdns_search_free(mdns_search_once_t * search);
-void mdns_test_init_di()
+void mdns_test_init_di(void)
{
mdns_test_static_execute_action = _mdns_execute_action;
mdns_test_static_mdns_get_service_item = _mdns_get_service_item;
mdns_search_once_t * mdns_test_search_init(const char * name, const char * service, const char * proto, uint16_t type, uint32_t timeout, uint8_t max_results);
esp_err_t mdns_test_send_search_action(mdns_action_type_t type, mdns_search_once_t * search);
void mdns_test_search_free(mdns_search_once_t * search);
-void mdns_test_init_di();
+void mdns_test_init_di(void);
//
// mdns function wrappers for mdns setup in test mode
return NULL;
}
-static void mdns_test_query_free()
+static void mdns_test_query_free(void)
{
mdns_test_search_free(search);
}
/* No-op function, used to force linking this file,
instead of the heap implementation from newlib.
*/
-void newlib_include_heap_impl()
+void newlib_include_heap_impl(void)
{
}
return 0;
}
-void malloc_stats()
+void malloc_stats(void)
{
}
return 0; // indicates failure
}
-struct mallinfo mallinfo()
+struct mallinfo mallinfo(void)
{
struct mallinfo dummy = {0};
return dummy;
/* No-op function, used to force linking this file,
instead of the dummy locks implementation from newlib.
*/
-void newlib_include_locks_impl()
+void newlib_include_locks_impl(void)
{
}
/**
* Clean up some of lazily allocated buffers in REENT structures.
*/
-void esp_reent_cleanup();
+void esp_reent_cleanup(void);
/**
* Function which sets up syscall table used by newlib functions in ROM.
* Called from the startup code, not intended to be called from application
* code.
*/
-void esp_setup_syscall_table();
+void esp_setup_syscall_table(void);
/**
* Update current microsecond time from RTC
*/
-void esp_set_time_from_rtc();
+void esp_set_time_from_rtc(void);
/*
* Sync counters RTC and FRC. Update boot_time.
*/
-void esp_sync_counters_rtc_and_frc();
+void esp_sync_counters_rtc_and_frc(void);
#endif //__ESP_NEWLIB_H__
return 0;
}
-void newlib_include_pthread_impl()
+void newlib_include_pthread_impl(void)
{
// Linker hook, exists for no other purpose
}
}
/* only declared in private stdio header file, local.h */
-extern void __sfp_lock_acquire();
-extern void __sfp_lock_release();
+extern void __sfp_lock_acquire(void);
+extern void __sfp_lock_release(void);
-void esp_reent_cleanup()
+void esp_reent_cleanup(void)
{
struct _reent* r = __getreent();
/* Clean up storage used by mprec functions */
#endif
};
-void esp_setup_syscall_table()
+void esp_setup_syscall_table(void)
{
syscall_table_ptr_pro = &s_stub_table;
syscall_table_ptr_app = &s_stub_table;
/* No-op function, used to force linking this file,
instead of the syscalls implementation from libgloss.
*/
-void newlib_include_syscalls_impl()
+void newlib_include_syscalls_impl(void)
{
}
#endif
#ifdef WITH_RTC
-static uint64_t get_rtc_time_us()
+static uint64_t get_rtc_time_us(void)
{
const uint64_t ticks = rtc_time_get();
const uint32_t cal = esp_clk_slowclk_cal_get();
// is how many microseconds total to slew
static int64_t adjtime_total_correction = 0;
#define ADJTIME_CORRECTION_FACTOR 6
-static uint64_t get_time_since_boot();
+static uint64_t get_time_since_boot(void);
#endif
// Offset between FRC timer and the RTC.
// Initialized after reset or light sleep.
_lock_release(&s_boot_time_lock);
}
-static uint64_t get_boot_time()
+static uint64_t get_boot_time(void)
{
uint64_t result;
_lock_acquire(&s_boot_time_lock);
}
// This function gradually changes boot_time to the correction value and immediately updates it.
-static uint64_t adjust_boot_time()
+static uint64_t adjust_boot_time(void)
{
uint64_t boot_time = get_boot_time();
if ((boot_time == 0) || (get_time_since_boot() < adjtime_start)) {
REG_WRITE(RTC_SLOW_CLK_CAL_REG, new_cal);
}
-uint32_t esp_clk_slowclk_cal_get()
+uint32_t esp_clk_slowclk_cal_get(void)
{
return REG_READ(RTC_SLOW_CLK_CAL_REG);
}
-void esp_set_time_from_rtc()
+void esp_set_time_from_rtc(void)
{
#if defined( WITH_FRC ) && defined( WITH_RTC )
// initialize time from RTC clock
}
#if defined( WITH_FRC ) || defined( WITH_RTC )
-static uint64_t get_time_since_boot()
+static uint64_t get_time_since_boot(void)
{
uint64_t microseconds = 0;
#ifdef WITH_FRC
#endif
}
-void esp_sync_counters_rtc_and_frc()
+void esp_sync_counters_rtc_and_frc(void)
{
#if defined( WITH_FRC ) && defined( WITH_RTC )
adjtime_corr_stop();
return esp_partition_erase_range(partition, 0, partition->size);
}
-extern "C" esp_err_t nvs_flash_erase()
+extern "C" esp_err_t nvs_flash_erase(void)
{
return nvs_flash_erase_partition(NVS_DEFAULT_PART_NAME);
}
/**
* @brief get the memory BIO method function
*/
-void *BIO_s_mem();
+void *BIO_s_mem(void);
/**
* @brief free a BIO object
/**
* @brief get the memory BIO method function
*/
-void *BIO_s_mem() {
+void *BIO_s_mem(void) {
return NULL;
}
* - protocomm_t* : On success
* - NULL : No memory for allocating new instance
*/
-protocomm_t *protocomm_new();
+protocomm_t *protocomm_new(void);
/**
* @brief Delete a protocomm instance
static const char *TAG = "protocomm";
-protocomm_t *protocomm_new()
+protocomm_t *protocomm_new(void)
{
protocomm_t *pc;
}
}
-simple_ble_cfg_t *simple_ble_init()
+simple_ble_cfg_t *simple_ble_init(void)
{
simple_ble_cfg_t *ble_cfg_p = (simple_ble_cfg_t *) malloc(sizeof(simple_ble_cfg_t));
if (ble_cfg_p == NULL) {
return ble_cfg_p;
}
-esp_err_t simple_ble_deinit()
+esp_err_t simple_ble_deinit(void)
{
free(g_ble_cfg_p->gatt_db);
free(g_ble_cfg_p);
return ESP_OK;
}
-esp_err_t simple_ble_stop()
+esp_err_t simple_ble_stop(void)
{
esp_err_t err;
ESP_LOGD(TAG, "Free mem at start of simple_ble_stop %d", esp_get_free_heap_size());
*
* @return simple_ble_cfg_t* Pointer to configuration structure
*/
-simple_ble_cfg_t *simple_ble_init();
+simple_ble_cfg_t *simple_ble_init(void);
/** Deallocates memory
*
*
* @return ESP_OK
*/
-esp_err_t simple_ble_deinit();
+esp_err_t simple_ble_deinit(void);
/** Starts BLE service
*
*
* @return ESP_OK on success, and appropriate error code for failure
*/
-esp_err_t simple_ble_stop();
+esp_err_t simple_ble_stop(void);
/** Convert handle to 128 bit UUID of characteristic
*
* @return
* A default configuration structure.
*/
-esp_pthread_cfg_t esp_pthread_get_default_config();
+esp_pthread_cfg_t esp_pthread_get_default_config(void);
/**
* @brief Configure parameters for creating pthread
return ESP_ERR_NOT_FOUND;
}
-static int get_default_pthread_core()
+static int get_default_pthread_core(void)
{
return CONFIG_PTHREAD_TASK_CORE_DEFAULT == -1 ? tskNO_AFFINITY : CONFIG_PTHREAD_TASK_CORE_DEFAULT;
}
-esp_pthread_cfg_t esp_pthread_get_default_config()
+esp_pthread_cfg_t esp_pthread_get_default_config(void)
{
esp_pthread_cfg_t cfg = {
.stack_size = CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT,
}
/* Hook function to force linking this file */
-void pthread_include_pthread_impl()
+void pthread_include_pthread_impl(void)
{
}
}
/* Hook function to force linking this file */
-void pthread_include_pthread_cond_var_impl()
+void pthread_include_pthread_cond_var_impl(void)
{
}
// limitations under the License.
#pragma once
-void pthread_internal_local_storage_destructor_callback();
+void pthread_internal_local_storage_destructor_callback(void);
#endif
/* this function called from pthread_task_func for "early" cleanup of TLS in a pthread */
-void pthread_internal_local_storage_destructor_callback()
+void pthread_internal_local_storage_destructor_callback(void)
{
void *tls = pvTaskGetThreadLocalStoragePointer(NULL, PTHREAD_TLS_INDEX);
if (tls != NULL) {
}
/* Hook function to force linking this file */
-void pthread_include_pthread_local_storage_impl()
+void pthread_include_pthread_local_storage_impl(void)
{
}
#define CD_WP_TEST_GPIO 18
-static void sd_test_board_power_on()
+static void sd_test_board_power_on(void)
{
gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_OUTPUT);
gpio_set_level(SD_TEST_BOARD_VSEL_GPIO, SD_TEST_BOARD_VSEL_3V3);
usleep(SD_TEST_BOARD_PWR_ON_DELAY_MS * 1000);
}
-static void sd_test_board_power_off()
+static void sd_test_board_power_off(void)
{
gpio_set_level(SD_TEST_BOARD_VSEL_EN_GPIO, 0);
gpio_set_direction(SD_TEST_BOARD_VSEL_GPIO, GPIO_MODE_INPUT);
}
/** Reset and put slave into download mode */
-static void reset_slave()
+static void reset_slave(void)
{
const int pin_en = 18;
const int pin_io0 = 19;
cpu_id == 0 ? RTC_CNTL_SW_PROCPU_RST_M : RTC_CNTL_SW_APPCPU_RST_M);
}
-bool IRAM_ATTR esp_cpu_in_ocd_debug_mode()
+bool IRAM_ATTR esp_cpu_in_ocd_debug_mode(void)
{
#if CONFIG_ESP32_DEBUG_OCDAWARE
int dcr;
/** @brief Read current stack pointer address
*
*/
-static inline void *get_sp()
+static inline void *get_sp(void)
{
void *sp;
asm volatile ("mov %0, sp;" : "=r" (sp));
asm volatile ("witlb %1, %0; isync\n" :: "r" (vpn), "r" (attr));
}
-static inline void cpu_init_memctl()
+static inline void cpu_init_memctl(void)
{
#if XCHAL_ERRATUM_572
uint32_t memctl = XCHAL_CACHE_MEMCTL_DEFAULT;
* 15 — no access, raise exception
*/
-static inline void cpu_configure_region_protection()
+static inline void cpu_configure_region_protection(void)
{
const uint32_t pages_to_protect[] = {0x00000000, 0x80000000, 0xa0000000, 0xc0000000, 0xe0000000};
for (int i = 0; i < sizeof(pages_to_protect)/sizeof(pages_to_protect[0]); ++i) {
* @note If "Make exception and panic handlers JTAG/OCD aware"
* is disabled, this function always returns false.
*/
-bool esp_cpu_in_ocd_debug_mode();
+bool esp_cpu_in_ocd_debug_mode(void);
/**
* @brief Convert the PC register value to its true address
*
* @return XTAL frequency, one of rtc_xtal_freq_t
*/
-rtc_xtal_freq_t rtc_clk_xtal_freq_get();
+rtc_xtal_freq_t rtc_clk_xtal_freq_get(void);
/**
* @brief Update XTAL frequency
/**
* @brief Configure 32 kHz XTAL oscillator to accept external clock signal
*/
-void rtc_clk_32k_enable_external();
+void rtc_clk_32k_enable_external(void);
/**
* @brief Get the state of 32k XTAL oscillator
* @return true if 32k XTAL oscillator has been enabled
*/
-bool rtc_clk_32k_enabled();
+bool rtc_clk_32k_enabled(void);
/**
* @brief Enable 32k oscillator, configuring it for fast startup time.
* @brief Get the state of 8 MHz internal oscillator
* @return true if the oscillator is enabled
*/
-bool rtc_clk_8m_enabled();
+bool rtc_clk_8m_enabled(void);
/**
* @brief Get the state of /256 divider which is applied to 8MHz clock
* @return true if the divided output is enabled
*/
-bool rtc_clk_8md256_enabled();
+bool rtc_clk_8md256_enabled(void);
/**
* @brief Enable or disable APLL
* @brief Get the RTC_SLOW_CLK source
* @return currently selected clock source (one of rtc_slow_freq_t values)
*/
-rtc_slow_freq_t rtc_clk_slow_freq_get();
+rtc_slow_freq_t rtc_clk_slow_freq_get(void);
/**
* @brief Get the approximate frequency of RTC_SLOW_CLK, in Hz
*
* @return RTC_SLOW_CLK frequency, in Hz
*/
-uint32_t rtc_clk_slow_freq_get_hz();
+uint32_t rtc_clk_slow_freq_get_hz(void);
/**
* @brief Select source for RTC_FAST_CLK
* @brief Get the RTC_FAST_CLK source
* @return currently selected clock source (one of rtc_fast_freq_t values)
*/
-rtc_fast_freq_t rtc_clk_fast_freq_get();
+rtc_fast_freq_t rtc_clk_fast_freq_get(void);
/**
* @brief Switch CPU frequency
*
* @return CPU frequency (one of rtc_cpu_freq_t values)
*/
-rtc_cpu_freq_t rtc_clk_cpu_freq_get() __attribute__((deprecated));
+rtc_cpu_freq_t rtc_clk_cpu_freq_get(void) __attribute__((deprecated));
/**
* @brief Get corresponding frequency value for rtc_cpu_freq_t enum value
* rtc_clk_cpu_freq_set_config when a switch to XTAL is needed.
* Assumes that XTAL frequency has been determined — don't call in startup code.
*/
- void rtc_clk_cpu_freq_set_xtal();
+ void rtc_clk_cpu_freq_set_xtal(void);
/**
* @brief Get the current stored APB frequency.
* @return The APB frequency value as last set via rtc_clk_apb_freq_update(), in Hz.
*/
-uint32_t rtc_clk_apb_freq_get();
+uint32_t rtc_clk_apb_freq_get(void);
#define RTC_CLK_CAL_FRACT 19 //!< Number of fractional bits in values returned by rtc_clk_cal
*
* @return current value of RTC counter
*/
-uint64_t rtc_time_get();
+uint64_t rtc_time_get(void);
/**
* @brief Busy loop until next RTC_SLOW_CLK cycle
* In some cases (e.g. when RTC_SLOW_CLK cycle is very close), it may return
* one RTC_SLOW_CLK cycle later.
*/
-void rtc_clk_wait_for_slow_cycle();
+void rtc_clk_wait_for_slow_cycle(void);
/**
* @brief sleep configuration for rtc_sleep_init function
* Otherwise, use default values and the level of MTDI bootstrapping pin.
* @return currently used VDDSDIO configuration
*/
-rtc_vddsdio_config_t rtc_vddsdio_get_config();
+rtc_vddsdio_config_t rtc_vddsdio_get_config(void);
/**
* Set new VDDSDIO configuration using RTC registers.
#define RTC_PLL_FREQ_320M 320
#define RTC_PLL_FREQ_480M 480
-static void rtc_clk_cpu_freq_to_8m();
-static void rtc_clk_bbpll_disable();
-static void rtc_clk_bbpll_enable();
+static void rtc_clk_cpu_freq_to_8m(void);
+static void rtc_clk_bbpll_disable(void);
+static void rtc_clk_bbpll_enable(void);
static void rtc_clk_cpu_freq_to_pll_mhz(int cpu_freq_mhz);
static bool rtc_clk_cpu_freq_from_mhz_internal(int mhz, rtc_cpu_freq_t* out_val);
}
}
-void rtc_clk_32k_enable_external()
+void rtc_clk_32k_enable_external(void)
{
rtc_clk_32k_enable_common(XTAL_32K_EXT_DAC_VAL, XTAL_32K_EXT_DRES_VAL, XTAL_32K_EXT_DBIAS_VAL);
}
XTAL_32K_BOOTSTRAP_DRES_VAL, XTAL_32K_BOOTSTRAP_DBIAS_VAL);
}
-bool rtc_clk_32k_enabled()
+bool rtc_clk_32k_enabled(void)
{
return GET_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_XPD_XTAL_32K) != 0;
}
}
}
-bool rtc_clk_8m_enabled()
+bool rtc_clk_8m_enabled(void)
{
return GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M) == 0;
}
-bool rtc_clk_8md256_enabled()
+bool rtc_clk_8md256_enabled(void)
{
return GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M_DIV) == 0;
}
ets_delay_us(DELAY_SLOW_CLK_SWITCH);
}
-rtc_slow_freq_t rtc_clk_slow_freq_get()
+rtc_slow_freq_t rtc_clk_slow_freq_get(void)
{
return REG_GET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ANA_CLK_RTC_SEL);
}
-uint32_t rtc_clk_slow_freq_get_hz()
+uint32_t rtc_clk_slow_freq_get_hz(void)
{
switch(rtc_clk_slow_freq_get()) {
case RTC_SLOW_FREQ_RTC: return RTC_SLOW_CLK_FREQ_150K;
ets_delay_us(DELAY_FAST_CLK_SWITCH);
}
-rtc_fast_freq_t rtc_clk_fast_freq_get()
+rtc_fast_freq_t rtc_clk_fast_freq_get(void)
{
return REG_GET_FIELD(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_FAST_CLK_RTC_SEL);
}
}
}
-static void rtc_clk_cpu_freq_to_8m()
+static void rtc_clk_cpu_freq_to_8m(void)
{
ets_update_cpu_frequency(8);
REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_WAK, DIG_DBIAS_XTAL);
rtc_clk_apb_freq_update(RTC_FAST_CLK_FREQ_8M);
}
-static void rtc_clk_bbpll_disable()
+static void rtc_clk_bbpll_disable(void)
{
SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG,
RTC_CNTL_BB_I2C_FORCE_PD | RTC_CNTL_BBPLL_FORCE_PD |
}
}
-static void rtc_clk_bbpll_enable()
+static void rtc_clk_bbpll_enable(void)
{
CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG,
RTC_CNTL_BIAS_I2C_FORCE_PD | RTC_CNTL_BB_I2C_FORCE_PD |
rtc_clk_cpu_freq_set_config_fast(&config);
}
-void rtc_clk_cpu_freq_set_xtal()
+void rtc_clk_cpu_freq_set_xtal(void)
{
int freq_mhz = (int) rtc_clk_xtal_freq_get();
rtc_clk_bbpll_disable();
}
-rtc_cpu_freq_t rtc_clk_cpu_freq_get()
+rtc_cpu_freq_t rtc_clk_cpu_freq_get(void)
{
rtc_cpu_freq_config_t config;
rtc_clk_cpu_freq_get_config(&config);
}
}
-rtc_xtal_freq_t rtc_clk_xtal_freq_get()
+rtc_xtal_freq_t rtc_clk_xtal_freq_get(void)
{
/* We may have already written XTAL value into RTC_XTAL_FREQ_REG */
uint32_t xtal_freq_reg = READ_PERI_REG(RTC_XTAL_FREQ_REG);
WRITE_PERI_REG(RTC_APB_FREQ_REG, clk_val_to_reg_val(apb_freq >> 12));
}
-uint32_t rtc_clk_apb_freq_get()
+uint32_t rtc_clk_apb_freq_get(void)
{
uint32_t freq_hz = reg_val_to_clk_val(READ_PERI_REG(RTC_APB_FREQ_REG)) << 12;
// round to the nearest MHz
/* Name used in libphy.a:phy_chip_v7.o
* TODO: update the library to use rtc_clk_xtal_freq_get
*/
-rtc_xtal_freq_t rtc_get_xtal() __attribute__((alias("rtc_clk_xtal_freq_get")));
+rtc_xtal_freq_t rtc_get_xtal(void) __attribute__((alias("rtc_clk_xtal_freq_get")));
*/
#define XTAL_FREQ_EST_CYCLES 10
-static rtc_xtal_freq_t rtc_clk_xtal_freq_estimate();
+static rtc_xtal_freq_t rtc_clk_xtal_freq_estimate(void);
static const char* TAG = "rtc_clk_init";
rtc_clk_slow_freq_set(cfg.slow_freq);
}
-static rtc_xtal_freq_t rtc_clk_xtal_freq_estimate()
+static rtc_xtal_freq_t rtc_clk_xtal_freq_estimate(void)
{
/* Enable 8M/256 clock if needed */
const bool clk_8m_enabled = rtc_clk_8m_enabled();
}
}
-rtc_vddsdio_config_t rtc_vddsdio_get_config()
+rtc_vddsdio_config_t rtc_vddsdio_get_config(void)
{
rtc_vddsdio_config_t result;
uint32_t sdio_conf_reg = REG_READ(RTC_CNTL_SDIO_CONF_REG);
/* These MAC-related functions are defined in the closed source part of
* RTC library
*/
-extern void pm_mac_init();
-extern int pm_check_mac_idle();
-extern void pm_mac_deinit();
+extern void pm_mac_init(void);
+extern int pm_check_mac_idle(void);
+extern void pm_mac_deinit(void);
/* This sleep-related function is called from the closed source part of RTC
* library.
*/
-pm_sw_reject_t pm_set_sleep_mode(pm_sleep_mode_t sleep_mode, void(*pmac_save_params)())
+pm_sw_reject_t pm_set_sleep_mode(pm_sleep_mode_t sleep_mode, void(*pmac_save_params)(void))
{
(void) pmac_save_params; /* unused */
return (rtc_cycles * period) >> RTC_CLK_CAL_FRACT;
}
-uint64_t rtc_time_get()
+uint64_t rtc_time_get(void)
{
SET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_UPDATE);
while (GET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_VALID) == 0) {
return t;
}
-void rtc_clk_wait_for_slow_cycle()
+void rtc_clk_wait_for_slow_cycle(void)
{
REG_CLR_BIT(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_START_CYCLING | TIMG_RTC_CALI_START);
REG_CLR_BIT(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY);
#include "soc/rtc.h"
-bool rtc_wdt_get_protect_status()
+bool rtc_wdt_get_protect_status(void)
{
return READ_PERI_REG(RTC_CNTL_WDTWPROTECT_REG) != RTC_CNTL_WDT_WKEY_VALUE;
}
-void rtc_wdt_protect_off()
+void rtc_wdt_protect_off(void)
{
WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
}
-void rtc_wdt_protect_on()
+void rtc_wdt_protect_on(void)
{
WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, 0);
}
-void rtc_wdt_enable()
+void rtc_wdt_enable(void)
{
REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
SET_PERI_REG_MASK(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN | RTC_CNTL_WDT_PAUSE_IN_SLP);
}
-void rtc_wdt_flashboot_mode_enable()
+void rtc_wdt_flashboot_mode_enable(void)
{
REG_SET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
}
-void rtc_wdt_disable()
+void rtc_wdt_disable(void)
{
bool protect = rtc_wdt_get_protect_status();
if (protect) {
}
}
-void rtc_wdt_feed()
+void rtc_wdt_feed(void)
{
bool protect = rtc_wdt_get_protect_status();
if (protect) {
return ESP_OK;
}
-bool rtc_wdt_is_on()
+bool rtc_wdt_is_on(void)
{
return (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN) != 0) || (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN) != 0);
}
#define COUNT_TEST 3
#define TIMEOUT_TEST_MS (5 + CONFIG_ESP32_RTC_CLK_CAL_CYCLES / 16)
-void stop_rtc_external_quartz(){
+void stop_rtc_external_quartz(void){
const uint8_t pin_32 = 32;
const uint8_t pin_33 = 33;
const uint8_t mask_32 = (1 << (pin_32 - 32));
* @return
* - True if the protect of RTC_WDT is set
*/
-bool rtc_wdt_get_protect_status();
+bool rtc_wdt_get_protect_status(void);
/**
* @brief Set protect of rtc_wdt.
*/
-void rtc_wdt_protect_on();
+void rtc_wdt_protect_on(void);
/**
* @brief Reset protect of rtc_wdt.
*/
-void rtc_wdt_protect_off();
+void rtc_wdt_protect_off(void);
/**
* @brief Enable rtc_wdt.
*/
-void rtc_wdt_enable();
+void rtc_wdt_enable(void);
/**
* @brief Enable the flash boot protection procedure for WDT.
* This function was added to be compatibility with the old bootloaders.
* This mode is disabled in bootloader or using rtc_wdt_disable() function.
*/
-void rtc_wdt_flashboot_mode_enable();
+void rtc_wdt_flashboot_mode_enable(void);
/**
* @brief Disable rtc_wdt.
*/
-void rtc_wdt_disable();
+void rtc_wdt_disable(void);
/**
* @brief Reset counter rtc_wdt.
*
* It returns to stage 0 and its expiry counter restarts from 0.
*/
-void rtc_wdt_feed();
+void rtc_wdt_feed(void);
/**
* @brief Set time for required stage.
* @return
* - True rtc_wdt is enabled
*/
-bool rtc_wdt_is_on();
+bool rtc_wdt_is_on(void);
#ifdef __cplusplus
}
* returned by soc_get_available_memory_regions(). Used to size the
* array passed to that function.
*/
-size_t soc_get_available_memory_region_max_count();
+size_t soc_get_available_memory_region_max_count(void);
inline static bool IRAM_ATTR esp_ptr_dma_capable(const void *p)
{
/* static DRAM & IRAM chunks */
static const size_t EXTRA_RESERVED_REGIONS = 2;
-static size_t s_get_num_reserved_regions()
+static size_t s_get_num_reserved_regions(void)
{
return ( ( &soc_reserved_memory_region_end
- &soc_reserved_memory_region_start ) +
EXTRA_RESERVED_REGIONS );
}
-size_t soc_get_available_memory_region_max_count()
+size_t soc_get_available_memory_region_max_count(void)
{
/* Worst-case: each reserved memory region splits an available
region in two, so the maximum possible number of regions
static volatile int s_flash_op_cpu = -1;
#endif
-void spi_flash_init_lock()
+void spi_flash_init_lock(void)
{
s_flash_op_mutex = xSemaphoreCreateRecursiveMutex();
assert(s_flash_op_mutex != NULL);
}
-void spi_flash_op_lock()
+void spi_flash_op_lock(void)
{
xSemaphoreTakeRecursive(s_flash_op_mutex, portMAX_DELAY);
}
-void spi_flash_op_unlock()
+void spi_flash_op_unlock(void)
{
xSemaphoreGiveRecursive(s_flash_op_mutex);
}
xTaskResumeAll();
}
-void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu()
+void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu(void)
{
spi_flash_op_lock();
spi_flash_disable_cache(other_cpuid, &s_flash_op_cache_state[other_cpuid]);
}
-void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu()
+void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu(void)
{
const uint32_t cpuid = xPortGetCoreID();
const uint32_t other_cpuid = (cpuid == 0) ? 1 : 0;
spi_flash_op_unlock();
}
-void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu_no_os()
+void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu_no_os(void)
{
const uint32_t cpuid = xPortGetCoreID();
const uint32_t other_cpuid = (cpuid == 0) ? 1 : 0;
spi_flash_disable_cache(cpuid, &s_flash_op_cache_state[cpuid]);
}
-void IRAM_ATTR spi_flash_enable_interrupts_caches_no_os()
+void IRAM_ATTR spi_flash_enable_interrupts_caches_no_os(void)
{
const uint32_t cpuid = xPortGetCoreID();
#else // CONFIG_FREERTOS_UNICORE
-void spi_flash_init_lock()
+void spi_flash_init_lock(void)
{
}
-void spi_flash_op_lock()
+void spi_flash_op_lock(void)
{
vTaskSuspendAll();
}
-void spi_flash_op_unlock()
+void spi_flash_op_unlock(void)
{
xTaskResumeAll();
}
-void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu()
+void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu(void)
{
spi_flash_op_lock();
esp_intr_noniram_disable();
spi_flash_disable_cache(0, &s_flash_op_cache_state[0]);
}
-void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu()
+void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu(void)
{
spi_flash_restore_cache(0, s_flash_op_cache_state[0]);
esp_intr_noniram_enable();
spi_flash_op_unlock();
}
-void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu_no_os()
+void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu_no_os(void)
{
// Kill interrupts that aren't located in IRAM
esp_intr_noniram_disable();
spi_flash_disable_cache(0, &s_flash_op_cache_state[0]);
}
-void IRAM_ATTR spi_flash_enable_interrupts_caches_no_os()
+void IRAM_ATTR spi_flash_enable_interrupts_caches_no_os(void)
{
// Re-enable cache on this CPU
spi_flash_restore_cache(0, s_flash_op_cache_state[0]);
}
-IRAM_ATTR bool spi_flash_cache_enabled()
+IRAM_ATTR bool spi_flash_cache_enabled(void)
{
bool result = (DPORT_REG_GET_BIT(DPORT_PRO_CACHE_CTRL_REG, DPORT_PRO_CACHE_ENABLE) != 0);
#if portNUM_PROCESSORS == 2
*/
// Init mutex protecting access to spi_flash_* APIs
-void spi_flash_init_lock();
+void spi_flash_init_lock(void);
// Take mutex protecting access to spi_flash_* APIs
-void spi_flash_op_lock();
+void spi_flash_op_lock(void);
// Release said mutex
-void spi_flash_op_unlock();
+void spi_flash_op_unlock(void);
// Suspend the scheduler on both CPUs, disable cache.
// Contrary to its name this doesn't do anything with interrupts, yet.
// Interrupt disabling capability will be added once we implement
// interrupt allocation API.
-void spi_flash_disable_interrupts_caches_and_other_cpu();
+void spi_flash_disable_interrupts_caches_and_other_cpu(void);
// Enable cache, enable interrupts (to be added in future), resume scheduler
-void spi_flash_enable_interrupts_caches_and_other_cpu();
+void spi_flash_enable_interrupts_caches_and_other_cpu(void);
// Disables non-IRAM interrupt handlers on current CPU and caches on both CPUs.
// This function is implied to be called when other CPU is not running or running code from IRAM.
-void spi_flash_disable_interrupts_caches_and_other_cpu_no_os();
+void spi_flash_disable_interrupts_caches_and_other_cpu_no_os(void);
// Enable cache, enable interrupts on current CPU.
// This function is implied to be called when other CPU is not running or running code from IRAM.
-void spi_flash_enable_interrupts_caches_no_os();
+void spi_flash_enable_interrupts_caches_no_os(void);
// Flushes cache if address range has corresponding valid cache mappings
// Recommended to use post flash program operation (erase or write)
return spi_flash_translate_rc(err);
}
-esp_err_t spi_flash_unlock()
+esp_err_t spi_flash_unlock(void)
{
esp_err_t err = esp_flash_set_chip_write_protect(NULL, false);
return spi_flash_translate_rc(err);
esp_flash_t *esp_flash_default_chip = NULL;
-esp_err_t esp_flash_init_default_chip()
+esp_err_t esp_flash_init_default_chip(void)
{
memspi_host_config_t cfg = ESP_FLASH_HOST_CONFIG_DEFAULT();
//the host is already initialized, only do init for the data and load it to the host
return ESP_OK;
}
-esp_err_t esp_flash_app_init()
+esp_err_t esp_flash_app_init(void)
{
return esp_flash_init_os_functions(&default_chip, 0);
}
static uint32_t s_mmap_last_handle = 0;
-static void IRAM_ATTR spi_flash_mmap_init()
+static void IRAM_ATTR spi_flash_mmap_init(void)
{
if (s_mmap_page_refcnt[0] != 0) {
return; /* mmap data already initialised */
free(it);
}
-static void IRAM_ATTR NOINLINE_ATTR spi_flash_protected_mmap_init()
+static void IRAM_ATTR NOINLINE_ATTR spi_flash_protected_mmap_init(void)
{
spi_flash_disable_interrupts_caches_and_other_cpu();
spi_flash_mmap_init();
return value;
}
-void spi_flash_mmap_dump()
+void spi_flash_mmap_dump(void)
{
spi_flash_protected_mmap_init();
}
-void spi_flash_init()
+void spi_flash_init(void)
{
spi_flash_init_lock();
#if CONFIG_SPI_FLASH_ENABLE_COUNTERS
s_flash_guard_ops = funcs;
}
-const spi_flash_guard_funcs_t *IRAM_ATTR spi_flash_guard_get()
+const spi_flash_guard_funcs_t *IRAM_ATTR spi_flash_guard_get(void)
{
return s_flash_guard_ops;
}
-size_t IRAM_ATTR spi_flash_get_chip_size()
+size_t IRAM_ATTR spi_flash_get_chip_size(void)
{
return g_rom_flashchip.chip_size;
}
-static inline void IRAM_ATTR spi_flash_guard_start()
+static inline void IRAM_ATTR spi_flash_guard_start(void)
{
if (s_flash_guard_ops && s_flash_guard_ops->start) {
s_flash_guard_ops->start();
}
}
-static inline void IRAM_ATTR spi_flash_guard_end()
+static inline void IRAM_ATTR spi_flash_guard_end(void)
{
if (s_flash_guard_ops && s_flash_guard_ops->end) {
s_flash_guard_ops->end();
}
}
-static inline void IRAM_ATTR spi_flash_guard_op_lock()
+static inline void IRAM_ATTR spi_flash_guard_op_lock(void)
{
if (s_flash_guard_ops && s_flash_guard_ops->op_lock) {
s_flash_guard_ops->op_lock();
}
}
-static inline void IRAM_ATTR spi_flash_guard_op_unlock()
+static inline void IRAM_ATTR spi_flash_guard_op_unlock(void)
{
if (s_flash_guard_ops && s_flash_guard_ops->op_unlock) {
s_flash_guard_ops->op_unlock();
}
#ifdef CONFIG_SPI_FLASH_USE_LEGACY_IMPL
-static esp_rom_spiflash_result_t IRAM_ATTR spi_flash_unlock()
+static esp_rom_spiflash_result_t IRAM_ATTR spi_flash_unlock(void)
{
static bool unlocked = false;
if (!unlocked) {
return ESP_ROM_SPIFLASH_RESULT_OK;
}
#else
-static esp_rom_spiflash_result_t IRAM_ATTR spi_flash_unlock()
+static esp_rom_spiflash_result_t IRAM_ATTR spi_flash_unlock(void)
{
esp_err_t err = esp_flash_set_chip_write_protect(NULL, false);
if (err != ESP_OK) {
counter->count, counter->time, counter->bytes);
}
-const spi_flash_counters_t *spi_flash_get_counters()
+const spi_flash_counters_t *spi_flash_get_counters(void)
{
return &s_flash_stats;
}
-void spi_flash_reset_counters()
+void spi_flash_reset_counters(void)
{
memset(&s_flash_stats, 0, sizeof(s_flash_stats));
}
-void spi_flash_dump_counters()
+void spi_flash_dump_counters(void)
{
dump_counter(&s_flash_stats.read, "read ");
dump_counter(&s_flash_stats.write, "write");
*
* Called by OS startup code. You do not need to call this in your own applications.
*/
-esp_err_t esp_flash_init_default_chip();
+esp_err_t esp_flash_init_default_chip(void);
/**
* Enable OS-level SPI flash protections in IDF
*
* @return ESP_OK if success, otherwise failed. See return value of ``esp_flash_init_os_functions``.
*/
-esp_err_t esp_flash_app_init();
+esp_err_t esp_flash_app_init(void);
/**
* Enable OS-level SPI flash for a specific chip.
* no need to call it from application code.
*
*/
-void spi_flash_init();
+void spi_flash_init(void);
/**
* @brief Get flash chip size, as set in binary image header
*
* @return size of flash chip, in bytes
*/
-size_t spi_flash_get_chip_size();
+size_t spi_flash_get_chip_size(void);
/**
* @brief Erase the Flash sector.
* of pages allocated to each handle. It also lists all non-zero entries of
* MMU table and corresponding reference counts.
*/
-void spi_flash_mmap_dump();
+void spi_flash_mmap_dump(void);
/**
* @brief get free pages number which can be mmap
*
* @return true if both CPUs have flash cache enabled, false otherwise.
*/
-bool spi_flash_cache_enabled();
+bool spi_flash_cache_enabled(void);
/**
* @brief SPI flash critical section enter function.
* @return The guard functions that were set via spi_flash_guard_set(). These functions
* can be called if implementing custom low-level SPI flash operations.
*/
-const spi_flash_guard_funcs_t *spi_flash_guard_get();
+const spi_flash_guard_funcs_t *spi_flash_guard_get(void);
/**
* @brief Default OS-aware flash access guard functions
/**
* @brief Reset SPI flash operation counters
*/
-void spi_flash_reset_counters();
+void spi_flash_reset_counters(void);
/**
* @brief Print SPI flash operation counters
*/
-void spi_flash_dump_counters();
+void spi_flash_dump_counters(void);
/**
* @brief Return current SPI flash operation counters
* @return pointer to the spi_flash_counters_t structure holding values
* of the operation counters
*/
-const spi_flash_counters_t* spi_flash_get_counters();
+const spi_flash_counters_t* spi_flash_get_counters(void);
#endif //CONFIG_SPI_FLASH_ENABLE_COUNTERS
static esp_partition_iterator_opaque_t* iterator_create(esp_partition_type_t type, esp_partition_subtype_t subtype, const char* label);
-static esp_err_t load_partitions();
+static esp_err_t load_partitions(void);
static SLIST_HEAD(partition_list_head_, partition_list_item_) s_partition_list =
// Create linked list of partition_list_item_t structures.
// This function is called only once, with s_partition_list_lock taken.
-static esp_err_t load_partitions()
+static esp_err_t load_partitions(void)
{
const uint32_t* ptr;
spi_flash_mmap_handle_t handle;
return;
}
-extern "C" int spi_flash_get_total_erase_cycles()
+extern "C" int spi_flash_get_total_erase_cycles(void)
{
return spiflash.get_total_erase_cycles();
}
return true;
}
-esp_rom_spiflash_result_t esp_rom_spiflash_unlock()
+esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void)
{
return ESP_ROM_SPIFLASH_RESULT_OK;
}
-void spi_flash_init_lock()
+void spi_flash_init_lock(void)
{
return;
}
-void spi_flash_op_lock()
+void spi_flash_op_lock(void)
{
return;
}
-void spi_flash_op_unlock()
+void spi_flash_op_unlock(void)
{
return;
}
-void spi_flash_disable_interrupts_caches_and_other_cpu()
+void spi_flash_disable_interrupts_caches_and_other_cpu(void)
{
return;
}
-void spi_flash_enable_interrupts_caches_and_other_cpu()
+void spi_flash_enable_interrupts_caches_and_other_cpu(void)
{
return;
}
-void spi_flash_disable_interrupts_caches_and_other_cpu_no_os()
+void spi_flash_disable_interrupts_caches_and_other_cpu_no_os(void)
{
return;
}
-void spi_flash_enable_interrupts_caches_no_os()
+void spi_flash_enable_interrupts_caches_no_os(void)
{
return;
}
va_end(arg);
}
-uint32_t esp_log_timestamp()
+uint32_t esp_log_timestamp(void)
{
return 0;
}
about interrupts, CPU coordination, flash mapping. However some of
the functions in esp_spi_flash.c call it.
*/
-esp_rom_spiflash_result_t esp_rom_spiflash_unlock()
+esp_rom_spiflash_result_t esp_rom_spiflash_unlock(void)
{
uint32_t status;
}
-esp_rom_spiflash_result_t esp_rom_spiflash_lock()
+esp_rom_spiflash_result_t esp_rom_spiflash_lock(void)
{
uint32_t status;
return ESP_ROM_SPIFLASH_RESULT_OK;
}
-esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip()
+esp_rom_spiflash_result_t esp_rom_spiflash_erase_chip(void)
{
if ( ESP_ROM_SPIFLASH_RESULT_OK != esp_rom_spiflash_enable_write(&g_rom_spiflash_chip)) {
return ESP_ROM_SPIFLASH_RESULT_ERR;
TEST_ESP_OK(err);
}
-void teardown_test_chip()
+void teardown_test_chip(void)
{
spi_bus_remove_flash_device(test_chip);
test_chip = NULL;
static size_t start;
-static void setup_tests()
+static void setup_tests(void)
{
if (start == 0) {
const esp_partition_t *part = get_test_data_partition();
static spi_flash_mmap_handle_t handle1, handle2, handle3;
-static void setup_mmap_tests()
+static void setup_mmap_tests(void)
{
if (start == 0) {
const esp_partition_t *part = get_test_data_partition();
/* Base offset in flash for tests. */
static size_t start;
-static void setup_tests()
+static void setup_tests(void)
{
if (start == 0) {
const esp_partition_t *part = get_test_data_partition();
}
-static void test_setup()
+static void test_setup(void)
{
esp_vfs_spiffs_conf_t conf = {
.base_path = "/spiffs",
TEST_ESP_OK(esp_vfs_spiffs_register(&conf));
}
-static void test_teardown()
+static void test_teardown(void)
{
TEST_ESP_OK(esp_vfs_spiffs_unregister(spiffs_test_partition_label));
}
*
* @return A handle can hold all transports
*/
-esp_transport_list_handle_t esp_transport_list_init();
+esp_transport_list_handle_t esp_transport_list_init(void);
/**
* @brief Cleanup and free all transports, include itself,
*
* @return The transport handle
*/
-esp_transport_handle_t esp_transport_init();
+esp_transport_handle_t esp_transport_init(void);
/**
* @brief Cleanup and free memory the transport
*
* @return the allocated esp_transport_handle_t, or NULL if the handle can not be allocated
*/
-esp_transport_handle_t esp_transport_ssl_init();
+esp_transport_handle_t esp_transport_ssl_init(void);
/**
* @brief Set SSL certificate data (as PEM format).
*
* @return the allocated esp_transport_handle_t, or NULL if the handle can not be allocated
*/
-esp_transport_handle_t esp_transport_tcp_init();
+esp_transport_handle_t esp_transport_tcp_init(void);
#ifdef __cplusplus
return t;
}
-esp_transport_list_handle_t esp_transport_list_init()
+esp_transport_list_handle_t esp_transport_list_init(void)
{
esp_transport_list_handle_t transport = calloc(1, sizeof(esp_transport_internal_t));
ESP_TRANSPORT_MEM_CHECK(TAG, transport, return NULL);
return ESP_OK;
}
-esp_transport_handle_t esp_transport_init()
+esp_transport_handle_t esp_transport_init(void)
{
esp_transport_handle_t t = calloc(1, sizeof(struct esp_transport_item_t));
ESP_TRANSPORT_MEM_CHECK(TAG, t, return NULL);
}
}
-esp_transport_handle_t esp_transport_ssl_init()
+esp_transport_handle_t esp_transport_ssl_init(void)
{
esp_transport_handle_t t = esp_transport_init();
transport_ssl_t *ssl = calloc(1, sizeof(transport_ssl_t));
return 0;
}
-esp_transport_handle_t esp_transport_tcp_init()
+esp_transport_handle_t esp_transport_tcp_init(void)
{
esp_transport_handle_t t = esp_transport_init();
transport_tcp_t *tcp = calloc(1, sizeof(transport_tcp_t));
}
-esp_err_t tcpip_adapter_set_default_wifi_handlers()
+esp_err_t tcpip_adapter_set_default_wifi_handlers(void)
{
esp_err_t err;
err = esp_event_handler_register(WIFI_EVENT, WIFI_EVENT_STA_START, handle_sta_start, NULL);
return err;
}
-esp_err_t tcpip_adapter_clear_default_wifi_handlers()
+esp_err_t tcpip_adapter_clear_default_wifi_handlers(void)
{
esp_event_handler_unregister(WIFI_EVENT, WIFI_EVENT_STA_START, handle_sta_start);
esp_event_handler_unregister(WIFI_EVENT, WIFI_EVENT_STA_STOP, handle_sta_stop);
return ESP_OK;
}
-esp_err_t tcpip_adapter_set_default_eth_handlers()
+esp_err_t tcpip_adapter_set_default_eth_handlers(void)
{
esp_err_t err;
err = esp_event_handler_register(ETH_EVENT, ETHERNET_EVENT_START, handle_eth_start, NULL);
return err;
}
-esp_err_t tcpip_adapter_clear_default_eth_handlers()
+esp_err_t tcpip_adapter_clear_default_eth_handlers(void)
{
esp_event_handler_unregister(ETH_EVENT, ETHERNET_EVENT_START, handle_eth_start);
esp_event_handler_unregister(ETH_EVENT, ETHERNET_EVENT_STOP, handle_eth_stop);
* - ESP_OK on success
* - one of the errors from esp_event on failure
*/
-esp_err_t tcpip_adapter_set_default_eth_handlers();
+esp_err_t tcpip_adapter_set_default_eth_handlers(void);
/**
* @brief Uninstall default event handlers for Ethernet interface
* - ESP_OK on success
* - one of the errors from esp_event on failure
*/
-esp_err_t tcpip_adapter_clear_default_eth_handlers();
+esp_err_t tcpip_adapter_clear_default_eth_handlers(void);
/**
* @brief Install default event handlers for Wi-Fi interfaces (station and AP)
* - ESP_OK on success
* - one of the errors from esp_event on failure
*/
-esp_err_t tcpip_adapter_set_default_wifi_handlers();
+esp_err_t tcpip_adapter_set_default_wifi_handlers(void);
/**
* @brief Uninstall default event handlers for Wi-Fi interfaces (station and AP)
* - ESP_OK on success
* - one of the errors from esp_event on failure
*/
-esp_err_t tcpip_adapter_clear_default_wifi_handlers();
+esp_err_t tcpip_adapter_clear_default_wifi_handlers(void);
/**
* @brief Search nefit index through netif interface
void unity_run_tests_by_tag(const char *tag, bool invert);
-void unity_run_all_tests();
+void unity_run_all_tests(void);
-void unity_run_menu();
+void unity_run_menu(void);
}
}
-void unity_flush()
+void unity_flush(void)
{
uart_tx_wait_idle(CONFIG_ESP_CONSOLE_UART_NUM);
}
}
}
-void unity_run_all_tests()
+void unity_run_all_tests(void)
{
for (const test_desc_t *test = s_unity_tests_first; test != NULL; test = test->next) {
unity_run_single_test(test);
return test_counter;
}
-void unity_run_menu()
+void unity_run_menu(void)
{
UNITY_PRINT_EOL();
UNITY_PRINT_EOL();
*
* This function is called from startup code to enable serial output
*/
-void esp_vfs_dev_uart_register();
+void esp_vfs_dev_uart_register(void);
/**
* @brief Set the line endings expected to be received on UART
uart_driver_delete(UART_NUM_2);
}
-static inline void test_spi_flash_setup()
+static inline void test_spi_flash_setup(void)
{
esp_vfs_fat_sdmmc_mount_config_t mount_config = {
.format_if_mount_failed = true,
TEST_ESP_OK(esp_vfs_fat_spiflash_mount("/spiflash", NULL, &mount_config, &test_wl_handle));
}
-static inline void test_spi_flash_teardown()
+static inline void test_spi_flash_teardown(void)
{
TEST_ESP_OK(esp_vfs_fat_spiflash_unmount("/spiflash", test_wl_handle));
}
static const char message[] = "Hello world!";
-static int open_dummy_socket()
+static int open_dummy_socket(void)
{
const struct addrinfo hints = {
.ai_family = AF_INET,
return dummy_socket_fd;
}
-static int socket_init()
+static int socket_init(void)
{
const struct addrinfo hints = {
.ai_family = AF_INET,
return socket_fd;
}
-static void uart1_init()
+static void uart1_init(void)
{
uart_config_t uart_config = {
.baud_rate = 115200,
UART0.conf0.loopback = 0;
}
-static void flush_stdin_stdout()
+static void flush_stdin_stdout(void)
{
vTaskDelay(10 / portTICK_PERIOD_MS);
char *bitbucket = (char*) 0x3f000000;
return ret;
}
-void vfs_include_syscalls_impl()
+void vfs_include_syscalls_impl(void)
{
// Linker hook function, exists to make the linker examine this fine
}
static fd_set *_errorfds_orig = NULL;
-static void uart_end_select();
+static void uart_end_select(void);
static int uart_open(const char * path, int flags, int mode)
return ESP_OK;
}
-static void uart_end_select()
+static void uart_end_select(void)
{
portENTER_CRITICAL(uart_get_selectlock());
for (int i = 0; i < UART_NUM; ++i) {
}
#endif // CONFIG_VFS_SUPPORT_TERMIOS
-void esp_vfs_dev_uart_register()
+void esp_vfs_dev_uart_register(void)
{
esp_vfs_t vfs = {
.flags = ESP_VFS_FLAG_DEFAULT,
esp_wifi_deauthenticate_internal(reason_code);
}
-void wpa_config_profile()
+void wpa_config_profile(void)
{
if (esp_wifi_sta_prof_is_wpa_internal()) {
wpa_set_profile(WPA_PROTO_WPA, esp_wifi_sta_get_prof_authmode_internal());
}
}
-void wpa_neg_complete()
+void wpa_neg_complete(void)
{
esp_wifi_auth_done_internal();
}
ESP_ERROR_CHECK(esp_timer_create(&periodic_timer_args, &periodic_timer));
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
} while (0);
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
esp_eddystone_appRegister();
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
ESP_ERROR_CHECK(esp_bt_controller_mem_release(ESP_BT_MODE_CLASSIC_BT));
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
ble_ibeacon_appRegister();
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
ESP_ERROR_CHECK(esp_bt_controller_mem_release(ESP_BT_MODE_CLASSIC_BT));
xTaskCreate(uart_task, "uTask", 2048, (void*)UART_NUM_0, 8, NULL);
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
} while (0);
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
esp_bt_controller_config_t bt_cfg = BT_CONTROLLER_INIT_CONFIG_DEFAULT();
}
}
-void app_main()
+void app_main(void)
{
// Initialize NVS.
esp_err_t ret = nvs_flash_init();
}
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
}
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
} while (0);
}
-void app_main()
+void app_main(void)
{
// Initialize NVS.
esp_err_t ret = nvs_flash_init();
} while (0);
}
-void app_main()
+void app_main(void)
{
// Initialize NVS.
esp_err_t ret = nvs_flash_init();
} while (0);
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
} while (0);
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
} while (0);
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
} while (0);
}
-void app_main()
+void app_main(void)
{
esp_err_t ret = nvs_flash_init();
if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
static void bt_av_hdl_stack_evt(uint16_t event, void *p_param);
-void app_main()
+void app_main(void)
{
/* Initialize NVS — it is used to store PHY calibration data */
esp_err_t err = nvs_flash_init();
return str;
}
-void app_main()
+void app_main(void)
{
// Initialize NVS.
esp_err_t ret = nvs_flash_init();
esp_bt_gap_start_discovery(ESP_BT_INQ_MODE_GENERAL_INQUIRY, 10, 0);
}
-void app_main()
+void app_main(void)
{
/* Initialize NVS — it is used to store PHY calibration data */
esp_err_t ret = nvs_flash_init();
return;
}
-void app_main()
+void app_main(void)
{
esp_err_t ret = nvs_flash_init();
if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
}
}
-void app_main()
+void app_main(void)
{
for (int i = 0; i < SPP_DATA_LEN; ++i) {
spp_data[i] = i;
return;
}
-void app_main()
+void app_main(void)
{
esp_err_t ret = nvs_flash_init();
if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
spp_task_work_dispatch(esp_spp_cb, event, param, sizeof(esp_spp_cb_param_t), NULL);
}
-void app_main()
+void app_main(void)
{
for (int i = 0; i < SPP_DATA_LEN; ++i) {
spp_data[i] = i;
}
}
-void app_main()
+void app_main(void)
{
/* Initialize NVS — it is used to store PHY calibration data */
esp_err_t err = nvs_flash_init();
} while (0);
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
#endif
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
}
}
-void app_main()
+void app_main(void)
{
/* Initialize NVS — it is used to store PHY calibration data */
esp_err_t ret = nvs_flash_init();
return comp;
}
-void ble_mesh_node_init()
+void ble_mesh_node_init(void)
{
uint16_t i;
xSemaphoreGive(ble_mesh_node_sema);
}
-void ble_mesh_node_statistics_get()
+void ble_mesh_node_statistics_get(void)
{
xSemaphoreTake(ble_mesh_node_sema, portMAX_DELAY);
ESP_LOGI(TAG, "statistics:%d,%d\n", ble_mesh_node_statistics.statistics, ble_mesh_node_statistics.package_num);
return 0;
}
-void ble_mesh_node_statistics_destroy()
+void ble_mesh_node_statistics_destroy(void)
{
if (ble_mesh_node_statistics.package_index != NULL) {
free(ble_mesh_node_statistics.package_index);
} \
}while(0) \
-void ble_mesh_node_init();
+void ble_mesh_node_init(void);
void ble_mesh_set_node_prestore_params(uint16_t netkey_index, uint16_t unicast_addr);
esp_ble_mesh_model_t *ble_mesh_get_model(uint16_t model_id);
esp_ble_mesh_comp_t *ble_mesh_get_component(uint16_t model_id);
-void ble_mesh_node_statistics_get();
+void ble_mesh_node_statistics_get(void);
int ble_mesh_node_statistics_accumultate(uint8_t *data, uint32_t value, uint16_t type);
int ble_mesh_node_statistics_init(uint16_t package_num);
-void ble_mesh_node_statistics_destroy();
+void ble_mesh_node_statistics_destroy(void);
#endif //_BLE_MESH_ADAOTER_H_
#include "esp_ble_mesh_defs.h"
// Register system functions
-void register_system();
+void register_system(void);
// Register blutooth
-void register_bluetooth();
+void register_bluetooth(void);
// Register mesh node cmd
-void ble_mesh_register_mesh_node();
+void ble_mesh_register_mesh_node(void);
// Register mesh config server and generic server operation cmd
-void ble_mesh_register_server();
+void ble_mesh_register_server(void);
#if (CONFIG_BLE_MESH_CFG_CLI)
// Register mesh config client operation cmd
-void ble_mesh_register_configuration_client_model();
+void ble_mesh_register_configuration_client_model(void);
#endif
#define MOUNT_PATH "/data"
#define HISTORY_PATH MOUNT_PATH "/history.txt"
-static void initialize_filesystem()
+static void initialize_filesystem(void)
{
static wl_handle_t wl_handle;
const esp_vfs_fat_mount_config_t mount_config = {
}
#endif // CONFIG_STORE_HISTORY
-static void initialize_console()
+static void initialize_console(void)
{
/* Disable buffering on stdin and stdout */
setvbuf(stdin, NULL, _IONBF, 0);
#define CONFIG_ESPTOOLPY_PORT "Which is choosen by Users for CMake"
#endif
-static void register_free();
-static void register_restart();
-static void register_make();
+static void register_free(void);
+static void register_restart(void);
+static void register_make(void);
-void register_system()
+void register_system(void)
{
register_free();
register_restart();
esp_restart();
}
-static void register_restart()
+static void register_restart(void)
{
const esp_console_cmd_t cmd = {
.command = "restart",
return 0;
}
-static void register_free()
+static void register_free(void)
{
const esp_console_cmd_t cmd = {
.command = "free",
return 0;
}
-static void register_make()
+static void register_make(void)
{
const esp_console_cmd_t cmd = {
.command = "make",
SemaphoreHandle_t ble_mesh_node_sema;
-void ble_mesh_register_node_cmd();
+void ble_mesh_register_node_cmd(void);
// Register callback function
void ble_mesh_prov_cb(esp_ble_mesh_prov_cb_event_t event, esp_ble_mesh_prov_cb_param_t *param);
void ble_mesh_model_cb(esp_ble_mesh_model_cb_event_t event, esp_ble_mesh_model_cb_param_t *param);
-void ble_mesh_register_mesh_node()
+void ble_mesh_register_mesh_node(void)
{
ble_mesh_register_node_cmd();
}
-int ble_mesh_register_node_cb()
+int ble_mesh_register_node_cb(void)
{
ESP_LOGD(TAG, "enter %s\n", __func__);
ble_mesh_node_init();
return err;
}
-int ble_mesh_node_reset()
+int ble_mesh_node_reset(void)
{
esp_err_t err;
ESP_LOGD(TAG, "enter %s\n", __func__);
return err;
}
-void ble_mesh_register_node_cmd()
+void ble_mesh_register_node_cmd(void)
{
const esp_console_cmd_t register_cmd = {
.command = "bmreg",
#include "ble_mesh_console_lib.h"
#include "ble_mesh_adapter.h"
-void ble_mesh_register_server_operation();
+void ble_mesh_register_server_operation(void);
typedef struct {
struct arg_str *data;
} ble_mesh_publish_message;
ble_mesh_publish_message msg_publish;
-void ble_mesh_register_server()
+void ble_mesh_register_server(void)
{
ble_mesh_register_server_operation();
}
return err;
}
-void ble_mesh_register_server_operation()
+void ble_mesh_register_server_operation(void)
{
msg_publish.data = arg_str1("d", NULL, "<data>", "message data");
msg_publish.opcode = arg_int1("o", NULL, "<opcode>", "operation opcode");
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
-void register_ble_address();
+void register_ble_address(void);
-void register_bluetooth()
+void register_bluetooth(void)
{
register_ble_address();
}
-int bt_mac()
+int bt_mac(void)
{
const uint8_t *mac = esp_bt_dev_get_address();
printf("+BTMAC:"MACSTR"\n", MAC2STR(mac));
return 0;
}
-void register_ble_address()
+void register_ble_address(void)
{
const esp_console_cmd_t cmd = {
.command = "btmac",
return comp;
}
-void ble_mesh_node_init()
+void ble_mesh_node_init(void)
{
uint16_t i;
}
}
-void ble_mesh_test_performance_client_model_get()
+void ble_mesh_test_performance_client_model_get(void)
{
uint32_t i, j;
uint32_t sum_time = 0;
xSemaphoreGive(ble_mesh_test_perf_sema);
}
-void ble_mesh_test_performance_client_model_get_received_percent()
+void ble_mesh_test_performance_client_model_get_received_percent(void)
{
uint32_t i, j;
uint32_t max_time = 1400;
return 0;
}
-void ble_mesh_test_performance_client_model_destroy()
+void ble_mesh_test_performance_client_model_destroy(void)
{
if (test_perf_statistics.time != NULL) {
free(test_perf_statistics.time);
} \
}while(0) \
-void ble_mesh_node_init();
+void ble_mesh_node_init(void);
void ble_mesh_set_node_prestore_params(uint16_t netkey_index, uint16_t unicast_addr);
esp_ble_mesh_model_t *ble_mesh_get_model(uint16_t model_id);
esp_ble_mesh_comp_t *ble_mesh_get_component(uint16_t model_id);
void ble_mesh_create_send_data(char *data, uint16_t byte_num, uint16_t sequence_num, uint32_t opcode);
-void ble_mesh_test_performance_client_model_get();
-void ble_mesh_test_performance_client_model_get_received_percent();
+void ble_mesh_test_performance_client_model_get(void);
+void ble_mesh_test_performance_client_model_get_received_percent(void);
void ble_mesh_test_performance_client_model_accumulate_statistics(uint32_t value);
int ble_mesh_test_performance_client_model_accumulate_time(uint16_t time, uint8_t *data, uint8_t ack_ttl, uint16_t length);
int ble_mesh_test_performance_client_model_init(uint16_t node_num, uint32_t test_num, uint8_t ttl);
-void ble_mesh_test_performance_client_model_destroy();
+void ble_mesh_test_performance_client_model_destroy(void);
#endif //_BLE_MESH_ADAPTER_H_
\ No newline at end of file
#include "esp_ble_mesh_defs.h"
// Register system functions
-void register_system();
+void register_system(void);
// Register bluetooth
-void register_bluetooth();
+void register_bluetooth(void);
// Register mesh node cmd
-void ble_mesh_register_mesh_node();
+void ble_mesh_register_mesh_node(void);
// Register Test Perf client cmd
-void ble_mesh_register_mesh_test_performance_client();
+void ble_mesh_register_mesh_test_performance_client(void);
#if (CONFIG_BLE_MESH_CFG_CLI)
// Register mesh config client operation cmd
-void ble_mesh_register_configuration_client_model();
+void ble_mesh_register_configuration_client_model(void);
#endif
#if (CONFIG_BLE_MESH_GENERIC_ONOFF_CLI)
// Register mesh client operation cmd
-void ble_mesh_register_gen_onoff_client();
+void ble_mesh_register_gen_onoff_client(void);
#endif
#if CONFIG_BLE_MESH_PROVISIONER
// Regitster mesh provisioner cmd
-void ble_mesh_register_mesh_provisioner();
+void ble_mesh_register_mesh_provisioner(void);
#endif
#define MOUNT_PATH "/data"
#define HISTORY_PATH MOUNT_PATH "/history.txt"
-static void initialize_filesystem()
+static void initialize_filesystem(void)
{
static wl_handle_t wl_handle;
const esp_vfs_fat_mount_config_t mount_config = {
}
#endif // CONFIG_STORE_HISTORY
-static void initialize_console()
+static void initialize_console(void)
{
/* Disable buffering on stdin and stdout */
setvbuf(stdin, NULL, _IONBF, 0);
#define CONFIG_ESPTOOLPY_PORT "Which is choosen by Users for CMake"
#endif
-static void register_free();
-static void register_restart();
-static void register_make();
+static void register_free(void);
+static void register_restart(void);
+static void register_make(void);
-void register_system()
+void register_system(void)
{
register_free();
register_restart();
esp_restart();
}
-static void register_restart()
+static void register_restart(void)
{
const esp_console_cmd_t cmd = {
.command = "restart",
return 0;
}
-static void register_free()
+static void register_free(void)
{
const esp_console_cmd_t cmd = {
.command = "free",
return 0;
}
-static void register_make()
+static void register_make(void)
{
const esp_console_cmd_t cmd = {
.command = "make",
} ble_mesh_client_get_set_state_t;
ble_mesh_client_get_set_state_t configuration_client_model_operation;
-void ble_mesh_register_configuration_client_model_command();
+void ble_mesh_register_configuration_client_model_command(void);
void ble_mesh_configuration_client_model_cb(esp_ble_mesh_cfg_client_cb_event_t event,
esp_ble_mesh_cfg_client_cb_param_t *param);
-void ble_mesh_register_configuration_client_model()
+void ble_mesh_register_configuration_client_model(void)
{
ble_mesh_register_configuration_client_model_command();
}
}
-void ble_mesh_register_configuration_client_model_command()
+void ble_mesh_register_configuration_client_model_command(void)
{
configuration_client_model_operation.action_type = arg_str1("z", NULL, "<action>", "action type");
configuration_client_model_operation.set_state = arg_str0("x", NULL, "<state>", "set state");
} ble_mesh_gen_onoff_state_t;
ble_mesh_gen_onoff_state_t gen_onoff_state;
-void ble_mesh_register_gen_onoff_client_command();
+void ble_mesh_register_gen_onoff_client_command(void);
void ble_mesh_generic_onoff_client_model_cb(esp_ble_mesh_generic_client_cb_event_t event,
esp_ble_mesh_generic_client_cb_param_t *param);
-void ble_mesh_register_gen_onoff_client()
+void ble_mesh_register_gen_onoff_client(void)
{
ble_mesh_register_gen_onoff_client_command();
}
return err;
}
-void ble_mesh_register_gen_onoff_client_command()
+void ble_mesh_register_gen_onoff_client_command(void)
{
gen_onoff_state.action_type = arg_str1("z", NULL, "<action>", "action type");
gen_onoff_state.opcode = arg_int0("o", NULL, "<opcode>", "message opcode");
} ble_mesh_test_perf_client_model_statistics_t;
ble_mesh_test_perf_client_model_statistics_t test_perf_client_model_statistics;
-void ble_mesh_performance_client_model_command();
+void ble_mesh_performance_client_model_command(void);
-void ble_mesh_register_mesh_test_performance_client()
+void ble_mesh_register_mesh_test_performance_client(void)
{
ble_mesh_performance_client_model_command();
}
return 0;
}
-void ble_mesh_performance_client_model_command()
+void ble_mesh_performance_client_model_command(void)
{
test_perf_client_model.action_type = arg_str1("z", NULL, "<action>", "action type");
test_perf_client_model.playload_byte = arg_int0("p", NULL, "<byte>", "playload byte");
SemaphoreHandle_t ble_mesh_node_sema;
-void ble_mesh_register_node_cmd();
+void ble_mesh_register_node_cmd(void);
// Register callback function
void ble_mesh_prov_cb(esp_ble_mesh_prov_cb_event_t event, esp_ble_mesh_prov_cb_param_t *param);
void ble_mesh_model_cb(esp_ble_mesh_model_cb_event_t event, esp_ble_mesh_model_cb_param_t *param);
-void ble_mesh_register_mesh_node()
+void ble_mesh_register_mesh_node(void)
{
ble_mesh_register_node_cmd();
}
-int ble_mesh_register_node_cb()
+int ble_mesh_register_node_cb(void)
{
ESP_LOGD(TAG, "enter %s\n", __func__);
ble_mesh_node_init();
return err;
}
-void ble_mesh_register_node_cmd()
+void ble_mesh_register_node_cmd(void)
{
const esp_console_cmd_t register_cmd = {
.command = "bmreg",
} ble_mesh_provisioner_add_key_t;
ble_mesh_provisioner_add_key_t provisioner_add_key;
-void ble_mesh_regist_provisioner_cmd();
+void ble_mesh_regist_provisioner_cmd(void);
void ble_mesh_prov_adv_cb(const esp_bd_addr_t addr, const esp_ble_addr_type_t addr_type, const uint8_t adv_type,
const uint8_t *dev_uuid, uint16_t oob_info, esp_ble_mesh_prov_bearer_t bearer);
-void ble_mesh_register_mesh_provisioner()
+void ble_mesh_register_mesh_provisioner(void)
{
ble_mesh_regist_provisioner_cmd();
}
ESP_LOGD(TAG, "exit %s\n", __func__);
}
-int ble_mesh_provisioner_register()
+int ble_mesh_provisioner_register(void)
{
ESP_LOGD(TAG, "enter %s \n", __func__);
// esp_ble_mesh_register_unprov_adv_pkt_callback(ble_mesh_prov_adv_cb);
return err;
}
-void ble_mesh_regist_provisioner_cmd()
+void ble_mesh_regist_provisioner_cmd(void)
{
const esp_console_cmd_t prov_register = {
.command = "bmpreg",
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
-void register_ble_address();
+void register_ble_address(void);
-void register_bluetooth()
+void register_bluetooth(void)
{
register_ble_address();
}
return 0;
}
-void register_ble_address()
+void register_ble_address(void)
{
const esp_console_cmd_t cmd = {
.command = "btmac",
return 0;
}
-void register_wifi()
+void register_wifi(void)
{
sta_args.ssid = arg_str1(NULL, NULL, "<ssid>", "SSID of AP");
sta_args.password = arg_str0(NULL, NULL, "<pass>", "password of AP");
#define WIFI_CONNECTED_BIT BIT0
-static void initialize_console()
+static void initialize_console(void)
{
/* Disable buffering on stdin and stdout */
setvbuf(stdin, NULL, _IONBF, 0);
nimble_port_run();
}
-void app_main()
+void app_main(void)
{
/* Initialize NVS — it is used to store PHY calibration data */
esp_err_t ret = nvs_flash_init();
},
};
-static int ble_register_cli()
+static int ble_register_cli(void)
{
int cmds_num = sizeof(cmds) / sizeof(esp_console_cmd_t);
int i;
vTaskDelete(NULL);
}
-int scli_init()
+int scli_init(void)
{
/* Register CLI "key <value>" to accept input from user during pairing */
ble_register_cli();
#include "esp_system.h"
#include "esp_spi_flash.h"
-void app_main()
+void app_main(void)
{
printf("Hello world!\n");
#include <stdbool.h>
#include <setjmp.h>
-extern void app_main();
+extern void app_main(void);
jmp_buf buf;
-int main()
+int main(void)
{
setjmp(buf);
app_main();
#include "esp_spi_flash.h"
-int spi_flash_get_chip_size()
+int spi_flash_get_chip_size(void)
{
return (1024 * 1024 * 1024);
}
\ No newline at end of file
#include <stddef.h>
-int spi_flash_get_chip_size();
\ No newline at end of file
+int spi_flash_get_chip_size(void);
\ No newline at end of file
static const char *TAG = "example_connect";
/* set up connection, Wi-Fi or Ethernet */
-static void start();
+static void start(void);
/* tear down connection, release resources */
-static void stop();
+static void stop(void);
static void on_got_ip(void *arg, esp_event_base_t event_base,
int32_t event_id, void *event_data)
#endif // CONFIG_EXAMPLE_CONNECT_IPV6
-esp_err_t example_connect()
+esp_err_t example_connect(void)
{
if (s_connect_event_group != NULL) {
return ESP_ERR_INVALID_STATE;
return ESP_OK;
}
-esp_err_t example_disconnect()
+esp_err_t example_disconnect(void)
{
if (s_connect_event_group == NULL) {
return ESP_ERR_INVALID_STATE;
#endif // CONFIG_EXAMPLE_CONNECT_IPV6
-static void start()
+static void start(void)
{
wifi_init_config_t cfg = WIFI_INIT_CONFIG_DEFAULT();
ESP_ERROR_CHECK(esp_wifi_init(&cfg));
s_connection_name = CONFIG_EXAMPLE_WIFI_SSID;
}
-static void stop()
+static void stop(void)
{
ESP_ERROR_CHECK(esp_event_handler_unregister(WIFI_EVENT, WIFI_EVENT_STA_DISCONNECTED, &on_wifi_disconnect));
ESP_ERROR_CHECK(esp_event_handler_unregister(IP_EVENT, IP_EVENT_STA_GOT_IP, &on_got_ip));
static esp_eth_mac_t *s_mac = NULL;
static esp_eth_phy_t *s_phy = NULL;
-static void start()
+static void start(void)
{
ESP_ERROR_CHECK(tcpip_adapter_set_default_eth_handlers());
ESP_ERROR_CHECK(esp_event_handler_register(IP_EVENT, IP_EVENT_ETH_GOT_IP, &on_got_ip, NULL));
s_connection_name = "Ethernet";
}
-static void stop()
+static void stop(void)
{
ESP_ERROR_CHECK(esp_event_handler_unregister(IP_EVENT, IP_EVENT_ETH_GOT_IP, &on_got_ip));
#ifdef CONFIG_EXAMPLE_CONNECT_IPV6
*
* @return ESP_OK on successful connection
*/
-esp_err_t example_connect();
+esp_err_t example_connect(void);
/**
* Counterpart to example_connect, de-initializes Wi-Fi or Ethernet
*/
-esp_err_t example_disconnect();
+esp_err_t example_disconnect(void);
/**
* @brief Configure stdin and stdout to use blocking I/O
* This helper function is used in ASIO examples. It wraps installing the
* UART driver and configuring VFS layer to use UART driver for console I/O.
*/
-esp_err_t example_configure_stdin_stdout();
+esp_err_t example_configure_stdin_stdout(void);
#ifdef __cplusplus
}
#include "driver/uart.h"
#include "sdkconfig.h"
-esp_err_t example_configure_stdin_stdout()
+esp_err_t example_configure_stdin_stdout(void)
{
// Initialize VFS & UART so we can use std::cout/cin
setvbuf(stdin, NULL, _IONBF, 0);
ESP_LOGI(TAG, "~~~~~~~~~~~");
}
-void app_main()
+void app_main(void)
{
tcpip_adapter_init();
return ESP_OK;
}
-void app_main()
+void app_main(void)
{
esp_err_t ret = nvs_flash_init();
if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
}
}
-void register_ethernet()
+void register_ethernet(void)
{
eth_event_group = xEventGroupCreate();
tcpip_adapter_init();
#endif
// Register Ethernet functions
-void register_ethernet();
+void register_ethernet(void);
#ifdef __cplusplus
}
#define MOUNT_PATH "/data"
#define HISTORY_PATH MOUNT_PATH "/history.txt"
-static void initialize_filesystem()
+static void initialize_filesystem(void)
{
static wl_handle_t wl_handle;
const esp_vfs_fat_mount_config_t mount_config = {
}
#endif // CONFIG_EXAMPLE_STORE_HISTORY
-static void initialize_nvs()
+static void initialize_nvs(void)
{
esp_err_t err = nvs_flash_init();
if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
ESP_ERROR_CHECK(err);
}
-static void initialize_console()
+static void initialize_console(void)
{
/* Disable buffering on stdin */
setvbuf(stdin, NULL, _IONBF, 0);
#endif
}
-void app_main()
+void app_main(void)
{
initialize_nvs();
*/
#define BLINK_GPIO CONFIG_BLINK_GPIO
-void app_main()
+void app_main(void)
{
/* Configure the IOMUX register for pad BLINK_GPIO (some pads are
muxed to GPIO on reset already, but some default to other
#include "esp_spi_flash.h"
-void app_main()
+void app_main(void)
{
printf("Hello world!\n");
static const adc_atten_t atten = ADC_ATTEN_DB_0;
static const adc_unit_t unit = ADC_UNIT_1;
-static void check_efuse()
+static void check_efuse(void)
{
//Check TP is burned into eFuse
if (esp_adc_cal_check_efuse(ESP_ADC_CAL_VAL_EFUSE_TP) == ESP_OK) {
}
}
-void app_main()
+void app_main(void)
{
//Check if Two Point or Vref are burned into eFuse
check_efuse();
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
tx_task_sem = xSemaphoreCreateBinary();
ctrl_task_sem = xSemaphoreCreateBinary();
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
rx_sem = xSemaphoreCreateBinary();
xTaskCreatePinnedToCore(can_receive_task, "CAN_rx", 4096, NULL, RX_TASK_PRIO, NULL, tskNO_AFFINITY);
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
//Create tasks, queues, and semaphores
rx_task_queue = xQueueCreate(1, sizeof(rx_task_action_t));
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
//Add short delay to allow master it to initialize first
for (int i = 3; i > 0; i--) {
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
//Create tasks and synchronization primitives
tx_sem = xSemaphoreCreateBinary();
}
}
-void app_main()
+void app_main(void)
{
gpio_config_t io_conf;
//disable interrupt
/**
* @brief i2c master initialization
*/
-static esp_err_t i2c_master_init()
+static esp_err_t i2c_master_init(void)
{
int i2c_master_port = I2C_MASTER_NUM;
i2c_config_t conf;
/**
* @brief i2c slave initialization
*/
-static esp_err_t i2c_slave_init()
+static esp_err_t i2c_slave_init(void)
{
int i2c_slave_port = I2C_SLAVE_NUM;
i2c_config_t conf_slave;
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
print_mux = xSemaphoreCreateMutex();
ESP_ERROR_CHECK(i2c_slave_init());
return ESP_OK;
}
-static esp_err_t i2c_master_driver_initialize()
+static esp_err_t i2c_master_driver_initialize(void)
{
i2c_config_t conf = {
.mode = I2C_MODE_MASTER,
#define MOUNT_PATH "/data"
#define HISTORY_PATH MOUNT_PATH "/history.txt"
-static void initialize_filesystem()
+static void initialize_filesystem(void)
{
static wl_handle_t wl_handle;
const esp_vfs_fat_mount_config_t mount_config = {
}
#endif // CONFIG_EXAMPLE_STORE_HISTORY
-static void initialize_nvs()
+static void initialize_nvs(void)
{
esp_err_t err = nvs_flash_init();
if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
ESP_ERROR_CHECK(err);
}
-static void initialize_console()
+static void initialize_console(void)
{
/* Disable buffering on stdin */
setvbuf(stdin, NULL, _IONBF, 0);
#endif
}
-void app_main()
+void app_main(void)
{
initialize_nvs();
free(samples_data);
}
-void app_main()
+void app_main(void)
{
//for 36Khz sample rates, we create 100Hz sine wave, every cycle need 36000/100 = 360 samples (4-bytes or 8-bytes each sample)
//depend on bits_per_sample
/**
* @brief I2S ADC/DAC mode init.
*/
-void example_i2s_init()
+void example_i2s_init(void)
{
int i2s_num = EXAMPLE_I2S_NUM;
i2s_config_t i2s_config = {
/*
* @brief erase flash for recording
*/
-void example_erase_flash()
+void example_erase_flash(void)
{
#if RECORD_IN_FLASH_EN
printf("Erasing flash \n");
/**
* @brief Reset i2s clock and mode
*/
-void example_reset_play_mode()
+void example_reset_play_mode(void)
{
i2s_set_clk(EXAMPLE_I2S_NUM, EXAMPLE_I2S_SAMPLE_RATE, EXAMPLE_I2S_SAMPLE_BITS, EXAMPLE_I2S_CHANNEL_NUM);
}
/**
* @brief Set i2s clock for example audio file
*/
-void example_set_file_play_mode()
+void example_set_file_play_mode(void)
{
i2s_set_clk(EXAMPLE_I2S_NUM, 16000, EXAMPLE_I2S_SAMPLE_BITS, 1);
}
}
}
-esp_err_t app_main()
+esp_err_t app_main(void)
{
example_i2s_init();
esp_log_level_set("I2S", ESP_LOG_INFO);
#define LEDC_TEST_DUTY (4000)
#define LEDC_TEST_FADE_TIME (3000)
-void app_main()
+void app_main(void)
{
int ch;
static mcpwm_dev_t *MCPWM[2] = {&MCPWM0, &MCPWM1};
#endif
-static void mcpwm_example_gpio_initialize()
+static void mcpwm_example_gpio_initialize(void)
{
printf("initializing mcpwm gpio...\n");
#if MCPWM_GPIO_INIT
/**
* @brief this is ISR handler function, here we check for interrupt that triggers rising edge on CAP0 signal and according take action
*/
-static void IRAM_ATTR isr_handler()
+static void IRAM_ATTR isr_handler(void)
{
uint32_t mcpwm_intr_status;
capture evt;
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
printf("Testing MCPWM...\n");
cap_queue = xQueueCreate(1, sizeof(capture)); //comment if you don't want to use capture module
static mcpwm_dev_t *MCPWM[2] = {&MCPWM0, &MCPWM1};
-static void mcpwm_example_gpio_initialize()
+static void mcpwm_example_gpio_initialize(void)
{
printf("initializing mcpwm bldc control gpio...\n");
#if MCPWM_GPIO_INIT
/**
* @brief this is ISR handler function, here we check for interrupt that triggers rising edge on CAP0 signal and according take action
*/
-static void IRAM_ATTR isr_handler()
+static void IRAM_ATTR isr_handler(void)
{
uint32_t mcpwm_intr_status;
capture evt;
}
}
-void app_main()
+void app_main(void)
{
printf("Testing MCPWM BLDC Control...\n");
#if CHANGE_DUTY_CONTINUOUSLY
#define GPIO_PWM0A_OUT 15 //Set GPIO 15 as PWM0A
#define GPIO_PWM0B_OUT 16 //Set GPIO 16 as PWM0B
-static void mcpwm_example_gpio_initialize()
+static void mcpwm_example_gpio_initialize(void)
{
printf("initializing mcpwm gpio...\n");
mcpwm_gpio_init(MCPWM_UNIT_0, MCPWM0A, GPIO_PWM0A_OUT);
}
}
-void app_main()
+void app_main(void)
{
printf("Testing brushed motor...\n");
xTaskCreate(mcpwm_example_brushed_motor_control, "mcpwm_examlpe_brushed_motor_control", 4096, NULL, 5, NULL);
#define SERVO_MAX_PULSEWIDTH 2000 //Maximum pulse width in microsecond
#define SERVO_MAX_DEGREE 90 //Maximum angle in degree upto which servo can rotate
-static void mcpwm_example_gpio_initialize()
+static void mcpwm_example_gpio_initialize(void)
{
printf("initializing mcpwm servo control gpio......\n");
mcpwm_gpio_init(MCPWM_UNIT_0, MCPWM0A, 18); //Set GPIO 18 as PWM0A, to which servo is connected
}
}
-void app_main()
+void app_main(void)
{
printf("Testing servo motor.......\n");
xTaskCreate(mcpwm_example_servo_control, "mcpwm_example_servo_control", 4096, NULL, 5, NULL);
pcnt_counter_resume(PCNT_TEST_UNIT);
}
-void app_main()
+void app_main(void)
{
/* Initialize LEDC to generate sample pulse signal */
ledc_init();
/*
* @brief RMT transmitter initialization
*/
-static void nec_tx_init()
+static void nec_tx_init(void)
{
rmt_config_t rmt_tx;
rmt_tx.channel = RMT_TX_CHANNEL;
/*
* @brief RMT receiver initialization
*/
-static void nec_rx_init()
+static void nec_rx_init(void)
{
rmt_config_t rmt_rx;
rmt_rx.channel = RMT_RX_CHANNEL;
* @brief RMT receiver demo, this task will print each received NEC data.
*
*/
-static void rmt_example_nec_rx_task()
+static void rmt_example_nec_rx_task(void)
{
int channel = RMT_RX_CHANNEL;
nec_rx_init();
* @brief RMT transmitter demo, this task will periodically send NEC data. (100 * 32 bits each time.)
*
*/
-static void rmt_example_nec_tx_task()
+static void rmt_example_nec_tx_task(void)
{
vTaskDelay(10);
nec_tx_init();
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
xTaskCreate(rmt_example_nec_rx_task, "rmt_nec_rx_task", 2048, NULL, 10, NULL);
xTaskCreate(rmt_example_nec_tx_task, "rmt_nec_tx_task", 2048, NULL, 10, NULL);
/*
* Initialize the RMT Tx channel
*/
-static void rmt_tx_int()
+static void rmt_tx_int(void)
{
rmt_config_t config;
config.rmt_mode = RMT_MODE_TX;
}
#ifdef CONFIG_EXAMPLE_SDIO_OVER_SPI
-static void gpio_d2_set_high()
+static void gpio_d2_set_high(void)
{
gpio_config_t d2_config = {
.pin_bit_mask = BIT(SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2),
}
-void slave_power_on()
+void slave_power_on(void)
{
#ifdef SLAVE_PWR_GPIO
int level_active;
slave_inform_job(context, JOB_SEND_INT);
}
-void app_main()
+void app_main(void)
{
esp_slave_context_t context;
esp_err_t err;
//reset counters of the slave hardware, and clean the receive buffer (normally they should be sent back to the host)
-static esp_err_t slave_reset()
+static esp_err_t slave_reset(void)
{
esp_err_t ret;
sdio_slave_stop();
}
//sent interrupts to the host in turns
-static esp_err_t task_hostint()
+static esp_err_t task_hostint(void)
{
for(int i = 0; i < 8; i++) {
ESP_LOGV(TAG, "send intr: %d", i);
//read the value in a specified register set by the host, and set other register according to this.
//the host will read these registers later
-static esp_err_t task_write_reg()
+static esp_err_t task_write_reg(void)
{
//the host write REG1, the slave should write its registers according to value of REG1
uint8_t read = sdio_slave_read_reg(1);
DMA_ATTR uint8_t buffer[BUFFER_NUM][BUFFER_SIZE] = {};
//Main application
-void app_main()
+void app_main(void)
{
esp_err_t ret;
* Perform the sigma-delta modulation test
* by changing the duty of the output signal.
*/
-void app_main()
+void app_main(void)
{
sigmadelta_example_init();
}
-esp_err_t pretty_effect_init()
+esp_err_t pretty_effect_init(void)
{
return decode_image(&pixels);
}
*
* @return ESP_OK on success, an error from the jpeg decoder otherwise.
*/
-esp_err_t pretty_effect_init();
+esp_err_t pretty_effect_init(void);
}
}
-void app_main()
+void app_main(void)
{
esp_err_t ret;
spi_device_handle_t spi;
}
//Main application
-void app_main()
+void app_main(void)
{
int n=0;
esp_err_t ret;
}
//Main application
-void app_main()
+void app_main(void)
{
esp_err_t ret;
spi_device_handle_t handle;
/*
* In this example, we will test hardware timer0 and timer1 of timer group0.
*/
-void app_main()
+void app_main(void)
{
timer_queue = xQueueCreate(10, sizeof(timer_event_t));
example_tg0_timer_init(TIMER_0, TEST_WITHOUT_RELOAD, TIMER_INTERVAL0_SEC);
/*
* Before reading touch pad, we need to initialize the RTC IO.
*/
-static void tp_example_touch_pad_init()
+static void tp_example_touch_pad_init(void)
{
for (int i = 0;i< TOUCH_PAD_MAX;i++) {
//init RTC IO and mode for touch pad.
}
}
-void app_main()
+void app_main(void)
{
// Initialize touch pad peripheral, it will start a timer to run a filter
ESP_LOGI(TAG, "Initializing touch pad");
}
}
-static void tp_example_touch_pad_init()
+static void tp_example_touch_pad_init(void)
{
for (int i = 0;i< TOUCH_PAD_MAX;i++) {
touch_pad_config(i, TOUCH_THRESH_NO_USE);
}
}
-void app_main()
+void app_main(void)
{
// Initialize touch pad peripheral.
// The default fsm mode is software trigger mode.
}
}
-void app_main()
+void app_main(void)
{
/* NMEA parser configuration */
nmea_parser_config_t config = NMEA_PARSER_CONFIG_DEFAULT();
#define TXD_PIN (GPIO_NUM_4)
#define RXD_PIN (GPIO_NUM_5)
-void init() {
+void init(void) {
const uart_config_t uart_config = {
.baud_rate = 115200,
.data_bits = UART_DATA_8_BITS,
return txBytes;
}
-static void tx_task()
+static void tx_task(void)
{
static const char *TX_TASK_TAG = "TX_TASK";
esp_log_level_set(TX_TASK_TAG, ESP_LOG_INFO);
}
}
-static void rx_task()
+static void rx_task(void)
{
static const char *RX_TASK_TAG = "RX_TASK";
esp_log_level_set(RX_TASK_TAG, ESP_LOG_INFO);
free(data);
}
-void app_main()
+void app_main(void)
{
init();
xTaskCreate(rx_task, "uart_rx_task", 1024*2, NULL, configMAX_PRIORITIES, NULL);
#define BUF_SIZE (1024)
-static void echo_task()
+static void echo_task(void)
{
/* Configure parameters of an UART driver,
* communication pins and install the driver */
}
}
-void app_main()
+void app_main(void)
{
xTaskCreate(echo_task, "uart_echo_task", 1024, NULL, 10, NULL);
}
static const char *TAG = "RS485_ECHO_APP";
// An example of echo test with hardware flow control on UART
-static void echo_task()
+static void echo_task(void)
{
const int uart_num = ECHO_UART_PORT;
uart_config_t uart_config = {
}
}
-void app_main()
+void app_main(void)
{
//A uart read/write example without event queue;
xTaskCreate(echo_task, "uart_echo_task", ECHO_TASK_STACK_SIZE, NULL, ECHO_TASK_PRIO, NULL);
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
esp_log_level_set(TAG, ESP_LOG_INFO);
static const char* TAG = "uart_select_example";
-static void uart_select_task()
+static void uart_select_task(void)
{
uart_config_t uart_config = {
.baud_rate = 115200,
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
xTaskCreate(uart_select_task, "uart_select_task", 4*1024, NULL, 5, NULL);
}
void read_line(char * line, int max_chars);
-extern "C" void app_main()
+extern "C" void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
//----------------------------------------------------------------------
-extern "C" void app_main()
+extern "C" void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
};
-extern "C" void app_main()
+extern "C" void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
char data_[max_length];
};
-extern "C" void app_main()
+extern "C" void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
return ESP_OK;
}
-static void http_rest_with_url()
+static void http_rest_with_url(void)
{
esp_http_client_config_t config = {
.url = "http://httpbin.org/get",
esp_http_client_cleanup(client);
}
-static void http_rest_with_hostname_path()
+static void http_rest_with_hostname_path(void)
{
esp_http_client_config_t config = {
.host = "httpbin.org",
}
-static void http_auth_basic()
+static void http_auth_basic(void)
{
esp_http_client_config_t config = {
.url = "http://user:passwd@httpbin.org/basic-auth/user/passwd",
esp_http_client_cleanup(client);
}
-static void http_auth_basic_redirect()
+static void http_auth_basic_redirect(void)
{
esp_http_client_config_t config = {
.url = "http://user:passwd@httpbin.org/basic-auth/user/passwd",
esp_http_client_cleanup(client);
}
-static void http_auth_digest()
+static void http_auth_digest(void)
{
esp_http_client_config_t config = {
.url = "http://user:passwd@httpbin.org/digest-auth/auth/user/passwd/MD5/never",
esp_http_client_cleanup(client);
}
-static void https_with_url()
+static void https_with_url(void)
{
esp_http_client_config_t config = {
.url = "https://www.howsmyssl.com",
esp_http_client_cleanup(client);
}
-static void https_with_hostname_path()
+static void https_with_hostname_path(void)
{
esp_http_client_config_t config = {
.host = "www.howsmyssl.com",
esp_http_client_cleanup(client);
}
-static void http_relative_redirect()
+static void http_relative_redirect(void)
{
esp_http_client_config_t config = {
.url = "http://httpbin.org/relative-redirect/3",
esp_http_client_cleanup(client);
}
-static void http_absolute_redirect()
+static void http_absolute_redirect(void)
{
esp_http_client_config_t config = {
.url = "http://httpbin.org/absolute-redirect/3",
esp_http_client_cleanup(client);
}
-static void http_redirect_to_https()
+static void http_redirect_to_https(void)
{
esp_http_client_config_t config = {
.url = "http://httpbin.org/redirect-to?url=https%3A%2F%2Fwww.howsmyssl.com",
}
-static void http_download_chunk()
+static void http_download_chunk(void)
{
esp_http_client_config_t config = {
.url = "http://httpbin.org/stream-bytes/8912",
esp_http_client_cleanup(client);
}
-static void http_perform_as_stream_reader()
+static void http_perform_as_stream_reader(void)
{
char *buffer = malloc(MAX_HTTP_RECV_BUFFER + 1);
if (buffer == NULL) {
free(buffer);
}
-static void https_async()
+static void https_async(void)
{
esp_http_client_config_t config = {
.url = "https://postman-echo.com/post",
esp_http_client_cleanup(client);
}
-static void https_with_invalid_url()
+static void https_with_invalid_url(void)
{
esp_http_client_config_t config = {
.url = "https://not.existent.url",
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
esp_err_t ret = nvs_flash_init();
if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) {
}
}
-void wifi_init_sta()
+void wifi_init_sta(void)
{
s_wifi_event_group = xEventGroupCreate();
* See local_ctrl_service.c for implementation */
extern void start_esp_local_ctrl_service(void);
-void app_main()
+void app_main(void)
{
//Initialize NVS
esp_err_t ret = nvs_flash_init();
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK( nvs_flash_init() );
tcpip_adapter_init();
}
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK( nvs_flash_init() );
tcpip_adapter_init();
}
}
-void app_main()
+void app_main(void)
{
static httpd_handle_t server = NULL;
ESP_LOGI(TAG, "Success");
}
-static httpd_handle_t test_httpd_start()
+static httpd_handle_t test_httpd_start(void)
{
pre_start_mem = esp_get_free_heap_size();
httpd_handle_t hd;
ESP_LOGI(TAG, "HTTPD Stop: Current free memory: %d", post_stop_mem);
}
-httpd_handle_t start_tests()
+httpd_handle_t start_tests(void)
{
httpd_handle_t hd = test_httpd_start();
if (hd) {
* file_server.c */
esp_err_t start_file_server(const char *base_path);
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
}
-void app_main()
+void app_main(void)
{
static httpd_handle_t server = NULL;
}
#endif
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
}
-void app_main()
+void app_main(void)
{
static httpd_handle_t server = NULL;
}
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK( nvs_flash_init() );
tcpip_adapter_init();
}
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK( nvs_flash_init() );
tcpip_adapter_init();
}
}
-void app_main()
+void app_main(void)
{
static httpd_handle_t server = NULL;
#define EXAMPLE_BUTTON_GPIO 0
static const char *TAG = "mdns-test";
-static char* generate_hostname();
+static char* generate_hostname(void);
static void initialise_mdns(void)
{
}
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
/** Generate host name based on sdkconfig, optionally adding a portion of MAC address to it.
* @return host name string allocated from the heap
*/
-static char* generate_hostname()
+static char* generate_hostname(void)
{
#ifndef CONFIG_MDNS_ADD_MAC_TO_HOSTNAME
return strdup(CONFIG_MDNS_HOSTNAME);
uint64_t timestamp; /*!< Time stamp of last access to parameter */
} characteristic_descriptor_t;
-esp_err_t sense_modbus_init();
+esp_err_t sense_modbus_init(void);
esp_err_t sense_modbus_get_characteristics(characteristic_descriptor_t** cid_table, uint16_t* table_size);
esp_err_t sense_modbus_read_value(uint16_t cid, void* value);
esp_err_t sense_modbus_send_value(uint16_t cid, void* value);
vTaskDelete(NULL);
}
-static void sense_device_init()
+static void sense_device_init(void)
{
// Initialize and start Modbus controller
sense_modbus_init();
}
-void app_main()
+void app_main(void)
{
esp_err_t result = ESP_OK;
}
// The helper function to get time stamp in microseconds
-static uint64_t sense_modbus_get_time_stamp_us()
+static uint64_t sense_modbus_get_time_stamp_us(void)
{
uint64_t time_stamp = esp_timer_get_time();
return time_stamp;
}
// Initialization of Modbus stack
-esp_err_t sense_modbus_init()
+esp_err_t sense_modbus_init(void)
{
mb_communication_info_t comm = {
.port = MB_PORTNUM,
static const char *TAG = "MODBUS_SLAVE_APP";
// Set register values into known state
-static void setup_reg_data()
+static void setup_reg_data(void)
{
// Define initial state of parameters
discrete_reg_params.discrete_input1 = 1;
// See deviceparams.h file for more information about assigned Modbus parameters.
// These parameters can be accessed from main application and also can be changed
// by external Modbus master host.
-void app_main()
+void app_main(void)
{
mb_param_info_t reg_info; // keeps the Modbus registers access information
mb_communication_info_t comm_info; // Modbus communication parameters
}
}
-void app_main()
+void app_main(void)
{
char line[256];
char pattern[32];
esp_mqtt_client_start(client);
}
-void app_main()
+void app_main(void)
{
ESP_LOGI(TAG, "[APP] Startup..");
ESP_LOGI(TAG, "[APP] Free memory: %d bytes", esp_get_free_heap_size());
esp_mqtt_client_start(client);
}
-void app_main()
+void app_main(void)
{
ESP_LOGI(TAG, "[APP] Startup..");
ESP_LOGI(TAG, "[APP] Free memory: %d bytes", esp_get_free_heap_size());
esp_mqtt_client_start(client);
}
-void app_main()
+void app_main(void)
{
ESP_LOGI(TAG, "[APP] Startup..");
ESP_LOGI(TAG, "[APP] Free memory: %d bytes", esp_get_free_heap_size());
esp_mqtt_client_start(client);
}
-void app_main()
+void app_main(void)
{
ESP_LOGI(TAG, "[APP] Startup..");
ESP_LOGI(TAG, "[APP] Free memory: %d bytes", esp_get_free_heap_size());
esp_mqtt_client_start(client);
}
-void app_main()
+void app_main(void)
{
ESP_LOGI(TAG, "[APP] Startup..");
ESP_LOGI(TAG, "[APP] Free memory: %d bytes", esp_get_free_heap_size());
return ESP_OK;
}
-void app_main()
+void app_main(void)
{
tcpip_adapter_init();
event_group = xEventGroupCreate();
ESP_LOGI(TAG, "Notification of a time synchronization event");
}
-void app_main()
+void app_main(void)
{
++boot_count;
ESP_LOGI(TAG, "Boot count: %d", boot_count);
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
#endif /* CONFIG_EXAMPLE_IPV4 */
#ifdef CONFIG_EXAMPLE_IPV4_ONLY
-static int create_multicast_ipv4_socket()
+static int create_multicast_ipv4_socket(void)
{
struct sockaddr_in saddr = { 0 };
int sock = -1;
#endif /* CONFIG_EXAMPLE_IPV4_ONLY */
#ifdef CONFIG_EXAMPLE_IPV6
-static int create_multicast_ipv6_socket()
+static int create_multicast_ipv6_socket(void)
{
struct sockaddr_in6 saddr = { 0 };
int netif_index;
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK(nvs_flash_init());
tcpip_adapter_init();
esp_websocket_client_destroy(client);
}
-void app_main()
+void app_main(void)
{
ESP_LOGI(TAG, "[APP] Startup..");
ESP_LOGI(TAG, "[APP] Free memory: %d bytes", esp_get_free_heap_size());
static const char *TAG = "app";
-static void start_ble_provisioning();
+static void start_ble_provisioning(void);
static void event_handler(void* arg, esp_event_base_t event_base,
int event_id, void* event_data)
}
}
-static void wifi_init_sta()
+static void wifi_init_sta(void)
{
/* Set our event handling */
ESP_ERROR_CHECK(esp_event_handler_register(WIFI_EVENT, ESP_EVENT_ANY_ID, event_handler, NULL));
ESP_ERROR_CHECK(esp_wifi_start());
}
-static void start_ble_provisioning()
+static void start_ble_provisioning(void)
{
/* Security version */
int security = 0;
ESP_ERROR_CHECK(app_prov_start_ble_provisioning(security, pop));
}
-void app_main()
+void app_main(void)
{
/* Initialize networking stack */
tcpip_adapter_init();
}
}
-static void wifi_init_sta()
+static void wifi_init_sta(void)
{
/* Set our event handling */
ESP_ERROR_CHECK(esp_event_handler_register(WIFI_EVENT, ESP_EVENT_ANY_ID, event_handler, NULL));
ESP_ERROR_CHECK(esp_wifi_start());
}
-static void start_console_provisioning()
+static void start_console_provisioning(void)
{
/* Security version */
int security = 0;
ESP_ERROR_CHECK(app_prov_start_console_provisioning(security, pop));
}
-void app_main()
+void app_main(void)
{
/* Initialize networking stack */
tcpip_adapter_init();
}
}
-static void wifi_init_sta()
+static void wifi_init_sta(void)
{
/* Set our event handling */
ESP_ERROR_CHECK(esp_event_handler_register(WIFI_EVENT, ESP_EVENT_ANY_ID, event_handler, NULL));
ESP_ERROR_CHECK(esp_wifi_start());
}
-static void start_softap_provisioning()
+static void start_softap_provisioning(void)
{
/* Security version */
int security = 0;
CONFIG_EXAMPLE_SSID, CONFIG_EXAMPLE_PASS, security, pop));
}
-void app_main()
+void app_main(void)
{
/* Initialize networking stack */
tcpip_adapter_init();
}
}
-static void wifi_init_sta()
+static void wifi_init_sta(void)
{
/* Start Wi-Fi in station mode */
ESP_ERROR_CHECK(esp_wifi_set_mode(WIFI_MODE_STA));
ssid_prefix, eth_mac[3], eth_mac[4], eth_mac[5]);
}
-void app_main()
+void app_main(void)
{
/* Initialize NVS partition */
esp_err_t ret = nvs_flash_init();
}
}
-static void wifi_init_sta()
+static void wifi_init_sta(void)
{
/* Set our event handling */
ESP_ERROR_CHECK(esp_event_handler_register(WIFI_EVENT, ESP_EVENT_ANY_ID, event_handler, NULL));
ESP_ERROR_CHECK(esp_wifi_start());
}
-static void start_softap_provisioning()
+static void start_softap_provisioning(void)
{
/* Security version */
int security = 0;
ssid, CONFIG_EXAMPLE_PASS, security, pop));
}
-void app_main()
+void app_main(void)
{
/* Initialize networking stack */
tcpip_adapter_init();
#include "esp_flash_encrypt.h"
#include "esp_efuse_table.h"
-void app_main()
+void app_main(void)
{
uint32_t flash_crypt_cnt = 0;
esp_flash_enc_mode_t mode;
// Mount path for the partition
const char *base_path = "/extflash";
-static esp_flash_t* example_init_ext_flash();
+static esp_flash_t* example_init_ext_flash(void);
static const esp_partition_t* example_add_partition(esp_flash_t* ext_flash, const char* partition_label);
static bool example_mount_fatfs(const char* partition_label);
static void example_get_fatfs_usage(size_t* out_total_bytes, size_t* out_free_bytes);
ESP_LOGI(TAG, "Read from file: '%s'", line);
}
-static esp_flash_t* example_init_ext_flash()
+static esp_flash_t* example_init_ext_flash(void)
{
const spi_bus_config_t bus_config = {
.mosi_io_num = VSPI_IOMUX_PIN_NUM_MOSI,
}
-void app_main()
+void app_main(void)
{
esp_err_t err = nvs_flash_init();
if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
#include "nvs_flash.h"
#include "nvs.h"
-void app_main()
+void app_main(void)
{
// Initialize NVS
esp_err_t err = nvs_flash_init();
static const char *TAG = "example";
-static void read_hello_txt()
+static void read_hello_txt(void)
{
ESP_LOGI(TAG, "Reading hello.txt");
ESP_LOGI(TAG, "Read from hello.txt: %s", buf);
}
-static void compute_alice_txt_md5()
+static void compute_alice_txt_md5(void)
{
ESP_LOGI(TAG, "Computing alice.txt MD5 hash");
* and logging results with application tracing to the host
* as well as for comparison printing out sampling result to UART
*/
-void app_main()
+void app_main(void)
{
ESP_LOGI(TAG, "Enabling ADC1 on channel 6 / GPIO34.");
adc1_config_width(ADC_WIDTH_BIT_12);
}
#endif//CONFIG_BASE_MAC_STORED_OTHER_EXTERNAL_STORAGE
-void app_main()
+void app_main(void)
{
#if defined(CONFIG_BASE_MAC_STORED_EFUSE_BLK3) || defined(CONFIG_BASE_MAC_STORED_OTHER_EXTERNAL_STORAGE)
uint8_t mac_addr[8] = {0};
return list(part, name, type);
}
-void register_nvs()
+void register_nvs(void)
{
set_args.key = arg_str1(NULL, NULL, "<key>", "key of the value to be set");
set_args.type = arg_str1(NULL, NULL, "<type>", ARG_TYPE_STR);
#endif
// Register NVS functions
-void register_nvs();
+void register_nvs(void);
#ifdef __cplusplus
}
static const char *TAG = "cmd_system";
-static void register_free();
-static void register_heap();
-static void register_version();
-static void register_restart();
-static void register_deep_sleep();
-static void register_light_sleep();
+static void register_free(void);
+static void register_heap(void);
+static void register_version(void);
+static void register_restart(void);
+static void register_deep_sleep(void);
+static void register_light_sleep(void);
#if WITH_TASKS_INFO
-static void register_tasks();
+static void register_tasks(void);
#endif
-void register_system()
+void register_system(void)
{
register_free();
register_heap();
return 0;
}
-static void register_version()
+static void register_version(void)
{
const esp_console_cmd_t cmd = {
.command = "version",
esp_restart();
}
-static void register_restart()
+static void register_restart(void)
{
const esp_console_cmd_t cmd = {
.command = "restart",
return 0;
}
-static void register_free()
+static void register_free(void)
{
const esp_console_cmd_t cmd = {
.command = "free",
return 0;
}
-static void register_heap()
+static void register_heap(void)
{
const esp_console_cmd_t heap_cmd = {
.command = "heap",
return 0;
}
-static void register_tasks()
+static void register_tasks(void)
{
const esp_console_cmd_t cmd = {
.command = "tasks",
esp_deep_sleep_start();
}
-static void register_deep_sleep()
+static void register_deep_sleep(void)
{
deep_sleep_args.wakeup_time =
arg_int0("t", "time", "<t>", "Wake up time, ms");
return 0;
}
-static void register_light_sleep()
+static void register_light_sleep(void)
{
light_sleep_args.wakeup_time =
arg_int0("t", "time", "<t>", "Wake up time, ms");
#endif
// Register system functions
-void register_system();
+void register_system(void);
#ifdef __cplusplus
}
return 0;
}
-void register_wifi()
+void register_wifi(void)
{
join_args.timeout = arg_int0(NULL, "timeout", "<t>", "Connection timeout, ms");
join_args.ssid = arg_str1(NULL, NULL, "<ssid>", "SSID of AP");
#endif
// Register WiFi functions
-void register_wifi();
+void register_wifi(void);
#ifdef __cplusplus
}
#define MOUNT_PATH "/data"
#define HISTORY_PATH MOUNT_PATH "/history.txt"
-static void initialize_filesystem()
+static void initialize_filesystem(void)
{
static wl_handle_t wl_handle;
const esp_vfs_fat_mount_config_t mount_config = {
}
#endif // CONFIG_STORE_HISTORY
-static void initialize_nvs()
+static void initialize_nvs(void)
{
esp_err_t err = nvs_flash_init();
if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
ESP_ERROR_CHECK(err);
}
-static void initialize_console()
+static void initialize_console(void)
{
/* Disable buffering on stdin */
setvbuf(stdin, NULL, _IONBF, 0);
#endif
}
-void app_main()
+void app_main(void)
{
initialize_nvs();
};
/* Inside .cpp file, app_main function must be declared with C linkage */
-extern "C" void app_main()
+extern "C" void app_main(void)
{
cout << "app_main starting" << endl;
return cfg;
}
-extern "C" void app_main()
+extern "C" void app_main(void)
{
// Create a thread using deafult values that can run on any core
auto cfg = esp_pthread_get_default_config();
* The program monitors on-chip temperature sensor and wakes up the SoC when
* the temperature goes lower or higher than certain thresholds.
*/
-static void start_ulp_temperature_monitoring();
+static void start_ulp_temperature_monitoring(void);
/**
* @brief Utility function which reads data written by ULP program
static void calibrate_touch_pad(touch_pad_t pad);
#endif
-void app_main()
+void app_main(void)
{
struct timeval now;
gettimeofday(&now, NULL);
#endif // CONFIG_ENABLE_TOUCH_WAKEUP
#ifdef CONFIG_ENABLE_ULP_TEMPERATURE_WAKEUP
-static void start_ulp_temperature_monitoring()
+static void start_ulp_temperature_monitoring(void)
{
/*
* This ULP program monitors the on-chip temperature sensor and wakes the chip up when
static const char* TAG = "example";
-void app_main()
+void app_main(void)
{
/* Create two timers:
* 1. a periodic timer which will run every 0.5s, and print a message
}
}
-void app_main()
+void app_main(void)
{
//Allow other core to finish initialization
vTaskDelay(pdMS_TO_TICKS(100));
}
}
-void app_main()
+void app_main(void)
{
xTaskCreate(&blink_task, "blink_task", configMINIMAL_STACK_SIZE, NULL, 5, NULL);
}
}
-void app_main()
+void app_main(void)
{
size_t memcnt=esp_himem_get_phys_size();
size_t memfree=esp_himem_get_free_size();
/* "Boot" button on GPIO0 is active low */
#define BUTTON_WAKEUP_LEVEL_DEFAULT 0
-void app_main()
+void app_main(void)
{
/* Configure the button GPIO as input, enable wakeup */
const int button_gpio_num = BUTTON_GPIO_NUM_DEFAULT;
return count;
}
-void app_main()
+void app_main(void)
{
char packet[128];
}
}
-void app_main()
+void app_main(void)
{
// Initialize NVS.
esp_err_t err = nvs_flash_init();
esp_http_client_cleanup(client);
}
-static void __attribute__((noreturn)) task_fatal_error()
+static void __attribute__((noreturn)) task_fatal_error(void)
{
ESP_LOGE(TAG, "Exiting task due to fatal error...");
(void)vTaskDelete(NULL);
return diagnostic_is_ok;
}
-void app_main()
+void app_main(void)
{
uint8_t sha_256[HASH_LEN] = { 0 };
esp_partition_t partition;
static const char *TAG = "example";
-void app_main()
+void app_main(void)
{
ESP_LOGI(TAG, "OTA Tool Example");
}
}
-void app_main()
+void app_main(void)
{
// Initialize NVS.
esp_err_t err = nvs_flash_init();
static int uart_fd = -1;
static int socket_fd = -1;
-static void socket_deinit()
+static void socket_deinit(void)
{
close(socket_fd);
socket_fd = -1;
}
-static void socket_init()
+static void socket_init(void)
{
const struct addrinfo hints = {
.ai_family = AF_INET,
freeaddrinfo(res);
}
-static void uart1_deinit()
+static void uart1_deinit(void)
{
close(uart_fd);
uart_fd = -1;
UART1.conf0.loopback = 0;
}
-static void uart1_init()
+static void uart1_init(void)
{
uart_config_t uart_config = {
.baud_rate = 115200,
vTaskDelete(NULL);
}
-void app_main()
+void app_main(void)
{
xTaskCreate(uart1_write_task, "uart1_write_task", 4*1024, NULL, 5, NULL);
xTaskCreate(socket_write_task, "socket_write_task", 4*1024, NULL, 5, NULL);
}
}
-void app_main()
+void app_main(void)
{
static example_event_data_t event_data[portNUM_PROCESSORS] = {
{
while(1);
}
-void app_main()
+void app_main(void)
{
// redirect log messages to the host using SystemView tracing module
esp_log_set_vprintf(&esp_sysview_vprintf);
}
}
-void app_main()
+void app_main(void)
{
printf("Initialize TWDT\n");
//Initialize or reinitialize TWDT
extern const uint8_t ulp_main_bin_start[] asm("_binary_ulp_main_bin_start");
extern const uint8_t ulp_main_bin_end[] asm("_binary_ulp_main_bin_end");
-static void init_ulp_program();
-static void update_pulse_count();
+static void init_ulp_program(void);
+static void update_pulse_count(void);
-void app_main()
+void app_main(void)
{
esp_sleep_wakeup_cause_t cause = esp_sleep_get_wakeup_cause();
if (cause != ESP_SLEEP_WAKEUP_ULP) {
esp_deep_sleep_start();
}
-static void init_ulp_program()
+static void init_ulp_program(void)
{
esp_err_t err = ulp_load_binary(0, ulp_main_bin_start,
(ulp_main_bin_end - ulp_main_bin_start) / sizeof(uint32_t));
ESP_ERROR_CHECK(err);
}
-static void update_pulse_count()
+static void update_pulse_count(void)
{
const char* namespace = "plusecnt";
const char* count_key = "count";
/* This function is called once after power-on reset, to load ULP program into
* RTC memory and configure the ADC.
*/
-static void init_ulp_program();
+static void init_ulp_program(void);
/* This function is called every time before going into deep sleep.
* It starts the ULP program and resets measurement counter.
*/
-static void start_ulp_program();
+static void start_ulp_program(void);
-void app_main()
+void app_main(void)
{
esp_sleep_wakeup_cause_t cause = esp_sleep_get_wakeup_cause();
if (cause != ESP_SLEEP_WAKEUP_ULP) {
esp_deep_sleep_start();
}
-static void init_ulp_program()
+static void init_ulp_program(void)
{
esp_err_t err = ulp_load_binary(0, ulp_main_bin_start,
(ulp_main_bin_end - ulp_main_bin_start) / sizeof(uint32_t));
esp_deep_sleep_disable_rom_logging(); // suppress boot messages
}
-static void start_ulp_program()
+static void start_ulp_program(void)
{
/* Reset sample counter */
ulp_sample_counter = 0;
static void print_banner(const char* text);
-void app_main()
+void app_main(void)
{
/* These are the different ways of running registered tests.
* In practice, only one of them is usually needed.
esp_now_deinit();
}
-void app_main()
+void app_main(void)
{
// Initialize NVS
esp_err_t ret = nvs_flash_init();
}
}
-void wifi_init_softap()
+void wifi_init_softap(void)
{
tcpip_adapter_init();
ESP_ERROR_CHECK(esp_event_loop_create_default());
EXAMPLE_ESP_WIFI_SSID, EXAMPLE_ESP_WIFI_PASS);
}
-void app_main()
+void app_main(void)
{
//Initialize NVS
esp_err_t ret = nvs_flash_init();
}
}
-void wifi_init_sta()
+void wifi_init_sta(void)
{
s_wifi_event_group = xEventGroupCreate();
EXAMPLE_ESP_WIFI_SSID, EXAMPLE_ESP_WIFI_PASS);
}
-void app_main()
+void app_main(void)
{
//Initialize NVS
esp_err_t ret = nvs_flash_init();
return 0;
}
-void register_wifi()
+void register_wifi(void)
{
sta_args.ssid = arg_str1(NULL, NULL, "<ssid>", "SSID of AP");
sta_args.password = arg_str0(NULL, NULL, "<pass>", "password of AP");
#define WIFI_CONNECTED_BIT BIT0
-static void initialize_console()
+static void initialize_console(void)
{
/* Disable buffering on stdin */
setvbuf(stdin, NULL, _IONBF, 0);
esp_wifi_set_ps(DEFAULT_PS_MODE);
}
-void app_main()
+void app_main(void)
{
// Initialize NVS
esp_err_t ret = nvs_flash_init();
ESP_ERROR_CHECK(esp_wifi_start());
}
-void app_main()
+void app_main(void)
{
// Initialize NVS
esp_err_t ret = nvs_flash_init();
return ret % max_num;
}
-static void create_wifi_filter_hashtable()
+static void create_wifi_filter_hashtable(void)
{
char *wifi_filter_keys[SNIFFER_WLAN_FILTER_MAX] = {"mgmt", "data", "ctrl", "misc", "mpdu", "ampdu"};
uint32_t wifi_filter_values[SNIFFER_WLAN_FILTER_MAX] = {WIFI_PROMIS_FILTER_MASK_MGMT, WIFI_PROMIS_FILTER_MASK_DATA,
return 0;
}
-void register_sniffer()
+void register_sniffer(void)
{
sniffer_args.file = arg_str0("f", "file", "<file>",
"name of the file storing the packets in pcap format");
SNIFFER_WLAN_FILTER_MAX
} sniffer_wlan_filter_t;
-void register_sniffer();
+void register_sniffer(void);
#ifdef __cplusplus
}
#if CONFIG_SNIFFER_STORE_HISTORY
/* Initialize filesystem for command history store */
-static void initialize_filesystem()
+static void initialize_filesystem(void)
{
static wl_handle_t wl_handle;
const esp_vfs_fat_mount_config_t mount_config = {
}
#endif
-static void initialize_nvs()
+static void initialize_nvs(void)
{
esp_err_t err = nvs_flash_init();
if (err == ESP_ERR_NVS_NO_FREE_PAGES || err == ESP_ERR_NVS_NEW_VERSION_FOUND) {
}
/* Initialize wifi with tcp/ip adapter */
-static void initialize_wifi()
+static void initialize_wifi(void)
{
tcpip_adapter_init();
ESP_ERROR_CHECK(esp_event_loop_create_default());
}
/* Initialize console component */
-static void initialize_console()
+static void initialize_console(void)
{
/* Disable buffering on stdin */
setvbuf(stdin, NULL, _IONBF, 0);
return 0;
}
-static void register_mount()
+static void register_mount(void)
{
mount_args.device = arg_str1(NULL, NULL, "<sd>", "choose a proper device to mount/unmount");
mount_args.end = arg_end(1);
return 0;
}
-static void register_unmount()
+static void register_unmount(void)
{
mount_args.device = arg_str1(NULL, NULL, "<sd>", "choose a proper device to mount/unmount");
mount_args.end = arg_end(1);
}
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK( nvs_flash_init() );
initialise_wifi();
}
}
-void app_main()
+void app_main(void)
{
ESP_ERROR_CHECK( nvs_flash_init() );
initialise_wifi();
ESP_ERROR_CHECK(esp_wifi_wps_start(0));
}
-void app_main()
+void app_main(void)
{
/* Initialize NVS — it is used to store PHY calibration data */
esp_err_t ret = nvs_flash_init();
}
}
-void app_main()
+void app_main(void)
{
xTaskCreatePinnedToCore(&blink_task, "blink_task", 2048, NULL, 5, NULL, 0);
}
mkattrn(FUNCTION_TEXT, A_REVERSE);
}
-void set_colors()
+void set_colors(void)
{
start_color();
use_default_colors();
/* Return the 'flash_test' custom data partition (type 0x55)
defined in the custom partition table.
*/
-const esp_partition_t *get_test_data_partition();
+const esp_partition_t *get_test_data_partition(void);
/**
* @brief Initialize reference clock
* Reference clock provides timestamps at constant 1 MHz frequency, even when
* the APB frequency is changing.
*/
-void ref_clock_init();
+void ref_clock_init(void);
/**
* @brief Deinitialize reference clock
*/
-void ref_clock_deinit();
+void ref_clock_deinit(void);
/**
* @brief Get reference clock timestamp
* @return number of microseconds since the reference clock was initialized
*/
-uint64_t ref_clock_get();
+uint64_t ref_clock_get(void);
/**
* @brief Entry point of the test application
*
* Starts Unity test runner in a separate task and returns.
*/
-void test_main();
+void test_main(void);
/**
* @brief Reset automatic leak checking which happens in unit tests.
static portMUX_TYPE s_lock = portMUX_INITIALIZER_UNLOCKED;
static volatile uint32_t s_milliseconds;
-void ref_clock_init()
+void ref_clock_init(void)
{
assert(s_intr_handle == NULL && "already initialized");
portEXIT_CRITICAL_ISR(&s_lock);
}
-void ref_clock_deinit()
+void ref_clock_deinit(void)
{
assert(s_intr_handle && "deinit called without init");
periph_module_disable(PERIPH_PCNT_MODULE);
}
-uint64_t ref_clock_get()
+uint64_t ref_clock_get(void)
{
portENTER_CRITICAL(&s_lock);
uint32_t microseconds = PCNT.cnt_unit[REF_CLOCK_PCNT_UNIT].cnt_val;
unity_run_menu(); /* Doesn't return */
}
-void test_main()
+void test_main(void)
{
// Note: if unpinning this task, change the way run times are calculated in
// unity_port_esp32.c
TEST_ASSERT_MESSAGE(leaked <= critical_leak_threshold, "The test leaked too much memory");
}
-static bool leak_check_required()
+static bool leak_check_required(void)
{
warn_leak_threshold = test_utils_get_leak_level(TYPE_LEAK_WARNING, COMP_LEAK_ALL);
critical_leak_threshold = test_utils_get_leak_level(TYPE_LEAK_CRITICAL, COMP_LEAK_ALL);
#include "tcpip_adapter.h"
#include "lwip/sockets.h"
-const esp_partition_t *get_test_data_partition()
+const esp_partition_t *get_test_data_partition(void)
{
/* This finds "flash_test" partition defined in partition_table_unit_test_app.csv */
const esp_partition_t *result = esp_partition_find_first(ESP_PARTITION_TYPE_DATA,
return result;
}
-void test_case_uses_tcpip()
+void test_case_uses_tcpip(void)
{
// Can be called more than once, does nothing on subsequent calls
tcpip_adapter_init();
#include "test_utils.h"
-void app_main()
+void app_main(void)
{
test_main();
}
};
#ifdef WITH_DEBUG
-static void print_last_error()
+static void print_last_error(void)
{
DWORD dw;
TCHAR errmsg[LINESIZE];
#define PRINT_LAST_ERROR()
#endif
-static proc_instance_t *proc_instance_allocate()
+static proc_instance_t *proc_instance_allocate(void)
{
return (proc_instance_t*) HeapAlloc(GetProcessHeap(), HEAP_ZERO_MEMORY, sizeof(proc_instance_t));
}
projects / esp-idf / commitdiff