bool HasF16C;
bool HasAVX512CD, HasAVX512ER, HasAVX512PF;
bool HasSHA;
+ bool HasCX16;
/// \brief Enumeration of all of the X86 CPUs supported by Clang.
///
HasRDRND(false), HasBMI(false), HasBMI2(false), HasPOPCNT(false),
HasRTM(false), HasPRFCHW(false), HasRDSEED(false), HasTBM(false),
HasFMA(false), HasF16C(false), HasAVX512CD(false), HasAVX512ER(false),
- HasAVX512PF(false), HasSHA(false), CPU(CK_Generic), FPMath(FP_Default) {
+ HasAVX512PF(false), HasSHA(false), HasCX16(false), CPU(CK_Generic),
+ FPMath(FP_Default) {
BigEndian = false;
LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
}
case CK_Prescott:
case CK_Nocona:
setFeatureEnabledImpl(Features, "sse3", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
break;
case CK_Core2:
setFeatureEnabledImpl(Features, "ssse3", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
break;
case CK_Penryn:
setFeatureEnabledImpl(Features, "sse4.1", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
break;
case CK_Atom:
setFeatureEnabledImpl(Features, "ssse3", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
break;
case CK_Silvermont:
setFeatureEnabledImpl(Features, "sse4.2", true);
setFeatureEnabledImpl(Features, "aes", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
setFeatureEnabledImpl(Features, "pclmul", true);
break;
case CK_Corei7:
setFeatureEnabledImpl(Features, "sse4.2", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
break;
case CK_Corei7AVX:
setFeatureEnabledImpl(Features, "avx", true);
setFeatureEnabledImpl(Features, "aes", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
setFeatureEnabledImpl(Features, "pclmul", true);
break;
case CK_CoreAVXi:
setFeatureEnabledImpl(Features, "bmi2", true);
setFeatureEnabledImpl(Features, "rtm", true);
setFeatureEnabledImpl(Features, "fma", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
break;
case CK_KNL:
setFeatureEnabledImpl(Features, "avx512f", true);
case CK_BTVER1:
setFeatureEnabledImpl(Features, "ssse3", true);
setFeatureEnabledImpl(Features, "sse4a", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
setFeatureEnabledImpl(Features, "lzcnt", true);
setFeatureEnabledImpl(Features, "popcnt", true);
break;
setFeatureEnabledImpl(Features, "pclmul", true);
setFeatureEnabledImpl(Features, "bmi", true);
setFeatureEnabledImpl(Features, "f16c", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
break;
case CK_BDVER1:
setFeatureEnabledImpl(Features, "xop", true);
setFeatureEnabledImpl(Features, "lzcnt", true);
setFeatureEnabledImpl(Features, "aes", true);
setFeatureEnabledImpl(Features, "pclmul", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
break;
case CK_BDVER2:
setFeatureEnabledImpl(Features, "xop", true);
setFeatureEnabledImpl(Features, "fma", true);
setFeatureEnabledImpl(Features, "f16c", true);
setFeatureEnabledImpl(Features, "tbm", true);
+ setFeatureEnabledImpl(Features, "cx16", true);
break;
case CK_C3_2:
setFeatureEnabledImpl(Features, "sse", true);
continue;
}
+ if (Feature == "cx16") {
+ HasCX16 = true;
+ continue;
+ }
+
assert(Features[i][0] == '+' && "Invalid target feature!");
X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
.Case("avx512f", AVX512F)
if (HasSHA)
Builder.defineMacro("__SHA__");
+ if (HasCX16)
+ Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16");
+
// Each case falls through to the previous one here.
switch (SSELevel) {
case AVX512F:
.Case("avx512pf", HasAVX512PF)
.Case("bmi", HasBMI)
.Case("bmi2", HasBMI2)
+ .Case("cx16", HasCX16)
+ .Case("f16c", HasF16C)
.Case("fma", HasFMA)
.Case("fma4", XOPLevel >= FMA4)
.Case("tbm", HasTBM)
.Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
.Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
.Case("xop", XOPLevel >= XOP)
- .Case("f16c", HasF16C)
.Default(false);
}