MachineSSAUpdater: insert IMPLICIT_DEF at top of basic block

Summary:
When getValueInMiddleOfBlock happens to be called for a basic block
that has no incoming value at all, an IMPLICIT_DEF is inserted in that
block via GetValueAtEndOfBlockInternal. This IMPLICIT_DEF must be at
the top of its basic block or it will likely not reach the use that
the caller intends to insert.

Issue: https://github.com/GPUOpen-Drivers/llpc/issues/204

Reviewers: arsenm, rampitec

Subscribers: jvesely, wdng, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68183

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@374040 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/MachineSSAUpdater.cpp b/lib/CodeGen/MachineSSAUpdater.cpp
index 3370b52ede40bdaeaa16d893753d53ff15b77dc9..258a5f9e0482096cd66d703753f39f1d6481c5c5 100644 (file)
--- a/lib/CodeGen/MachineSSAUpdater.cpp
+++ b/lib/CodeGen/MachineSSAUpdater.cpp
@@ -292,7 +292,7 @@ public:
                               MachineSSAUpdater *Updater) {
     // Insert an implicit_def to represent an undef value.
     MachineInstr *NewDef = InsertNewDef(TargetOpcode::IMPLICIT_DEF,
-                                        BB, BB->getFirstTerminator(),
+                                        BB, BB->getFirstNonPHI(),
                                         Updater->VRC, Updater->MRI,
                                         Updater->TII);
     return NewDef->getOperand(0).getReg();

diff --git a/test/CodeGen/AMDGPU/si-i1-copies.mir b/test/CodeGen/AMDGPU/si-i1-copies.mir
new file mode 100644 (file)
index 0000000..2cb854b
--- /dev/null
+++ b/test/CodeGen/AMDGPU/si-i1-copies.mir
@@ -0,0 +1,28 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -run-pass=si-i1-copies -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GCN %s
+
+# Test that the new IMPLICIT_DEF is inserted in the correct location.
+---
+name:            test_undef
+tracksRegLiveness: true
+body:             |
+  ; GCN-LABEL: name: test_undef
+  ; GCN: bb.0:
+  ; GCN:   successors: %bb.1(0x80000000)
+  ; GCN:   S_BRANCH %bb.1
+  ; GCN: bb.1:
+  ; GCN:   [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
+  ; GCN:   [[COPY:%[0-9]+]]:sreg_64_xexec = COPY [[DEF]]
+  ; GCN:   [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, [[COPY]], implicit $exec
+  bb.0:
+    successors: %bb.1
+
+    %0:vreg_1 = IMPLICIT_DEF
+    S_BRANCH %bb.1
+
+  bb.1:
+    %1:vreg_1 = PHI %0, %bb.0
+    %2:sreg_64_xexec = COPY %1
+    %3:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, %2, implicit $exec
+
+...