[AArch64] Change a test to use a generic instr instead of a target specific one.

Target specific instructions have requirements that are not compatible
with what we want to test here. Namely, target specific instructions
must have their operands properly mapped on register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@290379 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir b/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
index 881df5a124abfe09e940504af306a32a338de6bb..4c67c0daaf7449176a7ea672b0ae94ddfedcf450 100644 (file)
--- a/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
+++ b/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
@@ -219,7 +219,7 @@ body: |
 
     %0 = LDRWui killed %x0, 0 :: (load 4 from %ir.src)
     %5(s32) = COPY %0
-    %1 = COPY %x1
+    %1(p0) = COPY %x1
     %2 = COPY %w2
     TBNZW killed %2, 0, %bb.2.end
 
@@ -229,7 +229,7 @@ body: |
 
   bb.2.end:
     %4(s32) = PHI %0, %bb.0.entry, %3, %bb.1.then
-    STRWui killed %4, killed %1, 0 :: (store 4 into %ir.dst)
+    G_STORE killed %4, killed %1 :: (store 4 into %ir.dst)
     RET_ReallyLR
 ...