// X86 is weird, it always uses i8 for shift amounts and setcc results.
setBooleanContents(ZeroOrOneBooleanContent);
- setSchedulingPreference(Sched::ILP);
+
+ // For 64-bit since we have so many registers use the ILP scheduler, for
+ // 32-bit code use the register pressure specific scheduling.
+ if (Subtarget->is64Bit())
+ setSchedulingPreference(Sched::ILP);
+ else
+ setSchedulingPreference(Sched::RegPressure);
setStackPointerRegisterToSaveRestore(X86StackPtr);
if (Subtarget->isTargetWindows() && !Subtarget->isTargetCygMing()) {
-; XFAIL: *
; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& \
; RUN: not grep {Number of register spills}
; END.
; Check that eh_return & unwind_init were properly lowered
; RUN: llc < %s | grep %ebp | count 7
-; RUN: llc < %s | grep %edx | count 5
+; RUN: llc < %s | grep %ecx | count 5
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i386-pc-linux"
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | grep pcmpeqd | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | grep orps | grep CPI0_2 | count 2
; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
; This testcase shouldn't need to spill the -1 value,
-; XFAIL: *
; RUN: llc < %s -mcpu=i486 | grep fstpl | count 5
; RUN: llc < %s -mcpu=i486 | grep fstps | count 2
; PR1505
; RUN: llc -march=x86 -mattr=+sse < %s | FileCheck %s
-; CHECK: divps
; CHECK: divss
; CHECK: divps
+; CHECK: divps
%vec = type <9 x float>
define %vec @vecdiv( %vec %p1, %vec %p2)