Fix a typo in comment in msftc/arm.h

* src/atomic_ops/sysdeps/msftc/arm.h: Fix a typo in comment (about
SWP).

diff --git a/src/atomic_ops/sysdeps/msftc/arm.h b/src/atomic_ops/sysdeps/msftc/arm.h
index 18fa11c1614db4d88080ef0320fe967879ee56eb..9391ceee5f78034b7703697ef5722c759ccb7d98 100644 (file)
--- a/src/atomic_ops/sysdeps/msftc/arm.h
+++ b/src/atomic_ops/sysdeps/msftc/arm.h
@@ -81,9 +81,9 @@ AO_store_full(volatile AO_t *addr, AO_t value)
 
 #else /* _M_ARM < 6 */
 
-/* Some slide set, if it has been red correctly, claims that Loads      */
+/* Some ARM slide set, if it has been read correctly, claims that Loads */
 /* followed by either a Load or a Store are ordered, but nothing        */
-/* else is. It appears that SWP is the only simple memory barrier.      */
+/* else is.  It appears that SWP is the only simple memory barrier.     */
 #include "../all_atomic_load_store.h"
 
 #include "../test_and_set_t_is_ao_t.h"