[AArch64][AsmParser] Fix .arch_extension directive parsing

This patch fixes .arch_extension directive parsing to handle a wider
range of architecture extension options. The existing parser was parsing
extensions as an identifier which breaks for extensions containing a
"-", such as the "tlb-rmi" extension.

The extension is now parsed as a string. This is consistent with the
extension parsing in the .arch and .cpu directive parsing.

Patch by Cullen Rhodes (c-rhodes)

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D60118

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357677 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 7c3cdb1423e87d2008d69086a439922f282c2381..37d4c9a3f8a722c9347b0ab1fc3fc3d75b39d2e4 100644 (file)
--- a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -5153,15 +5153,9 @@ bool AArch64AsmParser::parseDirectiveArch(SMLoc L) {
 /// parseDirectiveArchExtension
 ///   ::= .arch_extension [no]feature
 bool AArch64AsmParser::parseDirectiveArchExtension(SMLoc L) {
-  MCAsmParser &Parser = getParser();
-
-  if (getLexer().isNot(AsmToken::Identifier))
-    return Error(getLexer().getLoc(), "expected architecture extension name");
+  SMLoc ExtLoc = getLoc();
 
-  const AsmToken &Tok = Parser.getTok();
-  StringRef Name = Tok.getString();
-  SMLoc ExtLoc = Tok.getLoc();
-  Lex();
+  StringRef Name = getParser().parseStringToEndOfStatement().trim();
 
   if (parseToken(AsmToken::EndOfStatement,
                  "unexpected token in '.arch_extension' directive"))

diff --git a/test/MC/AArch64/SVE/directive-arch_extension-negative.s b/test/MC/AArch64/SVE/directive-arch_extension-negative.s
new file mode 100644 (file)
index 0000000..b07afa6
--- /dev/null
+++ b/test/MC/AArch64/SVE/directive-arch_extension-negative.s
@@ -0,0 +1,7 @@
+// RUN: not llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
+
+.arch_extension nosve
+
+ptrue   p0.b, pow2
+// CHECK: error: instruction requires: sve
+// CHECK-NEXT: ptrue   p0.b, pow2

diff --git a/test/MC/AArch64/SVE/directive-arch_extension.s b/test/MC/AArch64/SVE/directive-arch_extension.s
new file mode 100644 (file)
index 0000000..72351b6
--- /dev/null
+++ b/test/MC/AArch64/SVE/directive-arch_extension.s
@@ -0,0 +1,6 @@
+// RUN: llvm-mc -triple=aarch64 < %s | FileCheck %s
+
+.arch_extension sve
+
+ptrue   p0.b, pow2
+// CHECK: ptrue   p0.b, pow2

diff --git a/test/MC/AArch64/directive-arch_extension-negative.s b/test/MC/AArch64/directive-arch_extension-negative.s
new file mode 100644 (file)
index 0000000..61351e1
--- /dev/null
+++ b/test/MC/AArch64/directive-arch_extension-negative.s
@@ -0,0 +1,80 @@
+// RUN: not llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
+
+.arch_extension axp64
+// CHECK: error: unknown architectural extension: axp64
+// CHECK-NEXT: .arch_extension axp64
+
+.arch_extension nocrc
+crc32cx w0, w1, x3
+// CHECK: error: instruction requires: crc
+// CHECK-NEXT: crc32cx w0, w1, x3
+
+.arch_extension nosm4
+sm4e v2.4s, v15.4s
+// CHECK: error: instruction requires: sm4
+// CHECK-NEXT: sm4e v2.4s, v15.4s
+
+.arch_extension nosha3
+sha512h q0, q1, v2.2d
+// CHECK: error: instruction requires: sha3
+// CHECK-NEXT: sha512h q0, q1, v2.2d
+
+.arch_extension nosha2
+sha1h s0, s1
+// CHECK: error: instruction requires: sha2
+// CHECK-NEXT: sha1h s0, s1
+
+.arch_extension noaes
+aese v0.16b, v1.16b
+// CHECK: error: instruction requires: aes
+// CHECK-NEXT: aese v0.16b, v1.16b
+
+.arch_extension nofp
+fminnm d0, d0, d1
+// CHECK: error: instruction requires: fp
+// CHECK-NEXT: fminnm d0, d0, d1
+
+.arch_extension nosimd
+addp v0.4s, v0.4s, v0.4s
+// CHECK: error: instruction requires: neon
+// CHECK-NEXT: addp v0.4s, v0.4s, v0.4s
+
+.arch_extension noras
+esb
+// CHECK: error: instruction requires: ras
+// CHECK-NEXT: esb
+
+.arch_extension nolse
+casa w5, w7, [x20]
+// CHECK: error: instruction requires: lse
+// CHECK-NEXT: casa w5, w7, [x20]
+
+.arch_extension nopredres
+cfp rctx, x0
+// CHECK: error: CFPRCTX requires predres
+// CHECK-NEXT: cfp rctx, x0
+
+.arch_extension noccdp
+dc cvadp, x7
+// CHECK: error: DC CVADP requires ccdp
+// CHECK-NEXT: dc cvadp, x7
+
+.arch_extension nomte
+irg x0, x1
+// CHECK: error: instruction requires: mte
+// CHECK-NEXT: irg x0, x1
+
+.arch_extension notlb-rmi
+tlbi vmalle1os
+// CHECK: error: TLBI VMALLE1OS requires tlb-rmi
+// CHECK-NEXT: tlbi vmalle1os
+
+.arch_extension nopan-rwv
+at s1e1wp, x2
+// CHECK: error: AT S1E1WP requires pan-rwv
+// CHECK-NEXT: at s1e1wp, x2
+
+.arch_extension noccpp
+dc cvap, x7
+// CHECK: error: DC CVAP requires ccpp
+// CHECK-NEXT: dc cvap, x7

diff --git a/test/MC/AArch64/directive-arch_extension-nosimd.s b/test/MC/AArch64/directive-arch_extension-nosimd.s
deleted file mode 100644 (file)
index cbc03d0..0000000
--- a/test/MC/AArch64/directive-arch_extension-nosimd.s
+++ /dev/null
@@ -1,6 +0,0 @@
-// RUN: not llvm-mc -triple aarch64 -filetype asm -o - %s 2>&1 | FileCheck %s
-
-       .arch_extension nosimd
-
-       add v0.8b, v0.8b, v0.8b
-// CHECK: error: instruction requires: neon

diff --git a/test/MC/AArch64/directive-arch_extension-simd.s b/test/MC/AArch64/directive-arch_extension-simd.s
deleted file mode 100644 (file)
index 04ebeee..0000000
--- a/test/MC/AArch64/directive-arch_extension-simd.s
+++ /dev/null
@@ -1,6 +0,0 @@
-// RUN: llvm-mc -triple aarch64 -mattr=-simd -filetype asm -o - %s | FileCheck %s
-
-       .arch_extension simd
-
-       add v0.8b, v0.8b, v0.8b
-// CHECK: add v0.8b, v0.8b, v0.8b

diff --git a/test/MC/AArch64/directive-arch_extension.s b/test/MC/AArch64/directive-arch_extension.s
new file mode 100644 (file)
index 0000000..6f1a651
--- /dev/null
+++ b/test/MC/AArch64/directive-arch_extension.s
@@ -0,0 +1,61 @@
+// RUN: llvm-mc -triple aarch64 -filetype asm -o - %s | FileCheck %s
+
+.arch_extension crc
+crc32cx w0, w1, x3
+// CHECK: crc32cx w0, w1, x3
+
+.arch_extension sm4
+sm4e v2.4s, v15.4s
+// CHECK: sm4e v2.4s, v15.4s
+
+.arch_extension sha3
+sha512h q0, q1, v2.2d
+// CHECK: sha512h q0, q1, v2.2d
+
+.arch_extension sha2
+sha1h s0, s1
+// CHECK: sha1h s0, s1
+
+.arch_extension aes
+aese v0.16b, v1.16b
+// CHECK: aese v0.16b, v1.16b
+
+.arch_extension fp
+fminnm d0, d0, d1
+// CHECK: fminnm d0, d0, d1
+
+.arch_extension simd
+addp v0.4s, v0.4s, v0.4s
+// CHECK: addp v0.4s, v0.4s, v0.4s
+
+.arch_extension ras
+esb
+// CHECK: esb
+
+.arch_extension lse
+casa w5, w7, [x20]
+// CHECK: casa w5, w7, [x20]
+
+.arch_extension predres
+cfp rctx, x0
+// CHECK: cfp rctx, x0
+
+.arch_extension ccdp
+dc cvadp, x7
+// CHECK: dc cvadp, x7
+
+.arch_extension mte
+irg x0, x1
+// CHECK: irg x0, x1
+
+.arch_extension tlb-rmi
+tlbi vmalle1os
+// CHECK: tlbi vmalle1os
+
+.arch_extension pan-rwv
+at s1e1wp, x2
+// CHECK: at s1e1wp, x2
+
+.arch_extension ccpp
+dc cvap, x7
+// CHECK: dc cvap, x7