ret i32 %Q
}
+define <2 x i32> @fold_zext_xor_sandwich_vec(<2 x i1> %X) {
+; CHECK-LABEL: @fold_zext_xor_sandwich_vec(
+; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i1> %X to <2 x i32>
+; CHECK-NEXT: [[Q:%.*]] = xor <2 x i32> [[TMP1]], <i32 3, i32 3>
+; CHECK-NEXT: ret <2 x i32> [[Q]]
+;
+ %Y = xor <2 x i1> %X, <i1 true, i1 true>
+ %Z = zext <2 x i1> %Y to <2 x i32>
+ %Q = xor <2 x i32> %Z, <i32 2, i32 2>
+ ret <2 x i32> %Q
+}
+
define i1 @test23(i32 %a, i32 %b) {
; CHECK-LABEL: @test23(
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 %b, 0
ret <2 x i64> %zext
}
+; FIXME: If the xor was done in the smaller type, the back-to-back zexts would get combined.
+
+define i64 @fold_xor_zext_sandwich(i1 %a) {
+; CHECK-LABEL: @fold_xor_zext_sandwich(
+; CHECK-NEXT: [[ZEXT1:%.*]] = zext i1 %a to i32
+; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[ZEXT1]], 1
+; CHECK-NEXT: [[ZEXT2:%.*]] = zext i32 [[XOR]] to i64
+; CHECK-NEXT: ret i64 [[ZEXT2]]
+;
+ %zext1 = zext i1 %a to i32
+ %xor = xor i32 %zext1, 1
+ %zext2 = zext i32 %xor to i64
+ ret i64 %zext2
+}
+
+define <2 x i64> @fold_xor_zext_sandwich_vec(<2 x i1> %a) {
+; CHECK-LABEL: @fold_xor_zext_sandwich_vec(
+; CHECK-NEXT: [[ZEXT1:%.*]] = zext <2 x i1> %a to <2 x i64>
+; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i64> [[ZEXT1]], <i64 1, i64 1>
+; CHECK-NEXT: ret <2 x i64> [[XOR]]
+;
+ %zext1 = zext <2 x i1> %a to <2 x i32>
+ %xor = xor <2 x i32> %zext1, <i32 1, i32 1>
+ %zext2 = zext <2 x i32> %xor to <2 x i64>
+ ret <2 x i64> %zext2
+}
+