#if defined(__i386__)
#define NEED_I386_TAS_ASM
#define HAS_TEST_AND_SET
+typedef unsigned char slock_t;
#endif
#if defined(__sparc__)
#define NEED_SPARC_TAS_ASM
#define HAS_TEST_AND_SET
+typedef unsigned char slock_t;
#endif
#if defined(__vax__)
#define NEED_VAX_TAS_ASM
#define HAS_TEST_AND_SET
+typedef unsigned char slock_t;
#endif
#if defined(__ns32k__)
#define NEED_NS32K_TAS_ASM
#define HAS_TEST_AND_SET
+typedef unsigned char slock_t;
#endif
#if defined(__m68k__)
#define HAS_TEST_AND_SET
+typedef unsigned char slock_t;
#endif
#if defined(__arm__)
#define HAS_TEST_AND_SET
+typedef unsigned char slock_t;
#endif
#if defined(__mips__)
/* # undef HAS_TEST_AND_SET */
#endif
-#if defined(__powerpc__)
+#if defined(__alpha__)
#define HAS_TEST_AND_SET
+typedef unsigned long slock_t;
#endif
#if defined(__powerpc__)
+#define HAS_TEST_AND_SET
typedef unsigned int slock_t;
-
-#else
-typedef unsigned char slock_t;
-
#endif
*
*
* IDENTIFICATION
- * $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.84 2001/01/19 21:09:57 momjian Exp $
+ * $Header: /cvsroot/pgsql/src/include/storage/s_lock.h,v 1.85 2001/01/20 00:03:54 tgl Exp $
*
*-------------------------------------------------------------------------
*/
*/
/*
- * Standard _asm format:
+ * Standard gcc asm format:
*
- * __asm__ __volatile__(
- "command \n"
- "command \n"
- "command \n"
-: "=r"(_res) return value, in register
-: "r"(lock) argument, 'lock pointer', in register
-: "r0"); inline code uses this register
+ __asm__ __volatile__(
+ " command \n"
+ " command \n"
+ " command \n"
+: "=r"(_res) return value, in register
+: "r"(lock) argument, 'lock pointer', in register
+: "r0"); inline code uses this register
*/
register slock_t _res = 1;
__asm__ __volatile__(
- "lock \n"
- "xchgb %0,%1 \n"
-: "=q"(_res), "=m"(*lock)
-: "0"(_res));
+ " lock \n"
+ " xchgb %0,%1 \n"
+: "=q"(_res), "=m"(*lock)
+: "0"(_res));
return (int) _res;
}
long int ret;
__asm__ __volatile__(
- "xchg4 %0=%1,%2 \n"
-: "=r"(ret), "=m"(*lock)
-: "r"(1), "1"(*lock)
-: "memory");
+ " xchg4 %0=%1,%2 \n"
+: "=r"(ret), "=m"(*lock)
+: "r"(1), "1"(*lock)
+: "memory");
return (int) ret;
}
register slock_t _res = 1;
__asm__ __volatile__(
- "swpb %0, %0, [%3] \n"
-: "=r"(_res), "=m"(*lock)
-: "0"(_res), "r"(lock));
+ " swpb %0, %0, [%3] \n"
+: "=r"(_res), "=m"(*lock)
+: "0"(_res), "r"(lock));
return (int) _res;
}
int _res;
__asm__ __volatile__(
- "la 1,1 \n"
- "l 2,%2 \n"
- "slr 0,0 \n"
- "cs 0,1,0(2)\n"
- "lr %1,0 \n"
-: "=m"(lock), "=d"(_res)
-: "m"(lock)
-: "0", "1", "2");
+ " la 1,1 \n"
+ " l 2,%2 \n"
+ " slr 0,0 \n"
+ " cs 0,1,0(2) \n"
+ " lr %1,0 \n"
+: "=m"(lock), "=d"(_res)
+: "m"(lock)
+: "0", "1", "2");
return (_res);
}
register slock_t _res = 1;
__asm__ __volatile__(
- "ldstub [%2], %0 \n"
-: "=r"(_res), "=m"(*lock)
-: "r"(lock));
+ " ldstub [%2], %0 \n"
+: "=r"(_res), "=m"(*lock)
+: "r"(lock));
return (int) _res;
}
register int rv;
__asm__ __volatile__(
- "tas %1 \n"
- "sne %0 \n"
-: "=d"(rv), "=m"(*lock)
-: "1"(*lock)
-: "cc");
+ " tas %1 \n"
+ " sne %0 \n"
+: "=d"(rv), "=m"(*lock)
+: "1"(*lock)
+: "cc");
return rv;
}
*/
#define TAS(lock) tas(lock)
-typedef unsigned char slock_t;
-
static __inline__ int
tas(volatile slock_t *lock)
{
register _res;
__asm__ __volatile__(
- "movl $1, r0 \n"
- "bbssi $0, (%1), 1f \n"
- "clrl r0 \n"
- "1: movl r0, %0 \n"
-: "=r"(_res)
-: "r"(lock)
-: "r0");
+ " movl $1, r0 \n"
+ " bbssi $0, (%1), 1f \n"
+ " clrl r0 \n"
+ "1: movl r0, %0 \n"
+: "=r"(_res)
+: "r"(lock)
+: "r0");
return (int) _res;
}
register _res;
__asm__ __volatile__(
- "sbitb 0, %0 \n"
- "sfsd %1 \n"
-: "=m"(*lock), "=r"(_res));
+ " sbitb 0, %0 \n"
+ " sfsd %1 \n"
+: "=m"(*lock), "=r"(_res));
return (int) _res;
}
#define S_UNLOCK(lock) \
do \
{\
- __asm__ __volatile__ ("mb"); \
+ __asm__ __volatile__ (" mb \n"); \
*(lock) = 0; \
} while (0)
register slock_t _res;
__asm__ __volatile__(
- "ldq $0, %0 \n"
- "bne $0, 2f \n"
- "ldq_l %1, %0 \n"
- "bne %1, 2f \n"
- "mov 1, $0 \n"
- "stq_c $0, %0 \n"
- "beq $0, 2f \n"
- "mb \n"
- "br 3f \n"
- "2: mov 1, %1 \n"
- "3: \n"
-: "=m"(*lock), "=r"(_res)
+ " ldq $0, %0 \n"
+ " bne $0, 2f \n"
+ " ldq_l %1, %0 \n"
+ " bne %1, 2f \n"
+ " mov 1, $0 \n"
+ " stq_c $0, %0 \n"
+ " beq $0, 2f \n"
+ " mb \n"
+ " br 3f \n"
+ "2: mov 1, %1 \n"
+ "3: \n"
+: "=m"(*lock), "=r"(_res)
:
-: "0");
+: "0");
return (int) _res;
}