Add westmere CPU (supports AES and CLMUL), redefine sandybridge to add AVX

(FMA won't appear until the 22nm shrink of sandybridge).

Reported by: nasm64developer@users.sf.net

svn path=/trunk/yasm/; revision=2088

diff --git a/modules/arch/x86/x86cpu.gperf b/modules/arch/x86/x86cpu.gperf
index 83e29b5a08252ff6149ae2071d39cfdbfba3293f..526e1569c2e1006bf8cc3d0c82bf97f257ffc925 100644 (file)
--- a/modules/arch/x86/x86cpu.gperf
+++ b/modules/arch/x86/x86cpu.gperf
@@ -47,7 +47,8 @@ RCSID("$Id$");
 #define PROC_conroe    11
 #define PROC_penryn    12
 #define PROC_nehalem   13
-#define PROC_sandybridge 14
+#define PROC_westmere   14
+#define PROC_sandybridge 15
 
 static void
 x86_cpu_intel(wordptr cpu, unsigned int data)
@@ -59,9 +60,9 @@ x86_cpu_intel(wordptr cpu, unsigned int data)
         BitVector_Bit_On(cpu, CPU_Prot);
     if (data >= PROC_386)
         BitVector_Bit_On(cpu, CPU_SMM);
-    if (data >= PROC_sandybridge) {
+    if (data >= PROC_sandybridge)
         BitVector_Bit_On(cpu, CPU_AVX);
-        BitVector_Bit_On(cpu, CPU_FMA);
+    if (data >= PROC_westmere) {
         BitVector_Bit_On(cpu, CPU_AES);
         BitVector_Bit_On(cpu, CPU_CLMUL);
     }
@@ -273,6 +274,7 @@ conroe,             x86_cpu_intel,  PROC_conroe
 core2,         x86_cpu_intel,  PROC_conroe
 penryn,                x86_cpu_intel,  PROC_penryn
 nehalem,       x86_cpu_intel,  PROC_nehalem
+westmere,      x86_cpu_intel,  PROC_westmere
 sandybridge,   x86_cpu_intel,  PROC_sandybridge
 #
 # Features have "no" versions to disable them, and only set/reset the