[ARM] Fix NEON wrongly being enabled with soft-float when targeting armv8/Cortex...

This was caused by r200708 which enabled the crypto feature for these cores.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@201223 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Driver/Tools.cpp b/lib/Driver/Tools.cpp
index 5087ce6816c1ba24b0dab318cf2528b675d4748d..9e71c31c623d67e704913067c529b54dc45910a8 100644 (file)
--- a/lib/Driver/Tools.cpp
+++ b/lib/Driver/Tools.cpp
@@ -718,8 +718,11 @@ static void getARMTargetFeatures(const Driver &D, const llvm::Triple &Triple,
 
   // Setting -msoft-float effectively disables NEON because of the GCC
   // implementation, although the same isn't true of VFP or VFP3.
-  if (FloatABI == "soft")
+  if (FloatABI == "soft") {
     Features.push_back("-neon");
+    // Also need to explicitly disable features which imply NEON.
+    Features.push_back("-crypto");
+  }
 
   // En/disable crc
   if (Arg *A = Args.getLastArg(options::OPT_mcrc,

diff --git a/test/Driver/arm-mfpu.c b/test/Driver/arm-mfpu.c
index 020605b377a76ef955251e2db93833c92d037139..0f9d99593daf8027d7600d7c76b5ead5484e9a43 100644 (file)
--- a/test/Driver/arm-mfpu.c
+++ b/test/Driver/arm-mfpu.c
@@ -63,11 +63,16 @@
 // RUN:   | FileCheck --check-prefix=CHECK-SOFT-FLOAT %s
 // CHECK-SOFT-FLOAT: "-target-feature" "-neon"
 
+// RUN: %clang -target armv8 %s -### 2>&1 \
+// RUN:   | FileCheck --check-prefix=CHECK-ARMV8-DEFAULT-SOFT-FP %s
+// CHECK-ARMV8-DEFAULT-SOFT-FP: "-target-feature" "-neon"
+// CHECK-ARMV8-DEFAULT-SOFT-FP: "-target-feature" "-crypto"
+
 // RUN: %clang -target armv8 -mfpu=fp-armv8 %s -### 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-ARMV8-SOFT-FLOAT %s
 // CHECK-ARMV8-SOFT-FLOAT: "-target-feature" "+fp-armv8"
-// CHECK-ARMV8-SOFT-FLOAT: "-target-feature" "-crypto"
 // CHECK-ARMV8-SOFT-FLOAT: "-target-feature" "-neon"
+// CHECK-ARMV8-SOFT-FLOAT: "-target-feature" "-crypto"
 
 // RUN: %clang -target armv8-linux-gnueabihf -mfpu=fp-armv8 %s -### 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-FP-ARMV8 %s