[CLANG][AVX512][BUILTIN] Adding PSRL{DI|QI}{128|256|512} builtin

Differential Revision: http://reviews.llvm.org/D17714

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@262355 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/clang/Basic/BuiltinsX86.def b/include/clang/Basic/BuiltinsX86.def
index fb6270548c1d888b7c5a1db83dffb6d33bd2ef57..63d4c9ca6f6d137ff3e2e908a37af8847ac9bf8f 100644 (file)
--- a/include/clang/Basic/BuiltinsX86.def
+++ b/include/clang/Basic/BuiltinsX86.def
@@ -1668,6 +1668,16 @@ TARGET_BUILTIN(__builtin_ia32_psrlv2di_mask, "V2LLiV2LLiV2LLiV2LLiUc","","avx512
 TARGET_BUILTIN(__builtin_ia32_psrlv4di_mask, "V4LLiV4LLiV4LLiV4LLiUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_psrlv4si_mask, "V4iV4iV4iV4iUc","","avx512vl")
 TARGET_BUILTIN(__builtin_ia32_psrlv8si_mask, "V8iV8iV8iV8iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrldi512_mask, "V16iV16iiV16iUs","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_psrlqi512_mask, "V8LLiV8LLiiV8LLiUc","","avx512f")
+TARGET_BUILTIN(__builtin_ia32_psrld128_mask, "V4iV4iV4iV4iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrld256_mask, "V8iV8iV4iV8iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrldi128_mask, "V4iV4iIiV4iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrldi256_mask, "V8iV8iIiV8iUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrlq128_mask, "V2LLiV2LLiV2LLiV2LLiUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrlq256_mask, "V4LLiV4LLiV2LLiV4LLiUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrlqi128_mask, "V2LLiV2LLiIiV2LLiUc","","avx512vl")
+TARGET_BUILTIN(__builtin_ia32_psrlqi256_mask, "V4LLiV4LLiIiV4LLiUc","","avx512vl")
 
 #undef BUILTIN
 #undef TARGET_BUILTIN

diff --git a/lib/Headers/avx512fintrin.h b/lib/Headers/avx512fintrin.h
index 4b8636ac9ba9991b23db09d43b491f3b6684b280..2452c479f0cf09145a8ade0246ac03c4c3638bd6 100644 (file)
--- a/lib/Headers/avx512fintrin.h
+++ b/lib/Headers/avx512fintrin.h
@@ -3561,6 +3561,47 @@ __builtin_ia32_psllqi512_mask ((__v8di)( __A),( __B),\
 })
 
 
+
+#define _mm512_srli_epi32( __A, __B) __extension__ ({ \
+__builtin_ia32_psrldi512_mask ((__v16si)( __A),( __B),\
+              (__v16si)\
+              _mm512_setzero_si512 (),\
+              (__mmask16) -1);\
+})
+
+#define _mm512_mask_srli_epi32( __W, __U, __A, __B) __extension__ ({ \
+__builtin_ia32_psrldi512_mask ((__v16si)( __A),( __B),\
+              (__v16si)( __W),\
+              (__mmask16)( __U));\
+})
+
+#define _mm512_maskz_srli_epi32( __U, __A, __B) __extension__ ({ \
+__builtin_ia32_psrldi512_mask ((__v16si)( __A),( __B),\
+              (__v16si)\
+              _mm512_setzero_si512 (),\
+              (__mmask16)( __U));\
+})
+
+#define _mm512_srli_epi64( __A, __B) __extension__ ({ \
+__builtin_ia32_psrlqi512_mask ((__v8di)( __A),( __B),\
+              (__v8di)\
+              _mm512_setzero_si512 (),\
+              (__mmask8) -1);\
+})
+
+#define _mm512_mask_srli_epi64( __W, __U, __A, __B) __extension__ ({ \
+__builtin_ia32_psrlqi512_mask ((__v8di)( __A),( __B),\
+              (__v8di)( __W),\
+              (__mmask8)( __U));\
+})
+
+#define _mm512_maskz_srli_epi64( __U, __A, __B) __extension__ ({ \
+__builtin_ia32_psrlqi512_mask ((__v8di)( __A),( __B),\
+              (__v8di)\
+              _mm512_setzero_si512 (),\
+              (__mmask8)( __U));\
+})
+
 #undef __DEFAULT_FN_ATTRS
 
 #endif // __AVX512FINTRIN_H

diff --git a/lib/Headers/avx512vlintrin.h b/lib/Headers/avx512vlintrin.h
index 731d7fe2619e7fa794a1136fe6902759e3b0374c..3f45770a3225f1dbcab6c2e6e8cb905b6d9b507b 100644 (file)
--- a/lib/Headers/avx512vlintrin.h
+++ b/lib/Headers/avx512vlintrin.h
@@ -5638,6 +5638,140 @@ _mm256_maskz_srlv_epi32 (__mmask8 __U, __m256i __X, __m256i __Y)
              (__mmask8) __U);
 }
 
+
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_mask_srl_epi32 (__m128i __W, __mmask8 __U, __m128i __A,
+        __m128i __B)
+{
+  return (__m128i) __builtin_ia32_psrld128_mask ((__v4si) __A,
+             (__v4si) __B,
+             (__v4si) __W,
+             (__mmask8) __U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_maskz_srl_epi32 (__mmask8 __U, __m128i __A, __m128i __B)
+{
+  return (__m128i) __builtin_ia32_psrld128_mask ((__v4si) __A,
+             (__v4si) __B,
+             (__v4si)
+             _mm_setzero_si128 (),
+             (__mmask8) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_mask_srl_epi32 (__m256i __W, __mmask8 __U, __m256i __A,
+           __m128i __B)
+{
+  return (__m256i) __builtin_ia32_psrld256_mask ((__v8si) __A,
+             (__v4si) __B,
+             (__v8si) __W,
+             (__mmask8) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_maskz_srl_epi32 (__mmask8 __U, __m256i __A, __m128i __B)
+{
+  return (__m256i) __builtin_ia32_psrld256_mask ((__v8si) __A,
+             (__v4si) __B,
+             (__v8si)
+             _mm256_setzero_si256 (),
+             (__mmask8) __U);
+}
+
+#define _mm_mask_srli_epi32( __W, __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrldi128_mask ((__v4si)( __A),( __imm),\
+              (__v4si)( __W),\
+              (__mmask8)( __U));\
+})
+
+#define _mm_maskz_srli_epi32( __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrldi128_mask ((__v4si)( __A),( __imm),\
+              (__v4si)\
+              _mm_setzero_si128 (),\
+              (__mmask8)( __U));\
+})
+
+#define _mm256_mask_srli_epi32( __W, __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrldi256_mask ((__v8si)( __A),( __imm),\
+              (__v8si)( __W),\
+              (__mmask8)( __U));\
+})
+
+#define _mm256_maskz_srli_epi32( __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrldi256_mask ((__v8si)( __A),( __imm),\
+              (__v8si)\
+              _mm256_setzero_si256 (),\
+              (__mmask8)( __U));\
+})
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_mask_srl_epi64 (__m128i __W, __mmask8 __U, __m128i __A,
+        __m128i __B)
+{
+  return (__m128i) __builtin_ia32_psrlq128_mask ((__v2di) __A,
+             (__v2di) __B,
+             (__v2di) __W,
+             (__mmask8) __U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS
+_mm_maskz_srl_epi64 (__mmask8 __U, __m128i __A, __m128i __B)
+{
+  return (__m128i) __builtin_ia32_psrlq128_mask ((__v2di) __A,
+             (__v2di) __B,
+             (__v2di)
+             _mm_setzero_di (),
+             (__mmask8) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_mask_srl_epi64 (__m256i __W, __mmask8 __U, __m256i __A,
+           __m128i __B)
+{
+  return (__m256i) __builtin_ia32_psrlq256_mask ((__v4di) __A,
+             (__v2di) __B,
+             (__v4di) __W,
+             (__mmask8) __U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS
+_mm256_maskz_srl_epi64 (__mmask8 __U, __m256i __A, __m128i __B)
+{
+  return (__m256i) __builtin_ia32_psrlq256_mask ((__v4di) __A,
+             (__v2di) __B,
+             (__v4di)
+             _mm256_setzero_si256 (),
+             (__mmask8) __U);
+}
+
+#define _mm_mask_srli_epi64( __W, __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrlqi128_mask ((__v2di)( __A),( __imm),\
+              (__v2di)( __W),\
+              (__mmask8)( __U));\
+})
+
+#define _mm_maskz_srli_epi64( __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrlqi128_mask ((__v2di)( __A),( __imm),\
+              (__v2di)\
+              _mm_setzero_si128 (),\
+              (__mmask8)( __U));\
+})
+
+#define _mm256_mask_srli_epi64( __W, __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrlqi256_mask ((__v4di)( __A),( __imm),\
+              (__v4di)( __W),\
+              (__mmask8)( __U));\
+})
+
+#define _mm256_maskz_srli_epi64( __U, __A, __imm) __extension__ ({ \
+__builtin_ia32_psrlqi256_mask ((__v4di)( __A),( __imm),\
+              (__v4di)\
+              _mm256_setzero_si256 (),\
+              (__mmask8)( __U));\
+})
+
 #undef __DEFAULT_FN_ATTRS
 #undef __DEFAULT_FN_ATTRS_BOTH
 

diff --git a/test/CodeGen/avx512f-builtins.c b/test/CodeGen/avx512f-builtins.c
index f61a845641c93ff851a73b08d5c3c73df059065a..ef8c158e10c77b18814d691c62fd44e9ddcd62c5 100644 (file)
--- a/test/CodeGen/avx512f-builtins.c
+++ b/test/CodeGen/avx512f-builtins.c
@@ -2262,4 +2262,39 @@ __m512i test_mm512_maskz_slli_epi64(__mmask8 __U, __m512i __A) {
   return _mm512_maskz_slli_epi64(__U, __A, 5); 
 }
 
+__m512i test_mm512_srli_epi32(__m512i __A) {
+  // CHECK-LABEL: @test_mm512_srli_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.di.512
+  return _mm512_srli_epi32(__A, 5); 
+}
+
+__m512i test_mm512_mask_srli_epi32(__m512i __W, __mmask16 __U, __m512i __A) {
+  // CHECK-LABEL: @test_mm512_mask_srli_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.di.512
+  return _mm512_mask_srli_epi32(__W, __U, __A, 5); 
+}
+
+__m512i test_mm512_maskz_srli_epi32(__mmask16 __U, __m512i __A) {
+  // CHECK-LABEL: @test_mm512_maskz_srli_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.di.512
+  return _mm512_maskz_srli_epi32(__U, __A, 5); 
+}
+
+__m512i test_mm512_srli_epi64(__m512i __A) {
+  // CHECK-LABEL: @test_mm512_srli_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.qi.512
+  return _mm512_srli_epi64(__A, 5); 
+}
+
+__m512i test_mm512_mask_srli_epi64(__m512i __W, __mmask8 __U, __m512i __A) {
+  // CHECK-LABEL: @test_mm512_mask_srli_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.qi.512
+  return _mm512_mask_srli_epi64(__W, __U, __A, 5); 
+}
+
+__m512i test_mm512_maskz_srli_epi64(__mmask8 __U, __m512i __A) {
+  // CHECK-LABEL: @test_mm512_maskz_srli_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.qi.512
+  return _mm512_maskz_srli_epi64(__U, __A, 5); 
+}
 

diff --git a/test/CodeGen/avx512vl-builtins.c b/test/CodeGen/avx512vl-builtins.c
index 2901f2612039760b2a505f7fa1bb4c874aeba49e..e28653b56f2f38291be9ccaab69b0d9417bf4fab 100644 (file)
--- a/test/CodeGen/avx512vl-builtins.c
+++ b/test/CodeGen/avx512vl-builtins.c
@@ -3780,3 +3780,99 @@ __m256i test_mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) {
   return _mm256_maskz_srlv_epi32(__U, __X, __Y); 
 }
 
+__m128i test_mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_srl_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.d.128
+  return _mm_mask_srl_epi32(__W, __U, __A, __B); 
+}
+
+__m128i test_mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_srl_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.d.128
+  return _mm_maskz_srl_epi32(__U, __A, __B); 
+}
+
+__m256i test_mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm256_mask_srl_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.d.256
+  return _mm256_mask_srl_epi32(__W, __U, __A, __B); 
+}
+
+__m256i test_mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm256_maskz_srl_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.d.256
+  return _mm256_maskz_srl_epi32(__U, __A, __B); 
+}
+
+__m128i test_mm_mask_srli_epi32(__m128i __W, __mmask8 __U, __m128i __A) {
+  // CHECK-LABEL: @test_mm_mask_srli_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.di.128
+  return _mm_mask_srli_epi32(__W, __U, __A, 5); 
+}
+
+__m128i test_mm_maskz_srli_epi32(__mmask8 __U, __m128i __A) {
+  // CHECK-LABEL: @test_mm_maskz_srli_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.di.128
+  return _mm_maskz_srli_epi32(__U, __A, 5); 
+}
+
+__m256i test_mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A) {
+  // CHECK-LABEL: @test_mm256_mask_srli_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.di.256
+  return _mm256_mask_srli_epi32(__W, __U, __A, 5); 
+}
+
+__m256i test_mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A) {
+  // CHECK-LABEL: @test_mm256_maskz_srli_epi32
+  // CHECK: @llvm.x86.avx512.mask.psrl.di.256
+  return _mm256_maskz_srli_epi32(__U, __A, 5); 
+}
+
+__m128i test_mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_mask_srl_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.q.128
+  return _mm_mask_srl_epi64(__W, __U, __A, __B); 
+}
+
+__m128i test_mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm_maskz_srl_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.q.128
+  return _mm_maskz_srl_epi64(__U, __A, __B); 
+}
+
+__m256i test_mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm256_mask_srl_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.q.256
+  return _mm256_mask_srl_epi64(__W, __U, __A, __B); 
+}
+
+__m256i test_mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B) {
+  // CHECK-LABEL: @test_mm256_maskz_srl_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.q.256
+  return _mm256_maskz_srl_epi64(__U, __A, __B); 
+}
+
+__m128i test_mm_mask_srli_epi64(__m128i __W, __mmask8 __U, __m128i __A) {
+  // CHECK-LABEL: @test_mm_mask_srli_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.qi.128
+  return _mm_mask_srli_epi64(__W, __U, __A, 5); 
+}
+
+__m128i test_mm_maskz_srli_epi64(__mmask8 __U, __m128i __A) {
+  // CHECK-LABEL: @test_mm_maskz_srli_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.qi.128
+  return _mm_maskz_srli_epi64(__U, __A, 5); 
+}
+
+__m256i test_mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A) {
+  // CHECK-LABEL: @test_mm256_mask_srli_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.qi.256
+  return _mm256_mask_srli_epi64(__W, __U, __A, 5); 
+}
+
+__m256i test_mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A) {
+  // CHECK-LABEL: @test_mm256_maskz_srli_epi64
+  // CHECK: @llvm.x86.avx512.mask.psrl.qi.256
+  return _mm256_maskz_srli_epi64(__U, __A, 5); 
+}
+