#define _R_23(_0, _1, REG2, REG3, ...) REG2, REG3
#define R_23(REG...) _R_23(REG, 1, 2, 3)
-#define ASM_BUG() ASSERT(0)
+#define ZFS_ASM_BUG() ASSERT(0)
#define OFFSET(ptr, val) (((unsigned char *)(ptr))+val)
: "v20", "v21"); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: RVR0(r), RVR1(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: WVR0(r), WVR1(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: RVR0(r), RVR1(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
[SRC1] "Q" (*(OFFSET(src, 16)))); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: RVR0(r), RVR1(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: "v18", "v19"); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: "v10", "v11", "v12", "v13", "v14", "v15"); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
_MULx2(c, R_01(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
#define _R_23(_0, _1, REG2, REG3, ...) REG2, REG3
#define R_23(REG...) _R_23(REG, 1, 2, 3)
-#define ASM_BUG() ASSERT(0)
+#define ZFS_ASM_BUG() ASSERT(0)
extern const uint8_t gf_clmul_mod_lt[4*256][16];
: : [SRC] "r" (src)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
"vpxor %" VR1(r) ", %" VR3(r)", %" VR3(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
"vmovdqa %" VR1(r) ", %" VR3(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: : [SRC] "r" (src)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: : [DST] "r" (dst)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
"vpxor %ymm13, %" VR1(r)", %" VR1(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
_MUL2(r); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
[lt] "r" (gf_clmul_mod_lt[4*(c)])); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
_MULx2(c, R_01(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
#define _R_23(_0, _1, REG2, REG3, ...) REG2, REG3
#define R_23(REG...) _R_23(REG, 1, 2, 3)
-#define ASM_BUG() ASSERT(0)
+#define ZFS_ASM_BUG() ASSERT(0)
extern const uint8_t gf_clmul_mod_lt[4*256][16];
: : [SRC] "r" (src)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
"vpxorq %" VR1(r) ", %" VR3(r)", %" VR3(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
"vmovdqa64 %" VR1(r) ", %" VR3(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: : [SRC] "r" (src)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: : [DST] "r" (dst)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
"vmovdqu8 %zmm13, %" VR1(r) "{%k2}"); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
_MUL2(r); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
[lt] "r" (gf_clmul_mod_lt[4*(c)])); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
_MULx2(c, R_01(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
#define _R_23(_0, _1, REG2, REG3, ...) REG2, REG3
#define R_23(REG...) _R_23(REG, 1, 2, 3)
-#define ASM_BUG() ASSERT(0)
+#define ZFS_ASM_BUG() ASSERT(0)
const uint8_t gf_clmul_mod_lt[4*256][16];
: : [SRC] "r" (src)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
"pxor %" VR1(r) ", %" VR3(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
"movdqa %" VR1(r) ", %" VR3(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: : [SRC] "r" (src)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
: : [DST] "r" (dst)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
"pxor %xmm13, %" VR1(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
_MUL2_x2(r); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
[lt] "r" (gf_clmul_mod_lt[4*(c)])); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}
_MULx2(c, R_01(r)); \
break; \
default: \
- ASM_BUG(); \
+ ZFS_ASM_BUG(); \
} \
}