Merging r308503:

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r308503 | davide | 2017-07-19 11:09:46 -0700 (Wed, 19 Jul 2017) | 3 lines

[X86] Don't try to scale down if that exceeds the bitwidth.

Fixes the crash reported in PR33844.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_50@308718 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 3c4589ab18f6f6f62ccc288a19f0c5df00d7f34c..8f24f98be681fa4399586f103c3598af3580bf50 100644 (file)
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -1055,7 +1055,10 @@ static bool foldMaskAndShiftToScale(SelectionDAG &DAG, SDValue N,
 
   // Scale the leading zero count down based on the actual size of the value.
   // Also scale it down based on the size of the shift.
-  MaskLZ -= (64 - X.getSimpleValueType().getSizeInBits()) + ShiftAmt;
+  unsigned ScaleDown = (64 - X.getSimpleValueType().getSizeInBits()) + ShiftAmt;
+  if (MaskLZ < ScaleDown)
+    return true;
+  MaskLZ -= ScaleDown;
 
   // The final check is to ensure that any masked out high bits of X are
   // already known to be zero. Otherwise, the mask has a semantic impact

diff --git a/test/CodeGen/X86/pr33844.ll b/test/CodeGen/X86/pr33844.ll
new file mode 100644 (file)
index 0000000..2585945
--- /dev/null
+++ b/test/CodeGen/X86/pr33844.ll
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -o - %s | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+@global = external global i32
+@global.1 = external global i64
+
+define void @patatino() {
+; CHECK-LABEL: patatino:
+; CHECK:       # BB#0: # %bb
+; CHECK-NEXT:    movl {{.*}}(%rip), %eax
+; CHECK-NEXT:    movl %eax, %ecx
+; CHECK-NEXT:    shrl $31, %ecx
+; CHECK-NEXT:    addl $2147483647, %ecx # imm = 0x7FFFFFFF
+; CHECK-NEXT:    shrl $31, %ecx
+; CHECK-NEXT:    andl $62, %ecx
+; CHECK-NEXT:    andl $-536870912, %eax # imm = 0xE0000000
+; CHECK-NEXT:    orl %ecx, %eax
+; CHECK-NEXT:    movl %eax, {{.*}}(%rip)
+; CHECK-NEXT:    retq
+bb:
+  %tmp = load i32, i32* @global
+  %tmp1 = lshr i32 %tmp, 31
+  %tmp2 = add nuw nsw i32 %tmp1, 2147483647
+  %tmp3 = load i64, i64* @global.1
+  %tmp4 = shl i64 %tmp3, 23
+  %tmp5 = add nsw i64 %tmp4, 8388639
+  %tmp6 = trunc i64 %tmp5 to i32
+  %tmp7 = lshr i32 %tmp2, %tmp6
+  %tmp8 = load i32, i32* @global
+  %tmp9 = and i32 %tmp7, 62
+  %tmp10 = and i32 %tmp8, -536870912
+  %tmp11 = or i32 %tmp9, %tmp10
+  store i32 %tmp11, i32* @global
+  ret void
+}