[x86] update test to use FileCheck and auto-generate checks; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@306982 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/optimize-max-1.ll b/test/CodeGen/X86/optimize-max-1.ll
index 11e2f9a93a57f987c700904066118073538de42a..08cb86ab398966c8852d269e0878aa9cfbd2288a 100644 (file)
--- a/test/CodeGen/X86/optimize-max-1.ll
+++ b/test/CodeGen/X86/optimize-max-1.ll
@@ -1,4 +1,5 @@
-; RUN: llc < %s -march=x86-64 | not grep cmov
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
 
 ; LSR should be able to eliminate both smax and umax expressions
 ; in loop trip counts.
@@ -6,6 +7,18 @@
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 
 define void @fs(double* nocapture %p, i64 %n) nounwind {
+; CHECK-LABEL: fs:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  .LBB0_1: # %bb
+; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    movq $0, (%rdi,%rax,8)
+; CHECK-NEXT:    incq %rax
+; CHECK-NEXT:    cmpq %rsi, %rax
+; CHECK-NEXT:    jl .LBB0_1
+; CHECK-NEXT:  # BB#2: # %return
+; CHECK-NEXT:    retq
 entry:
        %tmp = icmp slt i64 %n, 1               ; <i1> [#uses=1]
        %smax = select i1 %tmp, i64 1, i64 %n           ; <i64> [#uses=1]
@@ -24,6 +37,18 @@ return:              ; preds = %bb
 }
 
 define void @bs(double* nocapture %p, i64 %n) nounwind {
+; CHECK-LABEL: bs:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  .LBB1_1: # %bb
+; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    movq $0, (%rdi,%rax,8)
+; CHECK-NEXT:    incq %rax
+; CHECK-NEXT:    cmpq %rsi, %rax
+; CHECK-NEXT:    jl .LBB1_1
+; CHECK-NEXT:  # BB#2: # %return
+; CHECK-NEXT:    retq
 entry:
        %tmp = icmp sge i64 %n, 1               ; <i1> [#uses=1]
        %smax = select i1 %tmp, i64 %n, i64 1           ; <i64> [#uses=1]
@@ -42,6 +67,18 @@ return:              ; preds = %bb
 }
 
 define void @fu(double* nocapture %p, i64 %n) nounwind {
+; CHECK-LABEL: fu:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  .LBB2_1: # %bb
+; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    movq $0, (%rdi,%rax,8)
+; CHECK-NEXT:    incq %rax
+; CHECK-NEXT:    cmpq %rsi, %rax
+; CHECK-NEXT:    jb .LBB2_1
+; CHECK-NEXT:  # BB#2: # %return
+; CHECK-NEXT:    retq
 entry:
        %tmp = icmp eq i64 %n, 0                ; <i1> [#uses=1]
        %umax = select i1 %tmp, i64 1, i64 %n           ; <i64> [#uses=1]
@@ -60,6 +97,18 @@ return:              ; preds = %bb
 }
 
 define void @bu(double* nocapture %p, i64 %n) nounwind {
+; CHECK-LABEL: bu:
+; CHECK:       # BB#0: # %entry
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  .LBB3_1: # %bb
+; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    movq $0, (%rdi,%rax,8)
+; CHECK-NEXT:    incq %rax
+; CHECK-NEXT:    cmpq %rsi, %rax
+; CHECK-NEXT:    jb .LBB3_1
+; CHECK-NEXT:  # BB#2: # %return
+; CHECK-NEXT:    retq
 entry:
        %tmp = icmp ne i64 %n, 0                ; <i1> [#uses=1]
        %umax = select i1 %tmp, i64 %n, i64 1           ; <i64> [#uses=1]