Merging r265097:

Partial-rebuilding /home/tstellar/llvm/.git/svn/refs/remotes/origin/master/.rev_map.91177308-0d34-0410-b5e6-96231b3b80d8 ...
Currently at 268516 = 990ef3411fc39ac61eae0bcfaf25f824209a76a7
r268517 = d1310b73a355972c610bc15c043906e0f4b2e072
Done rebuilding /home/tstellar/llvm/.git/svn/refs/remotes/origin/master/.rev_map.91177308-0d34-0410-b5e6-96231b3b80d8
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r265097 | cycheng | 2016-03-31 19:05:29 -0700 (Thu, 31 Mar 2016) | 17 lines

Fix Sub-register Rewriting in Aggressive Anti-Dependence Breaker

Previously, HandleLastUse would delete RegRef information for sub-registers
if they were dead even if their corresponding super-register were still live.

If the super-register were later renamed, then the definitions of the
sub-register would not be updated appropriately. This patch alters the
behavior so that RegInfo information for sub-registers is only deleted when
the sub-register and super-register are both dead.

This resolves PR26775. This is the mirror image of Hal's r227311 commit.

Author: Tom Jablin (tjablin)
Reviewers: kbarton uweigand nemanjai hfinkel

http://reviews.llvm.org/D18448

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@269185 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/AggressiveAntiDepBreaker.cpp b/lib/CodeGen/AggressiveAntiDepBreaker.cpp
index 4060db74a9b7274d8e80e404bdd5f43bf59921fa..6502c708d74b2f61677d6a00c7a6cbf8f9c4e18d 100644 (file)
--- a/lib/CodeGen/AggressiveAntiDepBreaker.cpp
+++ b/lib/CodeGen/AggressiveAntiDepBreaker.cpp
@@ -313,19 +313,22 @@ void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx,
     DEBUG(if (header) {
         dbgs() << header << TRI->getName(Reg); header = nullptr; });
     DEBUG(dbgs() << "->g" << State->GetGroup(Reg) << tag);
-  }
-  // Repeat for subregisters.
-  for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
-    unsigned SubregReg = *SubRegs;
-    if (!State->IsLive(SubregReg)) {
-      KillIndices[SubregReg] = KillIdx;
-      DefIndices[SubregReg] = ~0u;
-      RegRefs.erase(SubregReg);
-      State->LeaveGroup(SubregReg);
-      DEBUG(if (header) {
-          dbgs() << header << TRI->getName(Reg); header = nullptr; });
-      DEBUG(dbgs() << " " << TRI->getName(SubregReg) << "->g" <<
-            State->GetGroup(SubregReg) << tag);
+    // Repeat for subregisters. Note that we only do this if the superregister
+    // was not live because otherwise, regardless whether we have an explicit
+    // use of the subregister, the subregister's contents are needed for the
+    // uses of the superregister.
+    for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
+      unsigned SubregReg = *SubRegs;
+      if (!State->IsLive(SubregReg)) {
+        KillIndices[SubregReg] = KillIdx;
+        DefIndices[SubregReg] = ~0u;
+        RegRefs.erase(SubregReg);
+        State->LeaveGroup(SubregReg);
+        DEBUG(if (header) {
+            dbgs() << header << TRI->getName(Reg); header = nullptr; });
+        DEBUG(dbgs() << " " << TRI->getName(SubregReg) << "->g" <<
+              State->GetGroup(SubregReg) << tag);
+      }
     }
   }
 

diff --git a/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll b/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
new file mode 100644 (file)
index 0000000..c575886
--- /dev/null
+++ b/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
@@ -0,0 +1,24 @@
+; RUN: llc %s -mtriple=powerpc64-unknown-linux-gnu -O2 -o - -optimize-regalloc=false -regalloc=fast | FileCheck %s
+
+declare void @func(i8*, i64, i64)
+
+define void @test(i8* %context, i32** %elementArrayPtr, i32 %value) {
+entry:
+  %cmp = icmp eq i32 %value, 0
+  br i1 %cmp, label %lreturn, label %lnext
+
+lnext:
+  %elementArray = load i32*, i32** %elementArrayPtr, align 8
+; CHECK: lwz [[LDREG:[0-9]+]], 124(1)                   # 4-byte Folded Reload
+; CHECK: # implicit-def: %X[[TEMPREG:[0-9]+]]
+  %element = load i32, i32* %elementArray, align 4
+; CHECK: mr [[TEMPREG]], [[LDREG]]
+; CHECK: clrldi   4, [[TEMPREG]], 32
+  %element.ext = zext i32 %element to i64
+  %value.ext = zext i32 %value to i64
+  call void @func(i8* %context, i64 %value.ext, i64 %element.ext)
+  br label %lreturn
+
+lreturn:
+  ret void
+}