Value *AMDGPUCodeGenPrepare::copyFlags(
const BinaryOperator &I, Value *V) const {
- assert(isa<BinaryOperator>(V) && "V must be binary operation");
+ BinaryOperator *BinOp = dyn_cast<BinaryOperator>(V);
+ if (!BinOp) // Possibly constant expression.
+ return V;
- BinaryOperator *BinOp = cast<BinaryOperator>(V);
if (isa<OverflowingBinaryOperator>(BinOp)) {
BinOp->setHasNoSignedWrap(I.hasNoSignedWrap());
BinOp->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
ret i16 %r
}
+; GCN-LABEL: @constant_add_i16(
+; VI: ret i16 3
+define i16 @constant_add_i16() {
+ %r = add i16 1, 2
+ ret i16 %r
+}
+
+; GCN-LABEL: @constant_add_nsw_i16(
+; VI: ret i16 3
+define i16 @constant_add_nsw_i16() {
+ %r = add nsw i16 1, 2
+ ret i16 %r
+}
+
+; GCN-LABEL: @constant_add_nuw_i16(
+; VI: ret i16 3
+define i16 @constant_add_nuw_i16() {
+ %r = add nsw i16 1, 2
+ ret i16 %r
+}
+
; GCN-LABEL: @add_nsw_i16(
; SI: %r = add nsw i16 %a, %b
; SI-NEXT: ret i16 %r
ret i16 %r
}
+; GCN-LABEL: @constant_lshr_exact_i16(
+; VI: ret i16 2
+define i16 @constant_lshr_exact_i16(i16 %a, i16 %b) {
+ %r = lshr exact i16 4, 1
+ ret i16 %r
+}
+
; GCN-LABEL: @and_i16(
; SI: %r = and i16 %a, %b
; SI-NEXT: ret i16 %r