[MIPS] Use arch values for lock-free atomic operations

Let NaClMips32ELTargetInfo inherit arch values for maximum width lock-free
atomic operations.

Differential Revision: http://reviews.llvm.org/D11949

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@244675 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 7f08e9d3bc29ab252a9cf2b5f2fd032c5c272c49..fa736bcfed2418edcfab985839a79ed6e7a4b567 100644 (file)
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -6842,8 +6842,7 @@ void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
 class NaClMips32ELTargetInfo : public Mips32ELTargetInfo {
 public:
   NaClMips32ELTargetInfo(const llvm::Triple &Triple) :
-    Mips32ELTargetInfo(Triple)  {
-      MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 0;
+    Mips32ELTargetInfo(Triple) {
   }
 
   BuiltinVaListKind getBuiltinVaListKind() const override {