build: Prevent duplicate inclusion of Makefile.rules, which causes make to warn

like crazy.
 - How no one else is bothered by this I can't understand!

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@124873 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/unittests/Makefile b/unittests/Makefile
index bf64f0611bab4f35d3bba7f59d12fd85ee6556b6..685e397864a4ac54743006597b6ef19a4b863b5a 100644 (file)
--- a/unittests/Makefile
+++ b/unittests/Makefile
@@ -22,6 +22,7 @@ include $(CLANG_LEVEL)/Makefile
 
 ifndef IS_UNITTEST_LEVEL
 
+MAKEFILE_UNITTEST_NO_INCLUDE_COMMON := 1
 include $(LLVM_SRC_ROOT)/unittests/Makefile.unittest
 
 endif  # IS_UNITTEST_LEVEL