#
COMPONENT_SRCDIRS := . hwcrypto
-LIBS := core rtc phy
-ifdef CONFIG_BT_ENABLED
-LIBS += coexist
+LIBS := core rtc
+ifdef CONFIG_PHY_ENABLED # BT || WIFI
+LIBS += phy coexist
endif
ifdef CONFIG_WIFI_ENABLED
LIBS += net80211 pp wpa smartconfig coexist wps wpa2
endif
-LIBS := $(sort $(LIBS)) # de-duplicate, we can handle different orders here
-
LINKER_SCRIPTS += esp32.common.ld esp32.rom.ld esp32.peripherals.ld
ifeq ("$(CONFIG_NEWLIB_NANO_FORMAT)","y")
#include "rom/ets_sys.h"
#include "rom/uart.h"
#include "sdkconfig.h"
-#include "phy.h"
#include "rtc.h"
#include "soc/soc.h"
#include "soc/rtc_cntl_reg.h"
void esp_set_cpu_freq(void)
{
uint32_t freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ;
- phy_get_romfunc_addr();
// freq will be changed to 40MHz in rtc_init_lite,
// wait uart tx finish, otherwise some uart output will be lost
*/
/**
- * @brief Initialize function pointer table in PHY library.
- * @note This function should be called before register_chipv7_phy.
+ * @brief Return ROM function pointer table from PHY library.
*/
void phy_get_romfunc_addr(void);
#include "nvs.h"
#include "sdkconfig.h"
-#ifdef CONFIG_WIFI_ENABLED
+#ifdef CONFIG_PHY_ENABLED
#include "phy.h"
#include "phy_init_data.h"
{
assert(init_data);
assert(calibration_data);
- // Initialize PHY pointer table
- phy_get_romfunc_addr();
+
REG_SET_BIT(DPORT_CORE_RST_EN_REG, DPORT_MAC_RST);
REG_CLR_BIT(DPORT_CORE_RST_EN_REG, DPORT_MAC_RST);
// Enable WiFi peripheral clock
return err;
}
-#endif // CONFIG_WIFI_ENABLED
+#endif // CONFIG_PHY_ENABLED