if (MInfo.reachable) {
seen.insert(&Pre);
BBInfo &PrInfo = MBBInfoMap[&Pre];
- if (PrInfo.reachable && !PrInfo.isLiveOut(MO0.getReg()))
+ if (!MO0.isUndef() && PrInfo.reachable &&
+ !PrInfo.isLiveOut(MO0.getReg()))
report("PHI operand is not live-out from predecessor", &MO0, I);
}
}
--- /dev/null
+# RUN: not llc -o - %s -verify-machineinstrs -run-pass=none 2>&1 | FileCheck %s
+---
+# CHECK: Bad machine code: PHI operand is not live-out from predecessor
+# CHECK: - function: func0
+# CHECK: - basic block: %bb.3
+# CHECK: - instruction: %0<def> = PHI
+# CHECK: - operand 1: %1
+#
+# CHECK: Bad machine code: PHI operand is not live-out from predecessor
+# CHECK: - function: func0
+# CHECK: - basic block: %bb.3
+# CHECK: - instruction: %0<def> = PHI
+# CHECK: - operand 3: %0
+name: func0
+tracksRegLiveness: true
+body: |
+ bb.0:
+ JE_1 %bb.1, implicit undef %eflags
+ JMP_1 %bb.2
+
+ bb.1:
+ %0:gr32 = IMPLICIT_DEF
+ JMP_1 %bb.3
+
+ bb.2:
+ %1:gr32 = IMPLICIT_DEF
+
+ bb.3:
+ %0:gr32 = PHI %1, %bb.1, %0, %bb.2
+...
--- /dev/null
+# RUN: llc -o - %s -verify-machineinstrs -run-pass=none | FileCheck %s
+# This should cleanly pass the machine verifier
+---
+# CHECK-LABEL: name: func0
+# CHECK: %0:gr32 = PHI undef %1:gr32, %bb.0, undef %1:gr32, %bb.1
+name: func0
+tracksRegLiveness: true
+body: |
+ bb.0:
+ JE_1 %bb.1, implicit undef %eflags
+ JMP_1 %bb.2
+
+ bb.1:
+
+ bb.2:
+ %0 : gr32 = PHI undef %1 : gr32, %bb.0, undef %1 : gr32, %bb.1
+...
+---
+# CHECK-LABEL: name: func1
+# CHECK: %2:gr32 = PHI %0, %bb.0, %1, %bb.1
+name: func1
+tracksRegLiveness: true
+body: |
+ bb.0:
+ %0 : gr32 = IMPLICIT_DEF
+ JE_1 %bb.1, implicit undef %eflags
+ JMP_1 %bb.2
+
+ bb.1:
+ %1 : gr32 = IMPLICIT_DEF
+
+ bb.2:
+ %2 : gr32 = PHI %0, %bb.0, %1, %bb.1
+...