fix(spi_master): fix the bug that VSPI no respond when host changed

 from HSPI to VSPI, and vice versa.

fix the SPI control bits written wrong in the headers.

TW#12123, Github#477

diff --git a/components/driver/test/test_spi_master.c b/components/driver/test/test_spi_master.c
index e58371f2464b7750332ac573b3333384c6a60ab1..45314b7086646118b1995dffbeaf123f74bd04c8 100644 (file)
--- a/components/driver/test/test_spi_master.c
+++ b/components/driver/test/test_spi_master.c
@@ -259,3 +259,64 @@ TEST_CASE("SPI Master test, interaction of multiple devs", "[spi][ignore]") {
     destroy_spi_bus(handle1);
 }
 
+TEST_CASE("SPI Master no response when switch from host1 (HSPI) to host2 (VSPI)", "[spi]")
+{
+       //spi config
+       spi_bus_config_t bus_config;
+       spi_device_interface_config_t device_config;
+       spi_device_handle_t spi;
+       spi_host_device_t host;
+       int dma = 1;
+
+       memset(&bus_config, 0, sizeof(spi_bus_config_t));
+       memset(&device_config, 0, sizeof(spi_device_interface_config_t));
+
+       bus_config.miso_io_num = -1;
+       bus_config.mosi_io_num = 26;
+       bus_config.sclk_io_num = 25;
+       bus_config.quadwp_io_num = -1;
+       bus_config.quadhd_io_num = -1;
+
+       device_config.clock_speed_hz = 50000;
+       device_config.mode = 0;
+       device_config.spics_io_num = -1;
+       device_config.queue_size = 1;
+       device_config.flags = SPI_DEVICE_TXBIT_LSBFIRST | SPI_DEVICE_RXBIT_LSBFIRST;
+
+       struct spi_transaction_t transaction = {
+               .flags = SPI_TRANS_USE_TXDATA | SPI_TRANS_USE_RXDATA,
+               .length = 16,
+               .tx_buffer = NULL,
+               .rx_buffer = NULL,
+               .tx_data = {0x04, 0x00}
+       };
+
+
+       //initialize for first host
+       host = 1;
+
+       assert(spi_bus_initialize(host, &bus_config, dma) == ESP_OK);
+       assert(spi_bus_add_device(host, &device_config, &spi) == ESP_OK);
+
+       printf("before first xmit\n");
+       assert(spi_device_transmit(spi, &transaction) == ESP_OK);
+       printf("after first xmit\n");
+
+       assert(spi_bus_remove_device(spi) == ESP_OK);
+       assert(spi_bus_free(host) == ESP_OK);
+
+
+       //for second host and failed before
+       host = 2;
+
+       assert(spi_bus_initialize(host, &bus_config, dma) == ESP_OK);
+       assert(spi_bus_add_device(host, &device_config, &spi) == ESP_OK);
+
+       printf("before second xmit\n");
+       // the original version (bit mis-written) stucks here.
+       assert(spi_device_transmit(spi, &transaction) == ESP_OK);
+       // test case success when see this.
+       printf("after second xmit\n");
+
+
+}

diff --git a/components/soc/esp32/include/soc/dport_reg.h b/components/soc/esp32/include/soc/dport_reg.h
index 852967f1c19928e20e547b0881333999ed2764a2..56e18246d7996beb9d97eb9cd193caa7e3a986c4 100644 (file)
--- a/components/soc/esp32/include/soc/dport_reg.h
+++ b/components/soc/esp32/include/soc/dport_reg.h
@@ -958,7 +958,7 @@
 #define DPORT_CAN_CLK_EN   (BIT(19))
 #define DPORT_I2C_EXT1_CLK_EN   (BIT(18))
 #define DPORT_PWM0_CLK_EN   (BIT(17))
-#define DPORT_SPI_CLK_EN   (BIT(16))
+#define DPORT_SPI_CLK_EN_2   (BIT(16))
 #define DPORT_TIMERGROUP1_CLK_EN   (BIT(15))
 #define DPORT_EFUSE_CLK_EN   (BIT(14))
 #define DPORT_TIMERGROUP_CLK_EN   (BIT(13))
@@ -968,7 +968,7 @@
 #define DPORT_RMT_CLK_EN   (BIT(9))
 #define DPORT_UHCI0_CLK_EN   (BIT(8))
 #define DPORT_I2C_EXT0_CLK_EN   (BIT(7))
-#define DPORT_SPI_CLK_EN_2   (BIT(6))
+#define DPORT_SPI_CLK_EN   (BIT(6))
 #define DPORT_UART1_CLK_EN   (BIT(5))
 #define DPORT_I2S0_CLK_EN   (BIT(4))
 #define DPORT_WDG_CLK_EN   (BIT(3))
@@ -992,7 +992,7 @@
 #define DPORT_CAN_RST   (BIT(19))
 #define DPORT_I2C_EXT1_RST   (BIT(18))
 #define DPORT_PWM0_RST   (BIT(17))
-#define DPORT_SPI_RST   (BIT(16))
+#define DPORT_SPI_RST_2   (BIT(16))
 #define DPORT_TIMERGROUP1_RST   (BIT(15))
 #define DPORT_EFUSE_RST   (BIT(14))
 #define DPORT_TIMERGROUP_RST   (BIT(13))
@@ -1002,7 +1002,7 @@
 #define DPORT_RMT_RST   (BIT(9))
 #define DPORT_UHCI0_RST   (BIT(8))
 #define DPORT_I2C_EXT0_RST   (BIT(7))
-#define DPORT_SPI_RST_2   (BIT(6))
+#define DPORT_SPI_RST   (BIT(6))
 #define DPORT_UART1_RST   (BIT(5))
 #define DPORT_I2S0_RST   (BIT(4))
 #define DPORT_WDG_RST   (BIT(3))