[ARM] Disable ARMCodeGenPrepare by default

ARM Stage 2 builders have been suspiciously broken since the pass was
committed. Disabling to hopefully fix the bots and give me time to
debug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337821 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMCodeGenPrepare.cpp b/lib/Target/ARM/ARMCodeGenPrepare.cpp
index 83ba345bf252c76957bbdaee6f09505b158272ba..24071277427a1815230e7d815195f491b0e79d1d 100644 (file)
--- a/lib/Target/ARM/ARMCodeGenPrepare.cpp
+++ b/lib/Target/ARM/ARMCodeGenPrepare.cpp
@@ -42,7 +42,7 @@
 using namespace llvm;
 
 static cl::opt<bool>
-DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(false),
+DisableCGP("arm-disable-cgp", cl::Hidden, cl::init(true),
            cl::desc("Disable ARM specific CodeGenPrepare pass"));
 
 static cl::opt<bool>

diff --git a/test/CodeGen/ARM/arm-cgp-icmps.ll b/test/CodeGen/ARM/arm-cgp-icmps.ll
index 7a5dcae0226243e6f4c2e630f0e264a91c8d1f24..18df13f732efe878ddc4fb79d65fef212e31b2ed 100644 (file)
--- a/test/CodeGen/ARM/arm-cgp-icmps.ll
+++ b/test/CodeGen/ARM/arm-cgp-icmps.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
-; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
-; RUN: llc -mtriple=thumbv8 %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
+; RUN: llc -mtriple=thumbv8.main -mcpu=cortex-m33 %s -arm-disable-cgp=false -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
+; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
+; RUN: llc -mtriple=thumbv8 %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
 
 ; CHECK-COMMON-LABEL: test_ult_254_inc_imm:
 ; CHECK-DSP:        adds    r0, #1

diff --git a/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll b/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
index d39cc1df18deb92411c218f2c9b8adb090d9ae77..8587a907616dcb115d764fe96de5a197fd4aee34 100644 (file)
--- a/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
+++ b/test/CodeGen/ARM/arm-cgp-phis-calls-ret.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
-; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
-; RUN: llc -mtriple=thumbv8m.main -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
-; RUN: llc -mtriple=thumbv7em %s -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
+; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
+; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-NODSP
+; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false -arm-enable-scalar-dsp=true -mcpu=cortex-m33 %s -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP
+; RUN: llc -mtriple=thumbv7em %s -arm-disable-cgp=false -arm-enable-scalar-dsp=true -arm-enable-scalar-dsp-imms=true -o - | FileCheck %s --check-prefix=CHECK-COMMON --check-prefix=CHECK-DSP-IMM
 
 ; Test that ARMCodeGenPrepare can handle:
 ; - loops

diff --git a/test/CodeGen/ARM/arm-cgp-signed.ll b/test/CodeGen/ARM/arm-cgp-signed.ll
index 80d5517b95fe7ac58e3ac15ad09b90fd91b8f02d..7494b57f42596d8d5219639137eb2a874aae8465 100644 (file)
--- a/test/CodeGen/ARM/arm-cgp-signed.ll
+++ b/test/CodeGen/ARM/arm-cgp-signed.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv8m.main %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv7 %s -o - | FileCheck %s
-; RUN: llc -mtriple=armv8 %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv7m -arm-disable-cgp=false %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv8m.main -arm-disable-cgp=false %s -o - | FileCheck %s
+; RUN: llc -mtriple=thumbv7 %s -arm-disable-cgp=false -o - | FileCheck %s
+; RUN: llc -mtriple=armv8 %s -arm-disable-cgp=false -o - | FileCheck %s
 
 ; Test to check that ARMCodeGenPrepare doesn't optimised away sign extends.
 ; CHECK-LABEL: test_signed_load: