max_ones = max_log2_tiles - min_log2_tiles;
cm->log2_tile_cols = min_log2_tiles;
while (max_ones-- && vp9_rb_read_bit(rb))
- cm->log2_tile_cols++;
+ ++cm->log2_tile_cols;
if (cm->log2_tile_cols > 10)
vpx_internal_error(&cm->error, VPX_CODEC_CORRUPT_FRAME,
// rows
#if CONFIG_ROW_TILE
+ vp9_get_tile_n_bits(cm->mi_rows, &min_log2_tiles, &max_log2_tiles);
+ max_ones = max_log2_tiles - min_log2_tiles;
+ cm->log2_tile_rows = min_log2_tiles;
+ while (max_ones-- && vp9_rb_read_bit(rb))
+ ++cm->log2_tile_rows;
+
if (cm->log2_tile_rows > 10)
vpx_internal_error(&cm->error, VPX_CODEC_CORRUPT_FRAME,
"Invalid number of tile columns");
static void write_tile_info(const VP9_COMMON *const cm,
struct vp9_write_bit_buffer *wb) {
- int min_log2_tile_cols, max_log2_tile_cols, ones;
- vp9_get_tile_n_bits(cm->mi_cols, &min_log2_tile_cols, &max_log2_tile_cols);
+ int min_log2_tiles, max_log2_tiles, ones;
+ vp9_get_tile_n_bits(cm->mi_cols, &min_log2_tiles, &max_log2_tiles);
// columns
- ones = cm->log2_tile_cols - min_log2_tile_cols;
+ ones = cm->log2_tile_cols - min_log2_tiles;
while (ones--)
vp9_wb_write_bit(wb, 1);
- if (cm->log2_tile_cols < max_log2_tile_cols)
+ if (cm->log2_tile_cols < max_log2_tiles)
vp9_wb_write_bit(wb, 0);
// rows
+#if CONFIG_ROW_TILE
+ vp9_get_tile_n_bits(cm->mi_rows, &min_log2_tiles, &max_log2_tiles);
+ ones = cm->log2_tile_rows - min_log2_tiles;
+ while (ones--)
+ vp9_wb_write_bit(wb, 1);
+
+ if (cm->log2_tile_rows < max_log2_tiles)
+ vp9_wb_write_bit(wb, 0);
+#else
vp9_wb_write_bit(wb, cm->log2_tile_rows != 0);
if (cm->log2_tile_rows != 0)
vp9_wb_write_bit(wb, cm->log2_tile_rows != 1);
+#endif
}
static int get_refresh_mask(VP9_COMP *cpi) {