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Merge branch 'bugfix/rename_clk_rst_bits_for_spi' into 'master'
authorJiang Jiang Jian <jack@espressif.com>
Tue, 15 May 2018 01:49:56 +0000 (09:49 +0800)
committerJiang Jiang Jian <jack@espressif.com>
Tue, 15 May 2018 01:49:56 +0000 (09:49 +0800)
rename clock enable and reset bits for SPI modules

See merge request idf/esp-idf!2293


Trivial merge
Unnamed repository; edit this file 'description' to name the repository.