[mips] Impose a threshold for coercion of aggregates

Modified MipsABIInfo::classifyArgumentType so that it now coerces aggregate
structures only if the size of said aggregate is less than 16/64 bytes,
depending on the ABI.

Patch by Stefan Maksimovic.

Differential Revision: https://reviews.llvm.org/D32900

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@302547 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp
index 4ebbef7dfb5b9adc2b3c389167afc0c3c40b2890..5d3ccb86ff8b1384b49c882b6a044bc4b800c36c 100644 (file)
--- a/lib/CodeGen/TargetInfo.cpp
+++ b/lib/CodeGen/TargetInfo.cpp
@@ -6695,6 +6695,14 @@ MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const {
       return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
     }
 
+    // Use indirect if the aggregate cannot fit into registers for
+    // passing arguments according to the ABI
+    unsigned Threshold = IsO32 ? 16 : 64;
+
+    if(getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(Threshold))
+      return ABIArgInfo::getIndirect(CharUnits::fromQuantity(Align), true,
+                                     getContext().getTypeAlign(Ty) / 8 > Align);
+
     // If we have reached here, aggregates are passed directly by coercing to
     // another structure type. Padding is inserted if the offset of the
     // aggregate is unaligned.

diff --git a/test/CodeGen/mips-aggregate-arg.c b/test/CodeGen/mips-aggregate-arg.c
new file mode 100644 (file)
index 0000000..b0be458
--- /dev/null
+++ b/test/CodeGen/mips-aggregate-arg.c
@@ -0,0 +1,38 @@
+// RUN: %clang_cc1 -triple mipsel-unknown-linux-gnu -S -emit-llvm -o - %s | FileCheck -check-prefix=O32 %s\r
+// RUN: %clang_cc1 -triple mips64el-unknown-linux-gnu -S -emit-llvm -o - %s  -target-abi n32 | FileCheck -check-prefix=N32-N64 %s\r
+// RUN: %clang_cc1 -triple mips64el-unknown-linux-gnu -S -emit-llvm -o - %s  -target-abi n64 | FileCheck -check-prefix=N32-N64 %s\r
+\r
+struct t1 {\r
+  char t1[10];\r
+};\r
+\r
+struct t2 {\r
+  char t2[20];\r
+};\r
+\r
+struct t3 {\r
+  char t3[65];\r
+};\r
+\r
+extern struct t1 g1;\r
+extern struct t2 g2;\r
+extern struct t3 g3;\r
+extern void f1(struct t1);\r
+extern void f2(struct t2);\r
+extern void f3(struct t3);\r
+\r
+void f() {\r
+\r
+// O32:  call void @f1(i32 inreg %3, i32 inreg %5, i16 inreg %7)\r
+// O32:  call void @f2(%struct.t2* byval align 4 %tmp)\r
+// O32:  call void @f3(%struct.t3* byval align 4 %tmp1)\r
+\r
+// N32-N64:  call void @f1(i64 inreg %3, i16 inreg %5)\r
+// N32-N64:  call void @f2(i64 inreg %9, i64 inreg %11, i32 inreg %13)\r
+// N32-N64:  call void @f3(%struct.t3* byval align 8 %tmp)\r
+\r
+  f1(g1);\r
+  f2(g2);\r
+  f3(g3);\r
+}\r
+\r