[SelectionDAG] Add scalarization of ABS node (PR41149)

Patch by: @ikulagin (Ivan Kulagin)

Differential Revision: https://reviews.llvm.org/D59577

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@356656 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index f14b2e4cfabf98153084fb29477412c2366f9a11..ab1b1c5e9360fa2290cc747c845c544c1c0b5293 100644 (file)
--- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -68,6 +68,7 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
   case ISD::ZERO_EXTEND_VECTOR_INREG:
     R = ScalarizeVecRes_VecInregOp(N);
     break;
+  case ISD::ABS:
   case ISD::ANY_EXTEND:
   case ISD::BITREVERSE:
   case ISD::BSWAP:

diff --git a/test/CodeGen/WebAssembly/PR41149.ll b/test/CodeGen/WebAssembly/PR41149.ll
new file mode 100644 (file)
index 0000000..e53adf8
--- /dev/null
+++ b/test/CodeGen/WebAssembly/PR41149.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s -mtriple=wasm32-unknown-unknown | FileCheck %s
+
+; Regression test for PR41149.
+
+define void @mod() {
+; CHECK-LABEL: mod:
+; CHECK-NEXT: .functype mod () -> ()
+; CHECK:      local.get       0
+; CHECK-NEXT: local.get       0
+; CHECK-NEXT: i32.load8_s     0
+; CHECK-NEXT: local.tee       0
+; CHECK-NEXT: local.get       0
+; CHECK-NEXT: i32.const       31
+; CHECK-NEXT: i32.shr_s
+; CHECK-NEXT: local.tee       0
+; CHECK-NEXT: i32.add
+; CHECK-NEXT: local.get       0
+; CHECK-NEXT: i32.xor
+; CHECK-NEXT: i32.store8      0
+  %tmp = load <4 x i8>, <4 x i8>* undef
+  %tmp2 = icmp slt <4 x i8> %tmp, zeroinitializer
+  %tmp3 = sub <4 x i8> zeroinitializer, %tmp
+  %tmp4 = select <4 x i1> %tmp2, <4 x i8> %tmp3, <4 x i8> %tmp
+  store <4 x i8> %tmp4, <4 x i8>* undef
+  ret void
+}
+