This was found during HTM cleanup.
Adding a test for builtin_ttest would expose following issue.
*** Bad machine code: Illegal physical register for instruction ***
- function: test10
- basic block: %bb.0 entry (0xf0e57497b58)
- instruction: %5:crrc0 = TABORTWCI 0, $zero, 0
- operand 2: $zero
$zero is not a GPRC register.
LLVM ERROR: Found 1 machine code errors.
Differential Revision: https://reviews.llvm.org/D63079
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@362974
91177308-0d34-0410-b5e6-
96231b3b80d8
(TSR 0)>;
def : Pat<(i64 (int_ppc_ttest)),
- (RLDICL (i64 (COPY (TABORTWCI 0, ZERO, 0))), 36, 28)>;
+ (RLDICL (i64 (COPY (TABORTWCI 0, (LI 0), 0))), 36, 28)>;
} // [HasHTM]
%0 = tail call i32 @llvm.ppc.tendall()
%1 = tail call i32 @llvm.ppc.tresume()
%2 = tail call i32 @llvm.ppc.tsuspend()
+ %3 = tail call i64 @llvm.ppc.ttest()
ret void
; CHECK-LABEL: @test4
; CHECK: tend. 1
; CHECK: tsr. 1
; CHECK: tsr. 0
+; CHECK: tabortwci. 0, {{[0-9]+}}, 0
}
declare i32 @llvm.ppc.tendall()
declare i32 @llvm.ppc.tresume()
declare i32 @llvm.ppc.tsuspend()
+declare i64 @llvm.ppc.ttest()
define void @test5(i64 %v) {