"Unexpected shift opcode");
bool LogicalShift = X86ISD::VSHLI == Opcode || X86ISD::VSRLI == Opcode;
EVT VT = N->getValueType(0);
- unsigned NumElts = VT.getVectorNumElements();
unsigned NumBitsPerElt = VT.getScalarSizeInBits();
// This fails for mask register (vXi1) shifts.
SmallVector<APInt, 32> EltBits;
if (N->isOnlyUserOf(N0.getNode()) &&
getTargetConstantBitsFromNode(N0, NumBitsPerElt, UndefElts, EltBits)) {
- assert(EltBits.size() == NumElts && "Unexpected shift value type");
+ assert(EltBits.size() == VT.getVectorNumElements() &&
+ "Unexpected shift value type");
unsigned ShiftImm = ShiftVal.getZExtValue();
for (APInt &Elt : EltBits) {
if (X86ISD::VSHLI == Opcode)