Changed = true;
}
} else {
+ Value* Cond = BI->getCondition();
if (BI->getSuccessor(0) == BB) {
+ Builder.CreateAssumption(Builder.CreateNot(Cond));
Builder.CreateBr(BI->getSuccessor(1));
EraseTerminatorAndDCECond(BI);
} else if (BI->getSuccessor(1) == BB) {
+ Builder.CreateAssumption(Cond);
Builder.CreateBr(BI->getSuccessor(0));
EraseTerminatorAndDCECond(BI);
Changed = true;
define void @PR36045(i1 %t, i32* %b) {
; CHECK-LABEL: @PR36045(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[T:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret void
;
entry:
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 undef, i16 1, i16 0
+; CHECK-NEXT: [[TOBOOL18:%.*]] = icmp ne i16 [[SPEC_SELECT]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[TOBOOL18]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: br label [[FOR_COND12:%.*]]
; CHECK: for.cond12:
; CHECK-NEXT: call void @callee(i16 [[SPEC_SELECT]])
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[S:%.*]] = select i1 undef, i16 1, i16 0
+; CHECK-NEXT: [[TOBOOL18:%.*]] = icmp ne i16 [[S]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[TOBOOL18]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: br label [[FOR_COND12:%.*]]
; CHECK: for.cond12:
; CHECK-NEXT: call void @callee(i16 [[S]])
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[S:%.*]] = select i1 undef, i16 1, i16 0
+; CHECK-NEXT: [[TOBOOL18:%.*]] = icmp ne i16 [[S]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[TOBOOL18]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: br label [[FOR_COND12:%.*]]
; CHECK: for.cond12:
; CHECK-NEXT: call void @callee(i16 [[S]])
define void @bug18724(i1 %cond) {
; UNROLL-LABEL: @bug18724(
; UNROLL-NEXT: entry:
+; UNROLL-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
+; UNROLL-NEXT: call void @llvm.assume(i1 [[TMP0]])
; UNROLL-NEXT: br label [[FOR_BODY14:%.*]]
; UNROLL: for.body14:
; UNROLL-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ undef, [[ENTRY:%.*]] ]
; UNROLL: for.inc23:
; UNROLL-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]
; UNROLL-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1
+; UNROLL-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32
+; UNROLL-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0
+; UNROLL-NEXT: call void @llvm.assume(i1 [[CMP13]])
; UNROLL-NEXT: br label [[FOR_BODY14]]
;
; UNROLL-NOSIMPLIFY-LABEL: @bug18724(
;
; VEC-LABEL: @bug18724(
; VEC-NEXT: entry:
+; VEC-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
+; VEC-NEXT: call void @llvm.assume(i1 [[TMP0]])
; VEC-NEXT: br label [[FOR_BODY14:%.*]]
; VEC: for.body14:
; VEC-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ undef, [[ENTRY:%.*]] ]
; VEC: for.inc23:
; VEC-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]
; VEC-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1
+; VEC-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32
+; VEC-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0
+; VEC-NEXT: call void @llvm.assume(i1 [[CMP13]])
; VEC-NEXT: br label [[FOR_BODY14]]
;
entry:
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND_US:%.*]]
; CHECK: for.cond.us:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[B:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: br label [[FOR_COND_US]]
;
entry:
for.end: ; preds = %for.cond5
%load = load i32, i32* %call, align 4
br label %for.cond4
-}
\ No newline at end of file
+}
define void @test1(i1 %C, i1* %BP) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret void
;
entry:
define void @test5(i1 %cond, i8* %ptr) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: store i8 2, i8* [[PTR:%.*]], align 8
; CHECK-NEXT: ret void
;
define void @test6(i1 %cond, i8* %ptr) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: store i8 2, i8* [[PTR:%.*]], align 8
; CHECK-NEXT: ret void
;
define i32 @test7(i1 %X) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret i32 0
;
entry:
define void @test8(i1 %X, void ()* %Y) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: call void [[Y:%.*]]()
; CHECK-NEXT: ret void
;
ret void
}
-attributes #0 = { "null-pointer-is-valid"="true" }
\ No newline at end of file
+attributes #0 = { "null-pointer-is-valid"="true" }
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt %s -simplifycfg -instcombine -S | FileCheck %s
-; TODO: ABS call should be optimized away
define i32 @assume1(i32 %p) {
; CHECK-LABEL: @assume1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[P:%.*]], 0
-; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[P]]
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i32 [[NEG]], i32 [[P]]
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[P:%.*]], 0
+; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT: ret i32 [[P]]
;
entry:
%cmp = icmp sle i32 %p, 0
define i32 @assume2(i32 %p) {
; CHECK-LABEL: @assume2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[P:%.*]], 0
-; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[P]]
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i32 [[NEG]], i32 [[P]]
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[P:%.*]], 0
+; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT: ret i32 [[P]]
;
entry:
%cmp = icmp sgt i32 %p, 0